1<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> 2<html> 3<!-- This file documents the GNU Assembler "as". 4 5Copyright (C) 1991-2021 Free Software Foundation, Inc. 6 7Permission is granted to copy, distribute and/or modify this document 8under the terms of the GNU Free Documentation License, Version 1.3 9or any later version published by the Free Software Foundation; 10with no Invariant Sections, with no Front-Cover Texts, and with no 11Back-Cover Texts. A copy of the license is included in the 12section entitled "GNU Free Documentation License". 13 --> 14<!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> 15<head> 16<title>Using as: Blackfin Syntax</title> 17 18<meta name="description" content="Using as: Blackfin Syntax"> 19<meta name="keywords" content="Using as: Blackfin Syntax"> 20<meta name="resource-type" content="document"> 21<meta name="distribution" content="global"> 22<meta name="Generator" content="makeinfo"> 23<meta http-equiv="Content-Type" content="text/html; charset=utf-8"> 24<link href="index.html#Top" rel="start" title="Top"> 25<link href="AS-Index.html#AS-Index" rel="index" title="AS Index"> 26<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents"> 27<link href="Blackfin_002dDependent.html#Blackfin_002dDependent" rel="up" title="Blackfin-Dependent"> 28<link href="Blackfin-Directives.html#Blackfin-Directives" rel="next" title="Blackfin Directives"> 29<link href="Blackfin-Options.html#Blackfin-Options" rel="previous" title="Blackfin Options"> 30<style type="text/css"> 31<!-- 32a.summary-letter {text-decoration: none} 33blockquote.smallquotation {font-size: smaller} 34div.display {margin-left: 3.2em} 35div.example {margin-left: 3.2em} 36div.indentedblock {margin-left: 3.2em} 37div.lisp {margin-left: 3.2em} 38div.smalldisplay {margin-left: 3.2em} 39div.smallexample {margin-left: 3.2em} 40div.smallindentedblock {margin-left: 3.2em; font-size: smaller} 41div.smalllisp {margin-left: 3.2em} 42kbd {font-style:oblique} 43pre.display {font-family: inherit} 44pre.format {font-family: inherit} 45pre.menu-comment {font-family: serif} 46pre.menu-preformatted {font-family: serif} 47pre.smalldisplay {font-family: inherit; font-size: smaller} 48pre.smallexample {font-size: smaller} 49pre.smallformat {font-family: inherit; font-size: smaller} 50pre.smalllisp {font-size: smaller} 51span.nocodebreak {white-space:nowrap} 52span.nolinebreak {white-space:nowrap} 53span.roman {font-family:serif; font-weight:normal} 54span.sansserif {font-family:sans-serif; font-weight:normal} 55ul.no-bullet {list-style: none} 56--> 57</style> 58 59 60</head> 61 62<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000"> 63<a name="Blackfin-Syntax"></a> 64<div class="header"> 65<p> 66Next: <a href="Blackfin-Directives.html#Blackfin-Directives" accesskey="n" rel="next">Blackfin Directives</a>, Previous: <a href="Blackfin-Options.html#Blackfin-Options" accesskey="p" rel="previous">Blackfin Options</a>, Up: <a href="Blackfin_002dDependent.html#Blackfin_002dDependent" accesskey="u" rel="up">Blackfin-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> 67</div> 68<hr> 69<a name="Syntax-7"></a> 70<h4 class="subsection">9.6.2 Syntax</h4> 71<a name="index-Blackfin-syntax"></a> 72<a name="index-syntax_002c-Blackfin"></a> 73 74<dl compact="compact"> 75<dt><code>Special Characters</code></dt> 76<dd><p>Assembler input is free format and may appear anywhere on the line. 77One instruction may extend across multiple lines or more than one 78instruction may appear on the same line. White space (space, tab, 79comments or newline) may appear anywhere between tokens. A token must 80not have embedded spaces. Tokens include numbers, register names, 81keywords, user identifiers, and also some multicharacter special 82symbols like "+=", "/*" or "||". 83</p> 84<p>Comments are introduced by the ‘<samp>#</samp>’ character and extend to the 85end of the current line. If the ‘<samp>#</samp>’ appears as the first 86character of a line, the whole line is treated as a comment, but in 87this case the line can also be a logical line number directive 88(see <a href="Comments.html#Comments">Comments</a>) or a preprocessor control command 89(see <a href="Preprocessing.html#Preprocessing">Preprocessing</a>). 90</p> 91</dd> 92<dt><code>Instruction Delimiting</code></dt> 93<dd><p>A semicolon must terminate every instruction. Sometimes a complete 94instruction will consist of more than one operation. There are two 95cases where this occurs. The first is when two general operations 96are combined. Normally a comma separates the different parts, as in 97</p> 98<div class="smallexample"> 99<pre class="smallexample">a0= r3.h * r2.l, a1 = r3.l * r2.h ; 100</pre></div> 101 102<p>The second case occurs when a general instruction is combined with one 103or two memory references for joint issue. The latter portions are 104set off by a "||" token. 105</p> 106<div class="smallexample"> 107<pre class="smallexample">a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++]; 108</pre></div> 109 110<p>Multiple instructions can occur on the same line. Each must be 111terminated by a semicolon character. 112</p> 113</dd> 114<dt><code>Register Names</code></dt> 115<dd> 116<p>The assembler treats register names and instruction keywords in a case 117insensitive manner. User identifiers are case sensitive. Thus, R3.l, 118R3.L, r3.l and r3.L are all equivalent input to the assembler. 119</p> 120<p>Register names are reserved and may not be used as program identifiers. 121</p> 122<p>Some operations (such as "Move Register") require a register pair. 123Register pairs are always data registers and are denoted using a colon, 124eg., R3:2. The larger number must be written firsts. Note that the 125hardware only supports odd-even pairs, eg., R7:6, R5:4, R3:2, and R1:0. 126</p> 127<p>Some instructions (such as –SP (Push Multiple)) require a group of 128adjacent registers. Adjacent registers are denoted in the syntax by 129the range enclosed in parentheses and separated by a colon, eg., (R7:3). 130Again, the larger number appears first. 131</p> 132<p>Portions of a particular register may be individually specified. This 133is written with a dot (".") following the register name and then a 134letter denoting the desired portion. For 32-bit registers, ".H" 135denotes the most significant ("High") portion. ".L" denotes the 136least-significant portion. The subdivisions of the 40-bit registers 137are described later. 138</p> 139</dd> 140<dt><code>Accumulators</code></dt> 141<dd><p>The set of 40-bit registers A1 and A0 that normally contain data that 142is being manipulated. Each accumulator can be accessed in four ways. 143</p> 144<dl compact="compact"> 145<dt><code>one 40-bit register</code></dt> 146<dd><p>The register will be referred to as A1 or A0. 147</p></dd> 148<dt><code>one 32-bit register</code></dt> 149<dd><p>The registers are designated as A1.W or A0.W. 150</p></dd> 151<dt><code>two 16-bit registers</code></dt> 152<dd><p>The registers are designated as A1.H, A1.L, A0.H or A0.L. 153</p></dd> 154<dt><code>one 8-bit register</code></dt> 155<dd><p>The registers are designated as A1.X or A0.X for the bits that 156extend beyond bit 31. 157</p></dd> 158</dl> 159 160</dd> 161<dt><code>Data Registers</code></dt> 162<dd><p>The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7) that 163normally contain data for manipulation. These are abbreviated as 164D-register or Dreg. Data registers can be accessed as 32-bit registers 165or as two independent 16-bit registers. The least significant 16 bits 166of each register is called the "low" half and is designated with ".L" 167following the register name. The most significant 16 bits are called 168the "high" half and is designated with ".H" following the name. 169</p> 170<div class="smallexample"> 171<pre class="smallexample"> R7.L, r2.h, r4.L, R0.H 172</pre></div> 173 174</dd> 175<dt><code>Pointer Registers</code></dt> 176<dd><p>The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP) that 177normally contain byte addresses of data structures. These are 178abbreviated as P-register or Preg. 179</p> 180<div class="smallexample"> 181<pre class="smallexample">p2, p5, fp, sp 182</pre></div> 183 184</dd> 185<dt><code>Stack Pointer SP</code></dt> 186<dd><p>The stack pointer contains the 32-bit address of the last occupied 187byte location in the stack. The stack grows by decrementing the 188stack pointer. 189</p> 190</dd> 191<dt><code>Frame Pointer FP</code></dt> 192<dd><p>The frame pointer contains the 32-bit address of the previous frame 193pointer in the stack. It is located at the top of a frame. 194</p> 195</dd> 196<dt><code>Loop Top</code></dt> 197<dd><p>LT0 and LT1. These registers contain the 32-bit address of the top of 198a zero overhead loop. 199</p> 200</dd> 201<dt><code>Loop Count</code></dt> 202<dd><p>LC0 and LC1. These registers contain the 32-bit counter of the zero 203overhead loop executions. 204</p> 205</dd> 206<dt><code>Loop Bottom</code></dt> 207<dd><p>LB0 and LB1. These registers contain the 32-bit address of the bottom 208of a zero overhead loop. 209</p> 210</dd> 211<dt><code>Index Registers</code></dt> 212<dd><p>The set of 32-bit registers (I0, I1, I2, I3) that normally contain byte 213addresses of data structures. Abbreviated I-register or Ireg. 214</p> 215</dd> 216<dt><code>Modify Registers</code></dt> 217<dd><p>The set of 32-bit registers (M0, M1, M2, M3) that normally contain 218offset values that are added and subtracted to one of the index 219registers. Abbreviated as Mreg. 220</p> 221</dd> 222<dt><code>Length Registers</code></dt> 223<dd><p>The set of 32-bit registers (L0, L1, L2, L3) that normally contain the 224length in bytes of the circular buffer. Abbreviated as Lreg. Clear 225the Lreg to disable circular addressing for the corresponding Ireg. 226</p> 227</dd> 228<dt><code>Base Registers</code></dt> 229<dd><p>The set of 32-bit registers (B0, B1, B2, B3) that normally contain the 230base address in bytes of the circular buffer. Abbreviated as Breg. 231</p> 232</dd> 233<dt><code>Floating Point</code></dt> 234<dd><p>The Blackfin family has no hardware floating point but the .float 235directive generates ieee floating point numbers for use with software 236floating point libraries. 237</p> 238</dd> 239<dt><code>Blackfin Opcodes</code></dt> 240<dd><p>For detailed information on the Blackfin machine instruction set, see 241the Blackfin Processor Instruction Set Reference. 242</p> 243</dd> 244</dl> 245 246<hr> 247<div class="header"> 248<p> 249Next: <a href="Blackfin-Directives.html#Blackfin-Directives" accesskey="n" rel="next">Blackfin Directives</a>, Previous: <a href="Blackfin-Options.html#Blackfin-Options" accesskey="p" rel="previous">Blackfin Options</a>, Up: <a href="Blackfin_002dDependent.html#Blackfin_002dDependent" accesskey="u" rel="up">Blackfin-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> 250</div> 251 252 253 254</body> 255</html> 256