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63<a name="BPF-Opcodes"></a>
64<div class="header">
65<p>
66Previous: <a href="BPF-Directives.html#BPF-Directives" accesskey="p" rel="previous">BPF Directives</a>, Up: <a href="BPF_002dDependent.html#BPF_002dDependent" accesskey="u" rel="up">BPF-Dependent</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p>
67</div>
68<hr>
69<a name="Opcodes-5"></a>
70<h4 class="subsection">9.7.4 Opcodes</h4>
71
72<a name="index-BPF-opcodes"></a>
73<a name="index-opcodes-for-BPF"></a>
74<p>In the instruction descriptions below the following field descriptors
75are used:
76</p>
77<dl compact="compact">
78<dt><code>%d</code></dt>
79<dd><p>Destination general-purpose register whose role is to be destination
80of an operation.
81</p></dd>
82<dt><code>%s</code></dt>
83<dd><p>Source general-purpose register whose role is to be the source of an
84operation.
85</p></dd>
86<dt><code>disp16</code></dt>
87<dd><p>16-bit signed PC-relative offset, measured in number of 64-bit words,
88minus one.
89</p></dd>
90<dt><code>disp32</code></dt>
91<dd><p>32-bit signed PC-relative offset, measured in number of 64-bit words,
92minus one.
93</p></dd>
94<dt><code>offset16</code></dt>
95<dd><p>Signed 16-bit immediate.
96</p></dd>
97<dt><code>imm32</code></dt>
98<dd><p>Signed 32-bit immediate.
99</p></dd>
100<dt><code>imm64</code></dt>
101<dd><p>Signed 64-bit immediate.
102</p></dd>
103</dl>
104
105<a name="Arithmetic-instructions"></a>
106<h4 class="subsubsection">9.7.4.1 Arithmetic instructions</h4>
107
108<p>The destination register in these instructions act like an
109accumulator.
110</p>
111<dl compact="compact">
112<dt><code>add %d, (%s|imm32)</code></dt>
113<dd><p>64-bit arithmetic addition.
114</p></dd>
115<dt><code>sub %d, (%s|imm32)</code></dt>
116<dd><p>64-bit arithmetic subtraction.
117</p></dd>
118<dt><code>mul %d, (%s|imm32)</code></dt>
119<dd><p>64-bit arithmetic multiplication.
120</p></dd>
121<dt><code>div %d, (%s|imm32)</code></dt>
122<dd><p>64-bit arithmetic integer division.
123</p></dd>
124<dt><code>mod %d, (%s|imm32)</code></dt>
125<dd><p>64-bit integer remainder.
126</p></dd>
127<dt><code>and %d, (%s|imm32)</code></dt>
128<dd><p>64-bit bit-wise &ldquo;and&rdquo; operation.
129</p></dd>
130<dt><code>or %d, (%s|imm32)</code></dt>
131<dd><p>64-bit bit-wise &ldquo;or&rdquo; operation.
132</p></dd>
133<dt><code>xor %d, (%s|imm32)</code></dt>
134<dd><p>64-bit bit-wise exclusive-or operation.
135</p></dd>
136<dt><code>lsh %d, (%s|imm32)</code></dt>
137<dd><p>64-bit left shift, by <code>%s</code> or <code>imm32</code> bits.
138</p></dd>
139<dt><code>rsh %d, (%s|imm32)</code></dt>
140<dd><p>64-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits.
141</p></dd>
142<dt><code>arsh %d, (%s|imm32)</code></dt>
143<dd><p>64-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits.
144</p></dd>
145<dt><code>neg %d</code></dt>
146<dd><p>64-bit arithmetic negation.
147</p></dd>
148<dt><code>mov %d, (%s|imm32)</code></dt>
149<dd><p>Move the 64-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code>
150in <code>%d</code>.
151</p></dd>
152</dl>
153
154<a name="g_t32_002dbit-arithmetic-instructions"></a>
155<h4 class="subsubsection">9.7.4.2 32-bit arithmetic instructions</h4>
156
157<p>The destination register in these instructions act as an accumulator.
158</p>
159<dl compact="compact">
160<dt><code>add32 %d, (%s|imm32)</code></dt>
161<dd><p>32-bit arithmetic addition.
162</p></dd>
163<dt><code>sub32 %d, (%s|imm32)</code></dt>
164<dd><p>32-bit arithmetic subtraction.
165</p></dd>
166<dt><code>mul32 %d, (%s|imm32)</code></dt>
167<dd><p>32-bit arithmetic multiplication.
168</p></dd>
169<dt><code>div32 %d, (%s|imm32)</code></dt>
170<dd><p>32-bit arithmetic integer division.
171</p></dd>
172<dt><code>mod32 %d, (%s|imm32)</code></dt>
173<dd><p>32-bit integer remainder.
174</p></dd>
175<dt><code>and32 %d, (%s|imm32)</code></dt>
176<dd><p>32-bit bit-wise &ldquo;and&rdquo; operation.
177</p></dd>
178<dt><code>or32 %d, (%s|imm32)</code></dt>
179<dd><p>32-bit bit-wise &ldquo;or&rdquo; operation.
180</p></dd>
181<dt><code>xor32 %d, (%s|imm32)</code></dt>
182<dd><p>32-bit bit-wise exclusive-or operation.
183</p></dd>
184<dt><code>lsh32 %d, (%s|imm32)</code></dt>
185<dd><p>32-bit left shift, by <code>%s</code> or <code>imm32</code> bits.
186</p></dd>
187<dt><code>rsh32 %d, (%s|imm32)</code></dt>
188<dd><p>32-bit right logical shift, by <code>%s</code> or <code>imm32</code> bits.
189</p></dd>
190<dt><code>arsh32 %d, (%s|imm32)</code></dt>
191<dd><p>32-bit right arithmetic shift, by <code>%s</code> or <code>imm32</code> bits.
192</p></dd>
193<dt><code>neg32 %d</code></dt>
194<dd><p>32-bit arithmetic negation.
195</p></dd>
196<dt><code>mov32 %d, (%s|imm32)</code></dt>
197<dd><p>Move the 32-bit value of <code>%s</code> in <code>%d</code>, or load <code>imm32</code>
198in <code>%d</code>.
199</p></dd>
200</dl>
201
202<a name="Endianness-conversion-instructions"></a>
203<h4 class="subsubsection">9.7.4.3 Endianness conversion instructions</h4>
204
205<dl compact="compact">
206<dt><code>endle %d, (8|16|32)</code></dt>
207<dd><p>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to
208little-endian.
209</p></dd>
210<dt><code>endbe %d, (8|16|32)</code></dt>
211<dd><p>Convert the 8-bit, 16-bit or 32-bit value in <code>%d</code> to big-endian.
212</p></dd>
213</dl>
214
215<a name="g_t64_002dbit-load-and-pseudo-maps"></a>
216<h4 class="subsubsection">9.7.4.4 64-bit load and pseudo maps</h4>
217
218<dl compact="compact">
219<dt><code>lddw %d, imm64</code></dt>
220<dd><p>Load the given signed 64-bit immediate, or pseudo map descriptor, to
221the destination register <code>%d</code>.
222</p></dd>
223<dt><code>lddw %d, %map_fd(N)</code></dt>
224<dd><p>Load the address of the given pseudo map fd <em>N</em> to the
225destination register <code>%d</code>.
226</p></dd>
227</dl>
228
229<a name="Load-instructions-for-socket-filters"></a>
230<h4 class="subsubsection">9.7.4.5 Load instructions for socket filters</h4>
231
232<p>The following instructions are intended to be used in socket filters,
233and are therefore not general-purpose: they make assumptions on the
234contents of several registers.  See the file
235<samp>Documentation/networking/filter.txt</samp> in the Linux kernel source
236tree for more information.
237</p>
238<p>Absolute loads:
239</p>
240<dl compact="compact">
241<dt><code>ldabsdw imm32</code></dt>
242<dd><p>Absolute 64-bit load.
243</p></dd>
244<dt><code>ldabsw imm32</code></dt>
245<dd><p>Absolute 32-bit load.
246</p></dd>
247<dt><code>ldabsh imm32</code></dt>
248<dd><p>Absolute 16-bit load.
249</p></dd>
250<dt><code>ldabsb imm32</code></dt>
251<dd><p>Absolute 8-bit load.
252</p></dd>
253</dl>
254
255<p>Indirect loads:
256</p>
257<dl compact="compact">
258<dt><code>ldinddw %s, imm32</code></dt>
259<dd><p>Indirect 64-bit load.
260</p></dd>
261<dt><code>ldindw %s, imm32</code></dt>
262<dd><p>Indirect 32-bit load.
263</p></dd>
264<dt><code>ldindh %s, imm32</code></dt>
265<dd><p>Indirect 16-bit load.
266</p></dd>
267<dt><code>ldindb %s, imm32</code></dt>
268<dd><p>Indirect 8-bit load.
269</p></dd>
270</dl>
271
272<a name="Generic-load_002fstore-instructions"></a>
273<h4 class="subsubsection">9.7.4.6 Generic load/store instructions</h4>
274
275<p>General-purpose load and store instructions are provided for several
276word sizes.
277</p>
278<p>Load to register instructions:
279</p>
280<dl compact="compact">
281<dt><code>ldxdw %d, [%s+offset16]</code></dt>
282<dd><p>Generic 64-bit load.
283</p></dd>
284<dt><code>ldxw %d, [%s+offset16]</code></dt>
285<dd><p>Generic 32-bit load.
286</p></dd>
287<dt><code>ldxh %d, [%s+offset16]</code></dt>
288<dd><p>Generic 16-bit load.
289</p></dd>
290<dt><code>ldxb %d, [%s+offset16]</code></dt>
291<dd><p>Generic 8-bit load.
292</p></dd>
293</dl>
294
295<p>Store from register instructions:
296</p>
297<dl compact="compact">
298<dt><code>stxdw [%d+offset16], %s</code></dt>
299<dd><p>Generic 64-bit store.
300</p></dd>
301<dt><code>stxw [%d+offset16], %s</code></dt>
302<dd><p>Generic 32-bit store.
303</p></dd>
304<dt><code>stxh [%d+offset16], %s</code></dt>
305<dd><p>Generic 16-bit store.
306</p></dd>
307<dt><code>stxb [%d+offset16], %s</code></dt>
308<dd><p>Generic 8-bit store.
309</p></dd>
310</dl>
311
312<p>Store from immediates instructions:
313</p>
314<dl compact="compact">
315<dt><code>stddw [%d+offset16], imm32</code></dt>
316<dd><p>Store immediate as 64-bit.
317</p></dd>
318<dt><code>stdw [%d+offset16], imm32</code></dt>
319<dd><p>Store immediate as 32-bit.
320</p></dd>
321<dt><code>stdh [%d+offset16], imm32</code></dt>
322<dd><p>Store immediate as 16-bit.
323</p></dd>
324<dt><code>stdb [%d+offset16], imm32</code></dt>
325<dd><p>Store immediate as 8-bit.
326</p></dd>
327</dl>
328
329<a name="Jump-instructions"></a>
330<h4 class="subsubsection">9.7.4.7 Jump instructions</h4>
331
332<p>eBPF provides the following compare-and-jump instructions, which
333compare the values of the two given registers, or the values of a
334register and an immediate, and perform a branch in case the comparison
335holds true.
336</p>
337<dl compact="compact">
338<dt><code>ja %d,(%s|imm32),disp16</code></dt>
339<dd><p>Jump-always.
340</p></dd>
341<dt><code>jeq %d,(%s|imm32),disp16</code></dt>
342<dd><p>Jump if equal.
343</p></dd>
344<dt><code>jgt %d,(%s|imm32),disp16</code></dt>
345<dd><p>Jump if greater.
346</p></dd>
347<dt><code>jge %d,(%s|imm32),disp16</code></dt>
348<dd><p>Jump if greater or equal.
349</p></dd>
350<dt><code>jlt %d,(%s|imm32),disp16</code></dt>
351<dd><p>Jump if lesser.
352</p></dd>
353<dt><code>jle %d,(%s|imm32),disp16</code></dt>
354<dd><p>Jump if lesser or equal.
355</p></dd>
356<dt><code>jset %d,(%s|imm32),disp16</code></dt>
357<dd><p>Jump if signed equal.
358</p></dd>
359<dt><code>jne %d,(%s|imm32),disp16</code></dt>
360<dd><p>Jump if not equal.
361</p></dd>
362<dt><code>jsgt %d,(%s|imm32),disp16</code></dt>
363<dd><p>Jump if signed greater.
364</p></dd>
365<dt><code>jsge %d,(%s|imm32),disp16</code></dt>
366<dd><p>Jump if signed greater or equal.
367</p></dd>
368<dt><code>jslt %d,(%s|imm32),disp16</code></dt>
369<dd><p>Jump if signed lesser.
370</p></dd>
371<dt><code>jsle %d,(%s|imm32),disp16</code></dt>
372<dd><p>Jump if signed lesser or equal.
373</p></dd>
374</dl>
375
376<p>A call instruction is provided in order to perform calls to other eBPF
377functions, or to external kernel helpers:
378</p>
379<dl compact="compact">
380<dt><code>call (disp32|imm32)</code></dt>
381<dd><p>Jump and link to the offset <em>disp32</em>, or to the kernel helper
382function identified by <em>imm32</em>.
383</p></dd>
384</dl>
385
386<p>Finally:
387</p>
388<dl compact="compact">
389<dt><code>exit</code></dt>
390<dd><p>Terminate the eBPF program.
391</p></dd>
392</dl>
393
394<a name="Atomic-instructions"></a>
395<h4 class="subsubsection">9.7.4.8 Atomic instructions</h4>
396
397<p>Atomic exchange-and-add instructions are provided in two flavors: one
398for swapping 64-bit quantities and another for 32-bit quantities.
399</p>
400<dl compact="compact">
401<dt><code>xadddw [%d+offset16],%s</code></dt>
402<dd><p>Exchange-and-add a 64-bit value at the specified location.
403</p></dd>
404<dt><code>xaddw [%d+offset16],%s</code></dt>
405<dd><p>Exchange-and-add a 32-bit value at the specified location.
406</p></dd>
407</dl>
408
409
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