1<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> 2<html> 3<!-- This file documents the GNU Assembler "as". 4 5Copyright (C) 1991-2021 Free Software Foundation, Inc. 6 7Permission is granted to copy, distribute and/or modify this document 8under the terms of the GNU Free Documentation License, Version 1.3 9or any later version published by the Free Software Foundation; 10with no Invariant Sections, with no Front-Cover Texts, and with no 11Back-Cover Texts. A copy of the license is included in the 12section entitled "GNU Free Documentation License". 13 --> 14<!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> 15<head> 16<title>Using as: Overview</title> 17 18<meta name="description" content="Using as: Overview"> 19<meta name="keywords" content="Using as: Overview"> 20<meta name="resource-type" content="document"> 21<meta name="distribution" content="global"> 22<meta name="Generator" content="makeinfo"> 23<meta http-equiv="Content-Type" content="text/html; charset=utf-8"> 24<link href="index.html#Top" rel="start" title="Top"> 25<link href="AS-Index.html#AS-Index" rel="index" title="AS Index"> 26<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents"> 27<link href="index.html#Top" rel="up" title="Top"> 28<link href="Manual.html#Manual" rel="next" title="Manual"> 29<link href="index.html#Top" rel="previous" title="Top"> 30<style type="text/css"> 31<!-- 32a.summary-letter {text-decoration: none} 33blockquote.smallquotation {font-size: smaller} 34div.display {margin-left: 3.2em} 35div.example {margin-left: 3.2em} 36div.indentedblock {margin-left: 3.2em} 37div.lisp {margin-left: 3.2em} 38div.smalldisplay {margin-left: 3.2em} 39div.smallexample {margin-left: 3.2em} 40div.smallindentedblock {margin-left: 3.2em; font-size: smaller} 41div.smalllisp {margin-left: 3.2em} 42kbd {font-style:oblique} 43pre.display {font-family: inherit} 44pre.format {font-family: inherit} 45pre.menu-comment {font-family: serif} 46pre.menu-preformatted {font-family: serif} 47pre.smalldisplay {font-family: inherit; font-size: smaller} 48pre.smallexample {font-size: smaller} 49pre.smallformat {font-family: inherit; font-size: smaller} 50pre.smalllisp {font-size: smaller} 51span.nocodebreak {white-space:nowrap} 52span.nolinebreak {white-space:nowrap} 53span.roman {font-family:serif; font-weight:normal} 54span.sansserif {font-family:sans-serif; font-weight:normal} 55ul.no-bullet {list-style: none} 56--> 57</style> 58 59 60</head> 61 62<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000"> 63<a name="Overview"></a> 64<div class="header"> 65<p> 66Next: <a href="Invoking.html#Invoking" accesskey="n" rel="next">Invoking</a>, Previous: <a href="index.html#Top" accesskey="p" rel="previous">Top</a>, Up: <a href="index.html#Top" accesskey="u" rel="up">Top</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> 67</div> 68<hr> 69<a name="Overview-1"></a> 70<h2 class="chapter">1 Overview</h2> 71 72<a name="index-invocation-summary"></a> 73<a name="index-option-summary"></a> 74<a name="index-summary-of-options"></a> 75<p>Here is a brief summary of how to invoke <code>as</code>. For details, 76see <a href="Invoking.html#Invoking">Command-Line Options</a>. 77</p> 78 79 80<div class="smallexample"> 81<pre class="smallexample">as [<b>-a</b>[<b>cdghlns</b>][=<var>file</var>]] [<b>–alternate</b>] [<b>-D</b>] 82 [<b>–compress-debug-sections</b>] [<b>–nocompress-debug-sections</b>] 83 [<b>–debug-prefix-map</b> <var>old</var>=<var>new</var>] 84 [<b>–defsym</b> <var>sym</var>=<var>val</var>] [<b>-f</b>] [<b>-g</b>] [<b>–gstabs</b>] 85 [<b>–gstabs+</b>] [<b>–gdwarf-<N></b>] [<b>–gdwarf-sections</b>] 86 [<b>–gdwarf-cie-version</b>=<var>VERSION</var>] 87 [<b>–help</b>] [<b>-I</b> <var>dir</var>] [<b>-J</b>] 88 [<b>-K</b>] [<b>-L</b>] [<b>–listing-lhs-width</b>=<var>NUM</var>] 89 [<b>–listing-lhs-width2</b>=<var>NUM</var>] [<b>–listing-rhs-width</b>=<var>NUM</var>] 90 [<b>–listing-cont-lines</b>=<var>NUM</var>] [<b>–keep-locals</b>] 91 [<b>–no-pad-sections</b>] 92 [<b>-o</b> <var>objfile</var>] [<b>-R</b>] 93 [<b>–statistics</b>] 94 [<b>-v</b>] [<b>-version</b>] [<b>–version</b>] 95 [<b>-W</b>] [<b>–warn</b>] [<b>–fatal-warnings</b>] [<b>-w</b>] [<b>-x</b>] 96 [<b>-Z</b>] [<b>@<var>FILE</var></b>] 97 [<b>–sectname-subst</b>] [<b>–size-check=[error|warning]</b>] 98 [<b>–elf-stt-common=[no|yes]</b>] 99 [<b>–generate-missing-build-notes=[no|yes]</b>] 100 [<b>–target-help</b>] [<var>target-options</var>] 101 [<b>–</b>|<var>files</var> …] 102 103<em>Target AArch64 options:</em> 104 [<b>-EB</b>|<b>-EL</b>] 105 [<b>-mabi</b>=<var>ABI</var>] 106 107<em>Target Alpha options:</em> 108 [<b>-m<var>cpu</var></b>] 109 [<b>-mdebug</b> | <b>-no-mdebug</b>] 110 [<b>-replace</b> | <b>-noreplace</b>] 111 [<b>-relax</b>] [<b>-g</b>] [<b>-G<var>size</var></b>] 112 [<b>-F</b>] [<b>-32addr</b>] 113 114<em>Target ARC options:</em> 115 [<b>-mcpu=<var>cpu</var></b>] 116 [<b>-mA6</b>|<b>-mARC600</b>|<b>-mARC601</b>|<b>-mA7</b>|<b>-mARC700</b>|<b>-mEM</b>|<b>-mHS</b>] 117 [<b>-mcode-density</b>] 118 [<b>-mrelax</b>] 119 [<b>-EB</b>|<b>-EL</b>] 120 121<em>Target ARM options:</em> 122 [<b>-mcpu</b>=<var>processor</var>[+<var>extension</var>…]] 123 [<b>-march</b>=<var>architecture</var>[+<var>extension</var>…]] 124 [<b>-mfpu</b>=<var>floating-point-format</var>] 125 [<b>-mfloat-abi</b>=<var>abi</var>] 126 [<b>-meabi</b>=<var>ver</var>] 127 [<b>-mthumb</b>] 128 [<b>-EB</b>|<b>-EL</b>] 129 [<b>-mapcs-32</b>|<b>-mapcs-26</b>|<b>-mapcs-float</b>| 130 <b>-mapcs-reentrant</b>] 131 [<b>-mthumb-interwork</b>] [<b>-k</b>] 132 133<em>Target Blackfin options:</em> 134 [<b>-mcpu</b>=<var>processor</var>[-<var>sirevision</var>]] 135 [<b>-mfdpic</b>] 136 [<b>-mno-fdpic</b>] 137 [<b>-mnopic</b>] 138 139<em>Target BPF options:</em> 140 [<b>-EL</b>] [<b>-EB</b>] 141 142<em>Target CRIS options:</em> 143 [<b>–underscore</b> | <b>–no-underscore</b>] 144 [<b>–pic</b>] [<b>-N</b>] 145 [<b>–emulation=criself</b> | <b>–emulation=crisaout</b>] 146 [<b>–march=v0_v10</b> | <b>–march=v10</b> | <b>–march=v32</b> | <b>–march=common_v10_v32</b>] 147 148<em>Target C-SKY options:</em> 149 [<b>-march=<var>arch</var></b>] [<b>-mcpu=<var>cpu</var></b>] 150 [<b>-EL</b>] [<b>-mlittle-endian</b>] [<b>-EB</b>] [<b>-mbig-endian</b>] 151 [<b>-fpic</b>] [<b>-pic</b>] 152 [<b>-mljump</b>] [<b>-mno-ljump</b>] 153 [<b>-force2bsr</b>] [<b>-mforce2bsr</b>] [<b>-no-force2bsr</b>] [<b>-mno-force2bsr</b>] 154 [<b>-jsri2bsr</b>] [<b>-mjsri2bsr</b>] [<b>-no-jsri2bsr </b>] [<b>-mno-jsri2bsr</b>] 155 [<b>-mnolrw </b>] [<b>-mno-lrw</b>] 156 [<b>-melrw</b>] [<b>-mno-elrw</b>] 157 [<b>-mlaf </b>] [<b>-mliterals-after-func</b>] 158 [<b>-mno-laf</b>] [<b>-mno-literals-after-func</b>] 159 [<b>-mlabr</b>] [<b>-mliterals-after-br</b>] 160 [<b>-mno-labr</b>] [<b>-mnoliterals-after-br</b>] 161 [<b>-mistack</b>] [<b>-mno-istack</b>] 162 [<b>-mhard-float</b>] [<b>-mmp</b>] [<b>-mcp</b>] [<b>-mcache</b>] 163 [<b>-msecurity</b>] [<b>-mtrust</b>] 164 [<b>-mdsp</b>] [<b>-medsp</b>] [<b>-mvdsp</b>] 165 166<em>Target D10V options:</em> 167 [<b>-O</b>] 168 169<em>Target D30V options:</em> 170 [<b>-O</b>|<b>-n</b>|<b>-N</b>] 171 172<em>Target EPIPHANY options:</em> 173 [<b>-mepiphany</b>|<b>-mepiphany16</b>] 174 175<em>Target H8/300 options:</em> 176 [-h-tick-hex] 177 178<em>Target i386 options:</em> 179 [<b>–32</b>|<b>–x32</b>|<b>–64</b>] [<b>-n</b>] 180 [<b>-march</b>=<var>CPU</var>[+<var>EXTENSION</var>…]] [<b>-mtune</b>=<var>CPU</var>] 181 182<em>Target IA-64 options:</em> 183 [<b>-mconstant-gp</b>|<b>-mauto-pic</b>] 184 [<b>-milp32</b>|<b>-milp64</b>|<b>-mlp64</b>|<b>-mp64</b>] 185 [<b>-mle</b>|<b>mbe</b>] 186 [<b>-mtune=itanium1</b>|<b>-mtune=itanium2</b>] 187 [<b>-munwind-check=warning</b>|<b>-munwind-check=error</b>] 188 [<b>-mhint.b=ok</b>|<b>-mhint.b=warning</b>|<b>-mhint.b=error</b>] 189 [<b>-x</b>|<b>-xexplicit</b>] [<b>-xauto</b>] [<b>-xdebug</b>] 190 191<em>Target IP2K options:</em> 192 [<b>-mip2022</b>|<b>-mip2022ext</b>] 193 194<em>Target M32C options:</em> 195 [<b>-m32c</b>|<b>-m16c</b>] [-relax] [-h-tick-hex] 196 197<em>Target M32R options:</em> 198 [<b>–m32rx</b>|<b>–[no-]warn-explicit-parallel-conflicts</b>| 199 <b>–W[n]p</b>] 200 201<em>Target M680X0 options:</em> 202 [<b>-l</b>] [<b>-m68000</b>|<b>-m68010</b>|<b>-m68020</b>|…] 203 204<em>Target M68HC11 options:</em> 205 [<b>-m68hc11</b>|<b>-m68hc12</b>|<b>-m68hcs12</b>|<b>-mm9s12x</b>|<b>-mm9s12xg</b>] 206 [<b>-mshort</b>|<b>-mlong</b>] 207 [<b>-mshort-double</b>|<b>-mlong-double</b>] 208 [<b>–force-long-branches</b>] [<b>–short-branches</b>] 209 [<b>–strict-direct-mode</b>] [<b>–print-insn-syntax</b>] 210 [<b>–print-opcodes</b>] [<b>–generate-example</b>] 211 212<em>Target MCORE options:</em> 213 [<b>-jsri2bsr</b>] [<b>-sifilter</b>] [<b>-relax</b>] 214 [<b>-mcpu=[210|340]</b>] 215 216<em>Target Meta options:</em> 217 [<b>-mcpu=<var>cpu</var></b>] [<b>-mfpu=<var>cpu</var></b>] [<b>-mdsp=<var>cpu</var></b>] 218<em>Target MICROBLAZE options:</em> 219 220<em>Target MIPS options:</em> 221 [<b>-nocpp</b>] [<b>-EL</b>] [<b>-EB</b>] [<b>-O</b>[<var>optimization level</var>]] 222 [<b>-g</b>[<var>debug level</var>]] [<b>-G</b> <var>num</var>] [<b>-KPIC</b>] [<b>-call_shared</b>] 223 [<b>-non_shared</b>] [<b>-xgot</b> [<b>-mvxworks-pic</b>] 224 [<b>-mabi</b>=<var>ABI</var>] [<b>-32</b>] [<b>-n32</b>] [<b>-64</b>] [<b>-mfp32</b>] [<b>-mgp32</b>] 225 [<b>-mfp64</b>] [<b>-mgp64</b>] [<b>-mfpxx</b>] 226 [<b>-modd-spreg</b>] [<b>-mno-odd-spreg</b>] 227 [<b>-march</b>=<var>CPU</var>] [<b>-mtune</b>=<var>CPU</var>] [<b>-mips1</b>] [<b>-mips2</b>] 228 [<b>-mips3</b>] [<b>-mips4</b>] [<b>-mips5</b>] [<b>-mips32</b>] [<b>-mips32r2</b>] 229 [<b>-mips32r3</b>] [<b>-mips32r5</b>] [<b>-mips32r6</b>] [<b>-mips64</b>] [<b>-mips64r2</b>] 230 [<b>-mips64r3</b>] [<b>-mips64r5</b>] [<b>-mips64r6</b>] 231 [<b>-construct-floats</b>] [<b>-no-construct-floats</b>] 232 [<b>-mignore-branch-isa</b>] [<b>-mno-ignore-branch-isa</b>] 233 [<b>-mnan=<var>encoding</var></b>] 234 [<b>-trap</b>] [<b>-no-break</b>] [<b>-break</b>] [<b>-no-trap</b>] 235 [<b>-mips16</b>] [<b>-no-mips16</b>] 236 [<b>-mmips16e2</b>] [<b>-mno-mips16e2</b>] 237 [<b>-mmicromips</b>] [<b>-mno-micromips</b>] 238 [<b>-msmartmips</b>] [<b>-mno-smartmips</b>] 239 [<b>-mips3d</b>] [<b>-no-mips3d</b>] 240 [<b>-mdmx</b>] [<b>-no-mdmx</b>] 241 [<b>-mdsp</b>] [<b>-mno-dsp</b>] 242 [<b>-mdspr2</b>] [<b>-mno-dspr2</b>] 243 [<b>-mdspr3</b>] [<b>-mno-dspr3</b>] 244 [<b>-mmsa</b>] [<b>-mno-msa</b>] 245 [<b>-mxpa</b>] [<b>-mno-xpa</b>] 246 [<b>-mmt</b>] [<b>-mno-mt</b>] 247 [<b>-mmcu</b>] [<b>-mno-mcu</b>] 248 [<b>-mcrc</b>] [<b>-mno-crc</b>] 249 [<b>-mginv</b>] [<b>-mno-ginv</b>] 250 [<b>-mloongson-mmi</b>] [<b>-mno-loongson-mmi</b>] 251 [<b>-mloongson-cam</b>] [<b>-mno-loongson-cam</b>] 252 [<b>-mloongson-ext</b>] [<b>-mno-loongson-ext</b>] 253 [<b>-mloongson-ext2</b>] [<b>-mno-loongson-ext2</b>] 254 [<b>-minsn32</b>] [<b>-mno-insn32</b>] 255 [<b>-mfix7000</b>] [<b>-mno-fix7000</b>] 256 [<b>-mfix-rm7000</b>] [<b>-mno-fix-rm7000</b>] 257 [<b>-mfix-vr4120</b>] [<b>-mno-fix-vr4120</b>] 258 [<b>-mfix-vr4130</b>] [<b>-mno-fix-vr4130</b>] 259 [<b>-mfix-r5900</b>] [<b>-mno-fix-r5900</b>] 260 [<b>-mdebug</b>] [<b>-no-mdebug</b>] 261 [<b>-mpdr</b>] [<b>-mno-pdr</b>] 262 263<em>Target MMIX options:</em> 264 [<b>–fixed-special-register-names</b>] [<b>–globalize-symbols</b>] 265 [<b>–gnu-syntax</b>] [<b>–relax</b>] [<b>–no-predefined-symbols</b>] 266 [<b>–no-expand</b>] [<b>–no-merge-gregs</b>] [<b>-x</b>] 267 [<b>–linker-allocated-gregs</b>] 268 269<em>Target Nios II options:</em> 270 [<b>-relax-all</b>] [<b>-relax-section</b>] [<b>-no-relax</b>] 271 [<b>-EB</b>] [<b>-EL</b>] 272 273<em>Target NDS32 options:</em> 274 [<b>-EL</b>] [<b>-EB</b>] [<b>-O</b>] [<b>-Os</b>] [<b>-mcpu=<var>cpu</var></b>] 275 [<b>-misa=<var>isa</var></b>] [<b>-mabi=<var>abi</var></b>] [<b>-mall-ext</b>] 276 [<b>-m[no-]16-bit</b>] [<b>-m[no-]perf-ext</b>] [<b>-m[no-]perf2-ext</b>] 277 [<b>-m[no-]string-ext</b>] [<b>-m[no-]dsp-ext</b>] [<b>-m[no-]mac</b>] [<b>-m[no-]div</b>] 278 [<b>-m[no-]audio-isa-ext</b>] [<b>-m[no-]fpu-sp-ext</b>] [<b>-m[no-]fpu-dp-ext</b>] 279 [<b>-m[no-]fpu-fma</b>] [<b>-mfpu-freg=<var>FREG</var></b>] [<b>-mreduced-regs</b>] 280 [<b>-mfull-regs</b>] [<b>-m[no-]dx-regs</b>] [<b>-mpic</b>] [<b>-mno-relax</b>] 281 [<b>-mb2bb</b>] 282 283<em>Target PDP11 options:</em> 284 [<b>-mpic</b>|<b>-mno-pic</b>] [<b>-mall</b>] [<b>-mno-extensions</b>] 285 [<b>-m</b><var>extension</var>|<b>-mno-</b><var>extension</var>] 286 [<b>-m</b><var>cpu</var>] [<b>-m</b><var>machine</var>] 287 288<em>Target picoJava options:</em> 289 [<b>-mb</b>|<b>-me</b>] 290 291<em>Target PowerPC options:</em> 292 [<b>-a32</b>|<b>-a64</b>] 293 [<b>-mpwrx</b>|<b>-mpwr2</b>|<b>-mpwr</b>|<b>-m601</b>|<b>-mppc</b>|<b>-mppc32</b>|<b>-m603</b>|<b>-m604</b>|<b>-m403</b>|<b>-m405</b>| 294 <b>-m440</b>|<b>-m464</b>|<b>-m476</b>|<b>-m7400</b>|<b>-m7410</b>|<b>-m7450</b>|<b>-m7455</b>|<b>-m750cl</b>|<b>-mgekko</b>| 295 <b>-mbroadway</b>|<b>-mppc64</b>|<b>-m620</b>|<b>-me500</b>|<b>-e500x2</b>|<b>-me500mc</b>|<b>-me500mc64</b>|<b>-me5500</b>| 296 <b>-me6500</b>|<b>-mppc64bridge</b>|<b>-mbooke</b>|<b>-mpower4</b>|<b>-mpwr4</b>|<b>-mpower5</b>|<b>-mpwr5</b>|<b>-mpwr5x</b>| 297 <b>-mpower6</b>|<b>-mpwr6</b>|<b>-mpower7</b>|<b>-mpwr7</b>|<b>-mpower8</b>|<b>-mpwr8</b>|<b>-mpower9</b>|<b>-mpwr9</b><b>-ma2</b>| 298 <b>-mcell</b>|<b>-mspe</b>|<b>-mspe2</b>|<b>-mtitan</b>|<b>-me300</b>|<b>-mcom</b>] 299 [<b>-many</b>] [<b>-maltivec</b>|<b>-mvsx</b>|<b>-mhtm</b>|<b>-mvle</b>] 300 [<b>-mregnames</b>|<b>-mno-regnames</b>] 301 [<b>-mrelocatable</b>|<b>-mrelocatable-lib</b>|<b>-K PIC</b>] [<b>-memb</b>] 302 [<b>-mlittle</b>|<b>-mlittle-endian</b>|<b>-le</b>|<b>-mbig</b>|<b>-mbig-endian</b>|<b>-be</b>] 303 [<b>-msolaris</b>|<b>-mno-solaris</b>] 304 [<b>-nops=<var>count</var></b>] 305 306<em>Target PRU options:</em> 307 [<b>-link-relax</b>] 308 [<b>-mnolink-relax</b>] 309 [<b>-mno-warn-regname-label</b>] 310 311<em>Target RISC-V options:</em> 312 [<b>-fpic</b>|<b>-fPIC</b>|<b>-fno-pic</b>] 313 [<b>-march</b>=<var>ISA</var>] 314 [<b>-mabi</b>=<var>ABI</var>] 315 [<b>-mlittle-endian</b>|<b>-mbig-endian</b>] 316 317<em>Target RL78 options:</em> 318 [<b>-mg10</b>] 319 [<b>-m32bit-doubles</b>|<b>-m64bit-doubles</b>] 320 321<em>Target RX options:</em> 322 [<b>-mlittle-endian</b>|<b>-mbig-endian</b>] 323 [<b>-m32bit-doubles</b>|<b>-m64bit-doubles</b>] 324 [<b>-muse-conventional-section-names</b>] 325 [<b>-msmall-data-limit</b>] 326 [<b>-mpid</b>] 327 [<b>-mrelax</b>] 328 [<b>-mint-register=<var>number</var></b>] 329 [<b>-mgcc-abi</b>|<b>-mrx-abi</b>] 330 331<em>Target s390 options:</em> 332 [<b>-m31</b>|<b>-m64</b>] [<b>-mesa</b>|<b>-mzarch</b>] [<b>-march</b>=<var>CPU</var>] 333 [<b>-mregnames</b>|<b>-mno-regnames</b>] 334 [<b>-mwarn-areg-zero</b>] 335 336<em>Target SCORE options:</em> 337 [<b>-EB</b>][<b>-EL</b>][<b>-FIXDD</b>][<b>-NWARN</b>] 338 [<b>-SCORE5</b>][<b>-SCORE5U</b>][<b>-SCORE7</b>][<b>-SCORE3</b>] 339 [<b>-march=score7</b>][<b>-march=score3</b>] 340 [<b>-USE_R1</b>][<b>-KPIC</b>][<b>-O0</b>][<b>-G</b> <var>num</var>][<b>-V</b>] 341 342<em>Target SPARC options:</em> 343 [<b>-Av6</b>|<b>-Av7</b>|<b>-Av8</b>|<b>-Aleon</b>|<b>-Asparclet</b>|<b>-Asparclite</b> 344 <b>-Av8plus</b>|<b>-Av8plusa</b>|<b>-Av8plusb</b>|<b>-Av8plusc</b>|<b>-Av8plusd</b> 345 <b>-Av8plusv</b>|<b>-Av8plusm</b>|<b>-Av9</b>|<b>-Av9a</b>|<b>-Av9b</b>|<b>-Av9c</b> 346 <b>-Av9d</b>|<b>-Av9e</b>|<b>-Av9v</b>|<b>-Av9m</b>|<b>-Asparc</b>|<b>-Asparcvis</b> 347 <b>-Asparcvis2</b>|<b>-Asparcfmaf</b>|<b>-Asparcima</b>|<b>-Asparcvis3</b> 348 <b>-Asparcvisr</b>|<b>-Asparc5</b>] 349 [<b>-xarch=v8plus</b>|<b>-xarch=v8plusa</b>]|<b>-xarch=v8plusb</b>|<b>-xarch=v8plusc</b> 350 <b>-xarch=v8plusd</b>|<b>-xarch=v8plusv</b>|<b>-xarch=v8plusm</b>|<b>-xarch=v9</b> 351 <b>-xarch=v9a</b>|<b>-xarch=v9b</b>|<b>-xarch=v9c</b>|<b>-xarch=v9d</b>|<b>-xarch=v9e</b> 352 <b>-xarch=v9v</b>|<b>-xarch=v9m</b>|<b>-xarch=sparc</b>|<b>-xarch=sparcvis</b> 353 <b>-xarch=sparcvis2</b>|<b>-xarch=sparcfmaf</b>|<b>-xarch=sparcima</b> 354 <b>-xarch=sparcvis3</b>|<b>-xarch=sparcvisr</b>|<b>-xarch=sparc5</b> 355 <b>-bump</b>] 356 [<b>-32</b>|<b>-64</b>] 357 [<b>–enforce-aligned-data</b>][<b>–dcti-couples-detect</b>] 358 359<em>Target TIC54X options:</em> 360 [<b>-mcpu=54[123589]</b>|<b>-mcpu=54[56]lp</b>] [<b>-mfar-mode</b>|<b>-mf</b>] 361 [<b>-merrors-to-file</b> <var><filename></var>|<b>-me</b> <var><filename></var>] 362 363<em>Target TIC6X options:</em> 364 [<b>-march=<var>arch</var></b>] [<b>-mbig-endian</b>|<b>-mlittle-endian</b>] 365 [<b>-mdsbt</b>|<b>-mno-dsbt</b>] [<b>-mpid=no</b>|<b>-mpid=near</b>|<b>-mpid=far</b>] 366 [<b>-mpic</b>|<b>-mno-pic</b>] 367 368<em>Target TILE-Gx options:</em> 369 [<b>-m32</b>|<b>-m64</b>][<b>-EB</b>][<b>-EL</b>] 370 371<em>Target Visium options:</em> 372 [<b>-mtune=<var>arch</var></b>] 373 374<em>Target Xtensa options:</em> 375 [<b>–[no-]text-section-literals</b>] [<b>–[no-]auto-litpools</b>] 376 [<b>–[no-]absolute-literals</b>] 377 [<b>–[no-]target-align</b>] [<b>–[no-]longcalls</b>] 378 [<b>–[no-]transform</b>] 379 [<b>–rename-section</b> <var>oldname</var>=<var>newname</var>] 380 [<b>–[no-]trampolines</b>] 381 [<b>–abi-windowed</b>|<b>–abi-call0</b>] 382 383<em>Target Z80 options:</em> 384 [<b>-march=<var>CPU</var><var>[-EXT]</var><var>[+EXT]</var></b>] 385 [<b>-local-prefix=</b><var>PREFIX</var>] 386 [<b>-colonless</b>] 387 [<b>-sdcc</b>] 388 [<b>-fp-s=</b><var>FORMAT</var>] 389 [<b>-fp-d=</b><var>FORMAT</var>] 390 391 392</pre></div> 393 394 395<dl compact="compact"> 396<dt><code>@<var>file</var></code></dt> 397<dd><p>Read command-line options from <var>file</var>. The options read are 398inserted in place of the original @<var>file</var> option. If <var>file</var> 399does not exist, or cannot be read, then the option will be treated 400literally, and not removed. 401</p> 402<p>Options in <var>file</var> are separated by whitespace. A whitespace 403character may be included in an option by surrounding the entire 404option in either single or double quotes. Any character (including a 405backslash) may be included by prefixing the character to be included 406with a backslash. The <var>file</var> may itself contain additional 407@<var>file</var> options; any such options will be processed recursively. 408</p> 409</dd> 410<dt><code>-a[cdghlmns]</code></dt> 411<dd><p>Turn on listings, in any of a variety of ways: 412</p> 413<dl compact="compact"> 414<dt><code>-ac</code></dt> 415<dd><p>omit false conditionals 416</p> 417</dd> 418<dt><code>-ad</code></dt> 419<dd><p>omit debugging directives 420</p> 421</dd> 422<dt><code>-ag</code></dt> 423<dd><p>include general information, like as version and options passed 424</p> 425</dd> 426<dt><code>-ah</code></dt> 427<dd><p>include high-level source 428</p> 429</dd> 430<dt><code>-al</code></dt> 431<dd><p>include assembly 432</p> 433</dd> 434<dt><code>-am</code></dt> 435<dd><p>include macro expansions 436</p> 437</dd> 438<dt><code>-an</code></dt> 439<dd><p>omit forms processing 440</p> 441</dd> 442<dt><code>-as</code></dt> 443<dd><p>include symbols 444</p> 445</dd> 446<dt><code>=file</code></dt> 447<dd><p>set the name of the listing file 448</p></dd> 449</dl> 450 451<p>You may combine these options; for example, use ‘<samp>-aln</samp>’ for assembly 452listing without forms processing. The ‘<samp>=file</samp>’ option, if used, must be 453the last one. By itself, ‘<samp>-a</samp>’ defaults to ‘<samp>-ahls</samp>’. 454</p> 455</dd> 456<dt><code>--alternate</code></dt> 457<dd><p>Begin in alternate macro mode. 458See <a href="Altmacro.html#Altmacro"><code>.altmacro</code></a>. 459</p> 460</dd> 461<dt><code>--compress-debug-sections</code></dt> 462<dd><p>Compress DWARF debug sections using zlib with SHF_COMPRESSED from the 463ELF ABI. The resulting object file may not be compatible with older 464linkers and object file utilities. Note if compression would make a 465given section <em>larger</em> then it is not compressed. 466</p> 467<a name="index-_002d_002dcompress_002ddebug_002dsections_003d-option"></a> 468</dd> 469<dt><code>--compress-debug-sections=none</code></dt> 470<dt><code>--compress-debug-sections=zlib</code></dt> 471<dt><code>--compress-debug-sections=zlib-gnu</code></dt> 472<dt><code>--compress-debug-sections=zlib-gabi</code></dt> 473<dd><p>These options control how DWARF debug sections are compressed. 474<samp>--compress-debug-sections=none</samp> is equivalent to 475<samp>--nocompress-debug-sections</samp>. 476<samp>--compress-debug-sections=zlib</samp> and 477<samp>--compress-debug-sections=zlib-gabi</samp> are equivalent to 478<samp>--compress-debug-sections</samp>. 479<samp>--compress-debug-sections=zlib-gnu</samp> compresses DWARF debug 480sections using zlib. The debug sections are renamed to begin with 481‘<samp>.zdebug</samp>’. Note if compression would make a given section 482<em>larger</em> then it is not compressed nor renamed. 483</p> 484 485</dd> 486<dt><code>--nocompress-debug-sections</code></dt> 487<dd><p>Do not compress DWARF debug sections. This is usually the default for all 488targets except the x86/x86_64, but a configure time option can be used to 489override this. 490</p> 491</dd> 492<dt><code>-D</code></dt> 493<dd><p>Ignored. This option is accepted for script compatibility with calls to 494other assemblers. 495</p> 496</dd> 497<dt><code>--debug-prefix-map <var>old</var>=<var>new</var></code></dt> 498<dd><p>When assembling files in directory <samp><var>old</var></samp>, record debugging 499information describing them as in <samp><var>new</var></samp> instead. 500</p> 501</dd> 502<dt><code>--defsym <var>sym</var>=<var>value</var></code></dt> 503<dd><p>Define the symbol <var>sym</var> to be <var>value</var> before assembling the input file. 504<var>value</var> must be an integer constant. As in C, a leading ‘<samp>0x</samp>’ 505indicates a hexadecimal value, and a leading ‘<samp>0</samp>’ indicates an octal 506value. The value of the symbol can be overridden inside a source file via the 507use of a <code>.set</code> pseudo-op. 508</p> 509</dd> 510<dt><code>-f</code></dt> 511<dd><p>“fast”—skip whitespace and comment preprocessing (assume source is 512compiler output). 513</p> 514</dd> 515<dt><code>-g</code></dt> 516<dt><code>--gen-debug</code></dt> 517<dd><p>Generate debugging information for each assembler source line using whichever 518debug format is preferred by the target. This currently means either STABS, 519ECOFF or DWARF2. When the debug format is DWARF then a <code>.debug_info</code> and 520<code>.debug_line</code> section is only emitted when the assembly file doesn’t 521generate one itself. 522</p> 523</dd> 524<dt><code>--gstabs</code></dt> 525<dd><p>Generate stabs debugging information for each assembler line. This 526may help debugging assembler code, if the debugger can handle it. 527</p> 528</dd> 529<dt><code>--gstabs+</code></dt> 530<dd><p>Generate stabs debugging information for each assembler line, with GNU 531extensions that probably only gdb can handle, and that could make other 532debuggers crash or refuse to read your program. This 533may help debugging assembler code. Currently the only GNU extension is 534the location of the current working directory at assembling time. 535</p> 536</dd> 537<dt><code>--gdwarf-2</code></dt> 538<dd><p>Generate DWARF2 debugging information for each assembler line. This 539may help debugging assembler code, if the debugger can handle it. Note—this 540option is only supported by some targets, not all of them. 541</p> 542</dd> 543<dt><code>--gdwarf-3</code></dt> 544<dd><p>This option is the same as the <samp>--gdwarf-2</samp> option, except that it 545allows for the possibility of the generation of extra debug information as per 546version 3 of the DWARF specification. Note - enabling this option does not 547guarantee the generation of any extra information, the choice to do so is on a 548per target basis. 549</p> 550</dd> 551<dt><code>--gdwarf-4</code></dt> 552<dd><p>This option is the same as the <samp>--gdwarf-2</samp> option, except that it 553allows for the possibility of the generation of extra debug information as per 554version 4 of the DWARF specification. Note - enabling this option does not 555guarantee the generation of any extra information, the choice to do so is on a 556per target basis. 557</p> 558</dd> 559<dt><code>--gdwarf-5</code></dt> 560<dd><p>This option is the same as the <samp>--gdwarf-2</samp> option, except that it 561allows for the possibility of the generation of extra debug information as per 562version 5 of the DWARF specification. Note - enabling this option does not 563guarantee the generation of any extra information, the choice to do so is on a 564per target basis. 565</p> 566</dd> 567<dt><code>--gdwarf-sections</code></dt> 568<dd><p>Instead of creating a .debug_line section, create a series of 569.debug_line.<var>foo</var> sections where <var>foo</var> is the name of the 570corresponding code section. For example a code section called <var>.text.func</var> 571will have its dwarf line number information placed into a section called 572<var>.debug_line.text.func</var>. If the code section is just called <var>.text</var> 573then debug line section will still be called just <var>.debug_line</var> without any 574suffix. 575</p> 576</dd> 577<dt><code>--gdwarf-cie-version=<var>version</var></code></dt> 578<dd><p>Control which version of DWARF Common Information Entries (CIEs) are produced. 579When this flag is not specificed the default is version 1, though some targets 580can modify this default. Other possible values for <var>version</var> are 3 or 4. 581</p> 582</dd> 583<dt><code>--size-check=error</code></dt> 584<dt><code>--size-check=warning</code></dt> 585<dd><p>Issue an error or warning for invalid ELF .size directive. 586</p> 587</dd> 588<dt><code>--elf-stt-common=no</code></dt> 589<dt><code>--elf-stt-common=yes</code></dt> 590<dd><p>These options control whether the ELF assembler should generate common 591symbols with the <code>STT_COMMON</code> type. The default can be controlled 592by a configure option <samp>--enable-elf-stt-common</samp>. 593</p> 594</dd> 595<dt><code>--generate-missing-build-notes=yes</code></dt> 596<dt><code>--generate-missing-build-notes=no</code></dt> 597<dd><p>These options control whether the ELF assembler should generate GNU Build 598attribute notes if none are present in the input sources. 599The default can be controlled by the <samp>--enable-generate-build-notes</samp> 600configure option. 601</p> 602 603</dd> 604<dt><code>--help</code></dt> 605<dd><p>Print a summary of the command-line options and exit. 606</p> 607</dd> 608<dt><code>--target-help</code></dt> 609<dd><p>Print a summary of all target specific options and exit. 610</p> 611</dd> 612<dt><code>-I <var>dir</var></code></dt> 613<dd><p>Add directory <var>dir</var> to the search list for <code>.include</code> directives. 614</p> 615</dd> 616<dt><code>-J</code></dt> 617<dd><p>Don’t warn about signed overflow. 618</p> 619</dd> 620<dt><code>-K</code></dt> 621<dd><p>Issue warnings when difference tables altered for long displacements. 622</p> 623</dd> 624<dt><code>-L</code></dt> 625<dt><code>--keep-locals</code></dt> 626<dd><p>Keep (in the symbol table) local symbols. These symbols start with 627system-specific local label prefixes, typically ‘<samp>.L</samp>’ for ELF systems 628or ‘<samp>L</samp>’ for traditional a.out systems. 629See <a href="Symbol-Names.html#Symbol-Names">Symbol Names</a>. 630</p> 631</dd> 632<dt><code>--listing-lhs-width=<var>number</var></code></dt> 633<dd><p>Set the maximum width, in words, of the output data column for an assembler 634listing to <var>number</var>. 635</p> 636</dd> 637<dt><code>--listing-lhs-width2=<var>number</var></code></dt> 638<dd><p>Set the maximum width, in words, of the output data column for continuation 639lines in an assembler listing to <var>number</var>. 640</p> 641</dd> 642<dt><code>--listing-rhs-width=<var>number</var></code></dt> 643<dd><p>Set the maximum width of an input source line, as displayed in a listing, to 644<var>number</var> bytes. 645</p> 646</dd> 647<dt><code>--listing-cont-lines=<var>number</var></code></dt> 648<dd><p>Set the maximum number of lines printed in a listing for a single line of input 649to <var>number</var> + 1. 650</p> 651</dd> 652<dt><code>--no-pad-sections</code></dt> 653<dd><p>Stop the assembler for padding the ends of output sections to the alignment 654of that section. The default is to pad the sections, but this can waste space 655which might be needed on targets which have tight memory constraints. 656</p> 657</dd> 658<dt><code>-o <var>objfile</var></code></dt> 659<dd><p>Name the object-file output from <code>as</code> <var>objfile</var>. 660</p> 661</dd> 662<dt><code>-R</code></dt> 663<dd><p>Fold the data section into the text section. 664</p> 665</dd> 666<dt><code>--sectname-subst</code></dt> 667<dd><p>Honor substitution sequences in section names. 668See <a href="Section.html#Section-Name-Substitutions"><code>.section <var>name</var></code></a>. 669</p> 670</dd> 671<dt><code>--statistics</code></dt> 672<dd><p>Print the maximum space (in bytes) and total time (in seconds) used by 673assembly. 674</p> 675</dd> 676<dt><code>--strip-local-absolute</code></dt> 677<dd><p>Remove local absolute symbols from the outgoing symbol table. 678</p> 679</dd> 680<dt><code>-v</code></dt> 681<dt><code>-version</code></dt> 682<dd><p>Print the <code>as</code> version. 683</p> 684</dd> 685<dt><code>--version</code></dt> 686<dd><p>Print the <code>as</code> version and exit. 687</p> 688</dd> 689<dt><code>-W</code></dt> 690<dt><code>--no-warn</code></dt> 691<dd><p>Suppress warning messages. 692</p> 693</dd> 694<dt><code>--fatal-warnings</code></dt> 695<dd><p>Treat warnings as errors. 696</p> 697</dd> 698<dt><code>--warn</code></dt> 699<dd><p>Don’t suppress warning messages or treat them as errors. 700</p> 701</dd> 702<dt><code>-w</code></dt> 703<dd><p>Ignored. 704</p> 705</dd> 706<dt><code>-x</code></dt> 707<dd><p>Ignored. 708</p> 709</dd> 710<dt><code>-Z</code></dt> 711<dd><p>Generate an object file even after errors. 712</p> 713</dd> 714<dt><code>-- | <var>files</var> …</code></dt> 715<dd><p>Standard input, or source files to assemble. 716</p> 717</dd> 718</dl> 719 720 721<p>See <a href="AArch64-Options.html#AArch64-Options">AArch64 Options</a>, for the options available when as is configured 722for the 64-bit mode of the ARM Architecture (AArch64). 723</p> 724 725 726 727<p>See <a href="Alpha-Options.html#Alpha-Options">Alpha Options</a>, for the options available when as is configured 728for an Alpha processor. 729</p> 730 731 732<p>The following options are available when as is configured for an ARC 733processor. 734</p> 735<dl compact="compact"> 736<dt><code>-mcpu=<var>cpu</var></code></dt> 737<dd><p>This option selects the core processor variant. 738</p></dd> 739<dt><code>-EB | -EL</code></dt> 740<dd><p>Select either big-endian (-EB) or little-endian (-EL) output. 741</p></dd> 742<dt><code>-mcode-density</code></dt> 743<dd><p>Enable Code Density extension instructions. 744</p></dd> 745</dl> 746 747<p>The following options are available when as is configured for the ARM 748processor family. 749</p> 750<dl compact="compact"> 751<dt><code>-mcpu=<var>processor</var>[+<var>extension</var>…]</code></dt> 752<dd><p>Specify which ARM processor variant is the target. 753</p></dd> 754<dt><code>-march=<var>architecture</var>[+<var>extension</var>…]</code></dt> 755<dd><p>Specify which ARM architecture variant is used by the target. 756</p></dd> 757<dt><code>-mfpu=<var>floating-point-format</var></code></dt> 758<dd><p>Select which Floating Point architecture is the target. 759</p></dd> 760<dt><code>-mfloat-abi=<var>abi</var></code></dt> 761<dd><p>Select which floating point ABI is in use. 762</p></dd> 763<dt><code>-mthumb</code></dt> 764<dd><p>Enable Thumb only instruction decoding. 765</p></dd> 766<dt><code>-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant</code></dt> 767<dd><p>Select which procedure calling convention is in use. 768</p></dd> 769<dt><code>-EB | -EL</code></dt> 770<dd><p>Select either big-endian (-EB) or little-endian (-EL) output. 771</p></dd> 772<dt><code>-mthumb-interwork</code></dt> 773<dd><p>Specify that the code has been generated with interworking between Thumb and 774ARM code in mind. 775</p></dd> 776<dt><code>-mccs</code></dt> 777<dd><p>Turns on CodeComposer Studio assembly syntax compatibility mode. 778</p></dd> 779<dt><code>-k</code></dt> 780<dd><p>Specify that PIC code has been generated. 781</p></dd> 782</dl> 783 784 785<p>See <a href="Blackfin-Options.html#Blackfin-Options">Blackfin Options</a>, for the options available when as is 786configured for the Blackfin processor family. 787</p> 788 789 790 791<p>See <a href="BPF-Options.html#BPF-Options">BPF Options</a>, for the options available when as is 792configured for the Linux kernel BPF processor family. 793</p> 794 795 796<p>See the info pages for documentation of the CRIS-specific options. 797</p> 798 799<p>See <a href="C_002dSKY-Options.html#C_002dSKY-Options">C-SKY Options</a>, for the options available when as is 800configured for the C-SKY processor family. 801</p> 802 803 804<p>The following options are available when as is configured for 805a D10V processor. 806</p><dl compact="compact"> 807<dd><a name="index-D10V-optimization"></a> 808<a name="index-optimization_002c-D10V"></a> 809</dd> 810<dt><code>-O</code></dt> 811<dd><p>Optimize output by parallelizing instructions. 812</p></dd> 813</dl> 814 815<p>The following options are available when as is configured for a D30V 816processor. 817</p><dl compact="compact"> 818<dd><a name="index-D30V-optimization"></a> 819<a name="index-optimization_002c-D30V"></a> 820</dd> 821<dt><code>-O</code></dt> 822<dd><p>Optimize output by parallelizing instructions. 823</p> 824<a name="index-D30V-nops"></a> 825</dd> 826<dt><code>-n</code></dt> 827<dd><p>Warn when nops are generated. 828</p> 829<a name="index-D30V-nops-after-32_002dbit-multiply"></a> 830</dd> 831<dt><code>-N</code></dt> 832<dd><p>Warn when a nop after a 32-bit multiply instruction is generated. 833</p></dd> 834</dl> 835 836<p>The following options are available when as is configured for the 837Adapteva EPIPHANY series. 838</p> 839<p>See <a href="Epiphany-Options.html#Epiphany-Options">Epiphany Options</a>, for the options available when as is 840configured for an Epiphany processor. 841</p> 842 843 844 845 846<p>See <a href="i386_002dOptions.html#i386_002dOptions">i386-Options</a>, for the options available when as is 847configured for an i386 processor. 848</p> 849 850 851<p>The following options are available when as is configured for the 852Ubicom IP2K series. 853</p> 854<dl compact="compact"> 855<dt><code>-mip2022ext</code></dt> 856<dd><p>Specifies that the extended IP2022 instructions are allowed. 857</p> 858</dd> 859<dt><code>-mip2022</code></dt> 860<dd><p>Restores the default behaviour, which restricts the permitted instructions to 861just the basic IP2022 ones. 862</p> 863</dd> 864</dl> 865 866<p>The following options are available when as is configured for the 867Renesas M32C and M16C processors. 868</p> 869<dl compact="compact"> 870<dt><code>-m32c</code></dt> 871<dd><p>Assemble M32C instructions. 872</p> 873</dd> 874<dt><code>-m16c</code></dt> 875<dd><p>Assemble M16C instructions (the default). 876</p> 877</dd> 878<dt><code>-relax</code></dt> 879<dd><p>Enable support for link-time relaxations. 880</p> 881</dd> 882<dt><code>-h-tick-hex</code></dt> 883<dd><p>Support H’00 style hex constants in addition to 0x00 style. 884</p> 885</dd> 886</dl> 887 888<p>The following options are available when as is configured for the 889Renesas M32R (formerly Mitsubishi M32R) series. 890</p> 891<dl compact="compact"> 892<dt><code>--m32rx</code></dt> 893<dd><p>Specify which processor in the M32R family is the target. The default 894is normally the M32R, but this option changes it to the M32RX. 895</p> 896</dd> 897<dt><code>--warn-explicit-parallel-conflicts or --Wp</code></dt> 898<dd><p>Produce warning messages when questionable parallel constructs are 899encountered. 900</p> 901</dd> 902<dt><code>--no-warn-explicit-parallel-conflicts or --Wnp</code></dt> 903<dd><p>Do not produce warning messages when questionable parallel constructs are 904encountered. 905</p> 906</dd> 907</dl> 908 909<p>The following options are available when as is configured for the 910Motorola 68000 series. 911</p> 912<dl compact="compact"> 913<dt><code>-l</code></dt> 914<dd><p>Shorten references to undefined symbols, to one word instead of two. 915</p> 916</dd> 917<dt><code>-m68000 | -m68008 | -m68010 | -m68020 | -m68030</code></dt> 918<dt><code>| -m68040 | -m68060 | -m68302 | -m68331 | -m68332</code></dt> 919<dt><code>| -m68333 | -m68340 | -mcpu32 | -m5200</code></dt> 920<dd><p>Specify what processor in the 68000 family is the target. The default 921is normally the 68020, but this can be changed at configuration time. 922</p> 923</dd> 924<dt><code>-m68881 | -m68882 | -mno-68881 | -mno-68882</code></dt> 925<dd><p>The target machine does (or does not) have a floating-point coprocessor. 926The default is to assume a coprocessor for 68020, 68030, and cpu32. Although 927the basic 68000 is not compatible with the 68881, a combination of the 928two can be specified, since it’s possible to do emulation of the 929coprocessor instructions with the main processor. 930</p> 931</dd> 932<dt><code>-m68851 | -mno-68851</code></dt> 933<dd><p>The target machine does (or does not) have a memory-management 934unit coprocessor. The default is to assume an MMU for 68020 and up. 935</p> 936</dd> 937</dl> 938 939 940<p>See <a href="Nios-II-Options.html#Nios-II-Options">Nios II Options</a>, for the options available when as is configured 941for an Altera Nios II processor. 942</p> 943 944 945<p>For details about the PDP-11 machine dependent features options, 946see <a href="PDP_002d11_002dOptions.html#PDP_002d11_002dOptions">PDP-11-Options</a>. 947</p> 948<dl compact="compact"> 949<dt><code>-mpic | -mno-pic</code></dt> 950<dd><p>Generate position-independent (or position-dependent) code. The 951default is <samp>-mpic</samp>. 952</p> 953</dd> 954<dt><code>-mall</code></dt> 955<dt><code>-mall-extensions</code></dt> 956<dd><p>Enable all instruction set extensions. This is the default. 957</p> 958</dd> 959<dt><code>-mno-extensions</code></dt> 960<dd><p>Disable all instruction set extensions. 961</p> 962</dd> 963<dt><code>-m<var>extension</var> | -mno-<var>extension</var></code></dt> 964<dd><p>Enable (or disable) a particular instruction set extension. 965</p> 966</dd> 967<dt><code>-m<var>cpu</var></code></dt> 968<dd><p>Enable the instruction set extensions supported by a particular CPU, and 969disable all other extensions. 970</p> 971</dd> 972<dt><code>-m<var>machine</var></code></dt> 973<dd><p>Enable the instruction set extensions supported by a particular machine 974model, and disable all other extensions. 975</p></dd> 976</dl> 977 978 979<p>The following options are available when as is configured for 980a picoJava processor. 981</p> 982<dl compact="compact"> 983<dd> 984<a name="index-PJ-endianness"></a> 985<a name="index-endianness_002c-PJ"></a> 986<a name="index-big-endian-output_002c-PJ"></a> 987</dd> 988<dt><code>-mb</code></dt> 989<dd><p>Generate “big endian” format output. 990</p> 991<a name="index-little-endian-output_002c-PJ"></a> 992</dd> 993<dt><code>-ml</code></dt> 994<dd><p>Generate “little endian” format output. 995</p> 996</dd> 997</dl> 998 999 1000<p>See <a href="PRU-Options.html#PRU-Options">PRU Options</a>, for the options available when as is configured 1001for a PRU processor. 1002</p> 1003 1004<p>The following options are available when as is configured for the 1005Motorola 68HC11 or 68HC12 series. 1006</p> 1007<dl compact="compact"> 1008<dt><code>-m68hc11 | -m68hc12 | -m68hcs12 | -mm9s12x | -mm9s12xg</code></dt> 1009<dd><p>Specify what processor is the target. The default is 1010defined by the configuration option when building the assembler. 1011</p> 1012</dd> 1013<dt><code>--xgate-ramoffset</code></dt> 1014<dd><p>Instruct the linker to offset RAM addresses from S12X address space into 1015XGATE address space. 1016</p> 1017</dd> 1018<dt><code>-mshort</code></dt> 1019<dd><p>Specify to use the 16-bit integer ABI. 1020</p> 1021</dd> 1022<dt><code>-mlong</code></dt> 1023<dd><p>Specify to use the 32-bit integer ABI. 1024</p> 1025</dd> 1026<dt><code>-mshort-double</code></dt> 1027<dd><p>Specify to use the 32-bit double ABI. 1028</p> 1029</dd> 1030<dt><code>-mlong-double</code></dt> 1031<dd><p>Specify to use the 64-bit double ABI. 1032</p> 1033</dd> 1034<dt><code>--force-long-branches</code></dt> 1035<dd><p>Relative branches are turned into absolute ones. This concerns 1036conditional branches, unconditional branches and branches to a 1037sub routine. 1038</p> 1039</dd> 1040<dt><code>-S | --short-branches</code></dt> 1041<dd><p>Do not turn relative branches into absolute ones 1042when the offset is out of range. 1043</p> 1044</dd> 1045<dt><code>--strict-direct-mode</code></dt> 1046<dd><p>Do not turn the direct addressing mode into extended addressing mode 1047when the instruction does not support direct addressing mode. 1048</p> 1049</dd> 1050<dt><code>--print-insn-syntax</code></dt> 1051<dd><p>Print the syntax of instruction in case of error. 1052</p> 1053</dd> 1054<dt><code>--print-opcodes</code></dt> 1055<dd><p>Print the list of instructions with syntax and then exit. 1056</p> 1057</dd> 1058<dt><code>--generate-example</code></dt> 1059<dd><p>Print an example of instruction for each possible instruction and then exit. 1060This option is only useful for testing <code>as</code>. 1061</p> 1062</dd> 1063</dl> 1064 1065<p>The following options are available when <code>as</code> is configured 1066for the SPARC architecture: 1067</p> 1068<dl compact="compact"> 1069<dt><code>-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite</code></dt> 1070<dt><code>-Av8plus | -Av8plusa | -Av9 | -Av9a</code></dt> 1071<dd><p>Explicitly select a variant of the SPARC architecture. 1072</p> 1073<p>‘<samp>-Av8plus</samp>’ and ‘<samp>-Av8plusa</samp>’ select a 32 bit environment. 1074‘<samp>-Av9</samp>’ and ‘<samp>-Av9a</samp>’ select a 64 bit environment. 1075</p> 1076<p>‘<samp>-Av8plusa</samp>’ and ‘<samp>-Av9a</samp>’ enable the SPARC V9 instruction set with 1077UltraSPARC extensions. 1078</p> 1079</dd> 1080<dt><code>-xarch=v8plus | -xarch=v8plusa</code></dt> 1081<dd><p>For compatibility with the Solaris v9 assembler. These options are 1082equivalent to -Av8plus and -Av8plusa, respectively. 1083</p> 1084</dd> 1085<dt><code>-bump</code></dt> 1086<dd><p>Warn when the assembler switches to another architecture. 1087</p></dd> 1088</dl> 1089 1090<p>The following options are available when as is configured for the ’c54x 1091architecture. 1092</p> 1093<dl compact="compact"> 1094<dt><code>-mfar-mode</code></dt> 1095<dd><p>Enable extended addressing mode. All addresses and relocations will assume 1096extended addressing (usually 23 bits). 1097</p></dd> 1098<dt><code>-mcpu=<var>CPU_VERSION</var></code></dt> 1099<dd><p>Sets the CPU version being compiled for. 1100</p></dd> 1101<dt><code>-merrors-to-file <var>FILENAME</var></code></dt> 1102<dd><p>Redirect error output to a file, for broken systems which don’t support such 1103behaviour in the shell. 1104</p></dd> 1105</dl> 1106 1107<p>The following options are available when as is configured for 1108a MIPS processor. 1109</p> 1110<dl compact="compact"> 1111<dt><code>-G <var>num</var></code></dt> 1112<dd><p>This option sets the largest size of an object that can be referenced 1113implicitly with the <code>gp</code> register. It is only accepted for targets that 1114use ECOFF format, such as a DECstation running Ultrix. The default value is 8. 1115</p> 1116<a name="index-MIPS-endianness"></a> 1117<a name="index-endianness_002c-MIPS"></a> 1118<a name="index-big-endian-output_002c-MIPS"></a> 1119</dd> 1120<dt><code>-EB</code></dt> 1121<dd><p>Generate “big endian” format output. 1122</p> 1123<a name="index-little-endian-output_002c-MIPS"></a> 1124</dd> 1125<dt><code>-EL</code></dt> 1126<dd><p>Generate “little endian” format output. 1127</p> 1128<a name="index-MIPS-ISA"></a> 1129</dd> 1130<dt><code>-mips1</code></dt> 1131<dt><code>-mips2</code></dt> 1132<dt><code>-mips3</code></dt> 1133<dt><code>-mips4</code></dt> 1134<dt><code>-mips5</code></dt> 1135<dt><code>-mips32</code></dt> 1136<dt><code>-mips32r2</code></dt> 1137<dt><code>-mips32r3</code></dt> 1138<dt><code>-mips32r5</code></dt> 1139<dt><code>-mips32r6</code></dt> 1140<dt><code>-mips64</code></dt> 1141<dt><code>-mips64r2</code></dt> 1142<dt><code>-mips64r3</code></dt> 1143<dt><code>-mips64r5</code></dt> 1144<dt><code>-mips64r6</code></dt> 1145<dd><p>Generate code for a particular MIPS Instruction Set Architecture level. 1146‘<samp>-mips1</samp>’ is an alias for ‘<samp>-march=r3000</samp>’, ‘<samp>-mips2</samp>’ is an 1147alias for ‘<samp>-march=r6000</samp>’, ‘<samp>-mips3</samp>’ is an alias for 1148‘<samp>-march=r4000</samp>’ and ‘<samp>-mips4</samp>’ is an alias for ‘<samp>-march=r8000</samp>’. 1149‘<samp>-mips5</samp>’, ‘<samp>-mips32</samp>’, ‘<samp>-mips32r2</samp>’, ‘<samp>-mips32r3</samp>’, 1150‘<samp>-mips32r5</samp>’, ‘<samp>-mips32r6</samp>’, ‘<samp>-mips64</samp>’, ‘<samp>-mips64r2</samp>’, 1151‘<samp>-mips64r3</samp>’, ‘<samp>-mips64r5</samp>’, and ‘<samp>-mips64r6</samp>’ correspond to generic 1152MIPS V, MIPS32, MIPS32 Release 2, MIPS32 Release 3, MIPS32 Release 5, MIPS32 1153Release 6, MIPS64, MIPS64 Release 2, MIPS64 Release 3, MIPS64 Release 5, and 1154MIPS64 Release 6 ISA processors, respectively. 1155</p> 1156</dd> 1157<dt><code>-march=<var>cpu</var></code></dt> 1158<dd><p>Generate code for a particular MIPS CPU. 1159</p> 1160</dd> 1161<dt><code>-mtune=<var>cpu</var></code></dt> 1162<dd><p>Schedule and tune for a particular MIPS CPU. 1163</p> 1164</dd> 1165<dt><code>-mfix7000</code></dt> 1166<dt><code>-mno-fix7000</code></dt> 1167<dd><p>Cause nops to be inserted if the read of the destination register 1168of an mfhi or mflo instruction occurs in the following two instructions. 1169</p> 1170</dd> 1171<dt><code>-mfix-rm7000</code></dt> 1172<dt><code>-mno-fix-rm7000</code></dt> 1173<dd><p>Cause nops to be inserted if a dmult or dmultu instruction is 1174followed by a load instruction. 1175</p> 1176</dd> 1177<dt><code>-mfix-r5900</code></dt> 1178<dt><code>-mno-fix-r5900</code></dt> 1179<dd><p>Do not attempt to schedule the preceding instruction into the delay slot 1180of a branch instruction placed at the end of a short loop of six 1181instructions or fewer and always schedule a <code>nop</code> instruction there 1182instead. The short loop bug under certain conditions causes loops to 1183execute only once or twice, due to a hardware bug in the R5900 chip. 1184</p> 1185</dd> 1186<dt><code>-mdebug</code></dt> 1187<dt><code>-no-mdebug</code></dt> 1188<dd><p>Cause stabs-style debugging output to go into an ECOFF-style .mdebug 1189section instead of the standard ELF .stabs sections. 1190</p> 1191</dd> 1192<dt><code>-mpdr</code></dt> 1193<dt><code>-mno-pdr</code></dt> 1194<dd><p>Control generation of <code>.pdr</code> sections. 1195</p> 1196</dd> 1197<dt><code>-mgp32</code></dt> 1198<dt><code>-mfp32</code></dt> 1199<dd><p>The register sizes are normally inferred from the ISA and ABI, but these 1200flags force a certain group of registers to be treated as 32 bits wide at 1201all times. ‘<samp>-mgp32</samp>’ controls the size of general-purpose registers 1202and ‘<samp>-mfp32</samp>’ controls the size of floating-point registers. 1203</p> 1204</dd> 1205<dt><code>-mgp64</code></dt> 1206<dt><code>-mfp64</code></dt> 1207<dd><p>The register sizes are normally inferred from the ISA and ABI, but these 1208flags force a certain group of registers to be treated as 64 bits wide at 1209all times. ‘<samp>-mgp64</samp>’ controls the size of general-purpose registers 1210and ‘<samp>-mfp64</samp>’ controls the size of floating-point registers. 1211</p> 1212</dd> 1213<dt><code>-mfpxx</code></dt> 1214<dd><p>The register sizes are normally inferred from the ISA and ABI, but using 1215this flag in combination with ‘<samp>-mabi=32</samp>’ enables an ABI variant 1216which will operate correctly with floating-point registers which are 121732 or 64 bits wide. 1218</p> 1219</dd> 1220<dt><code>-modd-spreg</code></dt> 1221<dt><code>-mno-odd-spreg</code></dt> 1222<dd><p>Enable use of floating-point operations on odd-numbered single-precision 1223registers when supported by the ISA. ‘<samp>-mfpxx</samp>’ implies 1224‘<samp>-mno-odd-spreg</samp>’, otherwise the default is ‘<samp>-modd-spreg</samp>’. 1225</p> 1226</dd> 1227<dt><code>-mips16</code></dt> 1228<dt><code>-no-mips16</code></dt> 1229<dd><p>Generate code for the MIPS 16 processor. This is equivalent to putting 1230<code>.module mips16</code> at the start of the assembly file. ‘<samp>-no-mips16</samp>’ 1231turns off this option. 1232</p> 1233</dd> 1234<dt><code>-mmips16e2</code></dt> 1235<dt><code>-mno-mips16e2</code></dt> 1236<dd><p>Enable the use of MIPS16e2 instructions in MIPS16 mode. This is equivalent 1237to putting <code>.module mips16e2</code> at the start of the assembly file. 1238‘<samp>-mno-mips16e2</samp>’ turns off this option. 1239</p> 1240</dd> 1241<dt><code>-mmicromips</code></dt> 1242<dt><code>-mno-micromips</code></dt> 1243<dd><p>Generate code for the microMIPS processor. This is equivalent to putting 1244<code>.module micromips</code> at the start of the assembly file. 1245‘<samp>-mno-micromips</samp>’ turns off this option. This is equivalent to putting 1246<code>.module nomicromips</code> at the start of the assembly file. 1247</p> 1248</dd> 1249<dt><code>-msmartmips</code></dt> 1250<dt><code>-mno-smartmips</code></dt> 1251<dd><p>Enables the SmartMIPS extension to the MIPS32 instruction set. This is 1252equivalent to putting <code>.module smartmips</code> at the start of the assembly 1253file. ‘<samp>-mno-smartmips</samp>’ turns off this option. 1254</p> 1255</dd> 1256<dt><code>-mips3d</code></dt> 1257<dt><code>-no-mips3d</code></dt> 1258<dd><p>Generate code for the MIPS-3D Application Specific Extension. 1259This tells the assembler to accept MIPS-3D instructions. 1260‘<samp>-no-mips3d</samp>’ turns off this option. 1261</p> 1262</dd> 1263<dt><code>-mdmx</code></dt> 1264<dt><code>-no-mdmx</code></dt> 1265<dd><p>Generate code for the MDMX Application Specific Extension. 1266This tells the assembler to accept MDMX instructions. 1267‘<samp>-no-mdmx</samp>’ turns off this option. 1268</p> 1269</dd> 1270<dt><code>-mdsp</code></dt> 1271<dt><code>-mno-dsp</code></dt> 1272<dd><p>Generate code for the DSP Release 1 Application Specific Extension. 1273This tells the assembler to accept DSP Release 1 instructions. 1274‘<samp>-mno-dsp</samp>’ turns off this option. 1275</p> 1276</dd> 1277<dt><code>-mdspr2</code></dt> 1278<dt><code>-mno-dspr2</code></dt> 1279<dd><p>Generate code for the DSP Release 2 Application Specific Extension. 1280This option implies ‘<samp>-mdsp</samp>’. 1281This tells the assembler to accept DSP Release 2 instructions. 1282‘<samp>-mno-dspr2</samp>’ turns off this option. 1283</p> 1284</dd> 1285<dt><code>-mdspr3</code></dt> 1286<dt><code>-mno-dspr3</code></dt> 1287<dd><p>Generate code for the DSP Release 3 Application Specific Extension. 1288This option implies ‘<samp>-mdsp</samp>’ and ‘<samp>-mdspr2</samp>’. 1289This tells the assembler to accept DSP Release 3 instructions. 1290‘<samp>-mno-dspr3</samp>’ turns off this option. 1291</p> 1292</dd> 1293<dt><code>-mmsa</code></dt> 1294<dt><code>-mno-msa</code></dt> 1295<dd><p>Generate code for the MIPS SIMD Architecture Extension. 1296This tells the assembler to accept MSA instructions. 1297‘<samp>-mno-msa</samp>’ turns off this option. 1298</p> 1299</dd> 1300<dt><code>-mxpa</code></dt> 1301<dt><code>-mno-xpa</code></dt> 1302<dd><p>Generate code for the MIPS eXtended Physical Address (XPA) Extension. 1303This tells the assembler to accept XPA instructions. 1304‘<samp>-mno-xpa</samp>’ turns off this option. 1305</p> 1306</dd> 1307<dt><code>-mmt</code></dt> 1308<dt><code>-mno-mt</code></dt> 1309<dd><p>Generate code for the MT Application Specific Extension. 1310This tells the assembler to accept MT instructions. 1311‘<samp>-mno-mt</samp>’ turns off this option. 1312</p> 1313</dd> 1314<dt><code>-mmcu</code></dt> 1315<dt><code>-mno-mcu</code></dt> 1316<dd><p>Generate code for the MCU Application Specific Extension. 1317This tells the assembler to accept MCU instructions. 1318‘<samp>-mno-mcu</samp>’ turns off this option. 1319</p> 1320</dd> 1321<dt><code>-mcrc</code></dt> 1322<dt><code>-mno-crc</code></dt> 1323<dd><p>Generate code for the MIPS cyclic redundancy check (CRC) Application 1324Specific Extension. This tells the assembler to accept CRC instructions. 1325‘<samp>-mno-crc</samp>’ turns off this option. 1326</p> 1327</dd> 1328<dt><code>-mginv</code></dt> 1329<dt><code>-mno-ginv</code></dt> 1330<dd><p>Generate code for the Global INValidate (GINV) Application Specific 1331Extension. This tells the assembler to accept GINV instructions. 1332‘<samp>-mno-ginv</samp>’ turns off this option. 1333</p> 1334</dd> 1335<dt><code>-mloongson-mmi</code></dt> 1336<dt><code>-mno-loongson-mmi</code></dt> 1337<dd><p>Generate code for the Loongson MultiMedia extensions Instructions (MMI) 1338Application Specific Extension. This tells the assembler to accept MMI 1339instructions. 1340‘<samp>-mno-loongson-mmi</samp>’ turns off this option. 1341</p> 1342</dd> 1343<dt><code>-mloongson-cam</code></dt> 1344<dt><code>-mno-loongson-cam</code></dt> 1345<dd><p>Generate code for the Loongson Content Address Memory (CAM) instructions. 1346This tells the assembler to accept Loongson CAM instructions. 1347‘<samp>-mno-loongson-cam</samp>’ turns off this option. 1348</p> 1349</dd> 1350<dt><code>-mloongson-ext</code></dt> 1351<dt><code>-mno-loongson-ext</code></dt> 1352<dd><p>Generate code for the Loongson EXTensions (EXT) instructions. 1353This tells the assembler to accept Loongson EXT instructions. 1354‘<samp>-mno-loongson-ext</samp>’ turns off this option. 1355</p> 1356</dd> 1357<dt><code>-mloongson-ext2</code></dt> 1358<dt><code>-mno-loongson-ext2</code></dt> 1359<dd><p>Generate code for the Loongson EXTensions R2 (EXT2) instructions. 1360This option implies ‘<samp>-mloongson-ext</samp>’. 1361This tells the assembler to accept Loongson EXT2 instructions. 1362‘<samp>-mno-loongson-ext2</samp>’ turns off this option. 1363</p> 1364</dd> 1365<dt><code>-minsn32</code></dt> 1366<dt><code>-mno-insn32</code></dt> 1367<dd><p>Only use 32-bit instruction encodings when generating code for the 1368microMIPS processor. This option inhibits the use of any 16-bit 1369instructions. This is equivalent to putting <code>.set insn32</code> at 1370the start of the assembly file. ‘<samp>-mno-insn32</samp>’ turns off this 1371option. This is equivalent to putting <code>.set noinsn32</code> at the 1372start of the assembly file. By default ‘<samp>-mno-insn32</samp>’ is 1373selected, allowing all instructions to be used. 1374</p> 1375</dd> 1376<dt><code>--construct-floats</code></dt> 1377<dt><code>--no-construct-floats</code></dt> 1378<dd><p>The ‘<samp>--no-construct-floats</samp>’ option disables the construction of 1379double width floating point constants by loading the two halves of the 1380value into the two single width floating point registers that make up 1381the double width register. By default ‘<samp>--construct-floats</samp>’ is 1382selected, allowing construction of these floating point constants. 1383</p> 1384</dd> 1385<dt><code>--relax-branch</code></dt> 1386<dt><code>--no-relax-branch</code></dt> 1387<dd><p>The ‘<samp>--relax-branch</samp>’ option enables the relaxation of out-of-range 1388branches. By default ‘<samp>--no-relax-branch</samp>’ is selected, causing any 1389out-of-range branches to produce an error. 1390</p> 1391</dd> 1392<dt><code>-mignore-branch-isa</code></dt> 1393<dt><code>-mno-ignore-branch-isa</code></dt> 1394<dd><p>Ignore branch checks for invalid transitions between ISA modes. The 1395semantics of branches does not provide for an ISA mode switch, so in 1396most cases the ISA mode a branch has been encoded for has to be the 1397same as the ISA mode of the branch’s target label. Therefore GAS has 1398checks implemented that verify in branch assembly that the two ISA 1399modes match. ‘<samp>-mignore-branch-isa</samp>’ disables these checks. By 1400default ‘<samp>-mno-ignore-branch-isa</samp>’ is selected, causing any invalid 1401branch requiring a transition between ISA modes to produce an error. 1402</p> 1403</dd> 1404<dt><code>-mnan=<var>encoding</var></code></dt> 1405<dd><p>Select between the IEEE 754-2008 (<samp>-mnan=2008</samp>) or the legacy 1406(<samp>-mnan=legacy</samp>) NaN encoding format. The latter is the default. 1407</p> 1408<a name="index-emulation"></a> 1409</dd> 1410<dt><code>--emulation=<var>name</var></code></dt> 1411<dd><p>This option was formerly used to switch between ELF and ECOFF output 1412on targets like IRIX 5 that supported both. MIPS ECOFF support was 1413removed in GAS 2.24, so the option now serves little purpose. 1414It is retained for backwards compatibility. 1415</p> 1416<p>The available configuration names are: ‘<samp>mipself</samp>’, ‘<samp>mipslelf</samp>’ and 1417‘<samp>mipsbelf</samp>’. Choosing ‘<samp>mipself</samp>’ now has no effect, since the output 1418is always ELF. ‘<samp>mipslelf</samp>’ and ‘<samp>mipsbelf</samp>’ select little- and 1419big-endian output respectively, but ‘<samp>-EL</samp>’ and ‘<samp>-EB</samp>’ are now the 1420preferred options instead. 1421</p> 1422</dd> 1423<dt><code>-nocpp</code></dt> 1424<dd><p><code>as</code> ignores this option. It is accepted for compatibility with 1425the native tools. 1426</p> 1427</dd> 1428<dt><code>--trap</code></dt> 1429<dt><code>--no-trap</code></dt> 1430<dt><code>--break</code></dt> 1431<dt><code>--no-break</code></dt> 1432<dd><p>Control how to deal with multiplication overflow and division by zero. 1433‘<samp>--trap</samp>’ or ‘<samp>--no-break</samp>’ (which are synonyms) take a trap exception 1434(and only work for Instruction Set Architecture level 2 and higher); 1435‘<samp>--break</samp>’ or ‘<samp>--no-trap</samp>’ (also synonyms, and the default) take a 1436break exception. 1437</p> 1438</dd> 1439<dt><code>-n</code></dt> 1440<dd><p>When this option is used, <code>as</code> will issue a warning every 1441time it generates a nop instruction from a macro. 1442</p></dd> 1443</dl> 1444 1445<p>The following options are available when as is configured for 1446an MCore processor. 1447</p> 1448<dl compact="compact"> 1449<dt><code>-jsri2bsr</code></dt> 1450<dt><code>-nojsri2bsr</code></dt> 1451<dd><p>Enable or disable the JSRI to BSR transformation. By default this is enabled. 1452The command-line option ‘<samp>-nojsri2bsr</samp>’ can be used to disable it. 1453</p> 1454</dd> 1455<dt><code>-sifilter</code></dt> 1456<dt><code>-nosifilter</code></dt> 1457<dd><p>Enable or disable the silicon filter behaviour. By default this is disabled. 1458The default can be overridden by the ‘<samp>-sifilter</samp>’ command-line option. 1459</p> 1460</dd> 1461<dt><code>-relax</code></dt> 1462<dd><p>Alter jump instructions for long displacements. 1463</p> 1464</dd> 1465<dt><code>-mcpu=[210|340]</code></dt> 1466<dd><p>Select the cpu type on the target hardware. This controls which instructions 1467can be assembled. 1468</p> 1469</dd> 1470<dt><code>-EB</code></dt> 1471<dd><p>Assemble for a big endian target. 1472</p> 1473</dd> 1474<dt><code>-EL</code></dt> 1475<dd><p>Assemble for a little endian target. 1476</p> 1477</dd> 1478</dl> 1479 1480 1481<p>See <a href="Meta-Options.html#Meta-Options">Meta Options</a>, for the options available when as is configured 1482for a Meta processor. 1483</p> 1484 1485 1486<p>See the info pages for documentation of the MMIX-specific options. 1487</p> 1488 1489<p>See <a href="NDS32-Options.html#NDS32-Options">NDS32 Options</a>, for the options available when as is configured 1490for a NDS32 processor. 1491</p> 1492 1493 1494<p>See <a href="PowerPC_002dOpts.html#PowerPC_002dOpts">PowerPC-Opts</a>, for the options available when as is configured 1495for a PowerPC processor. 1496</p> 1497 1498 1499 1500<p>See <a href="RISC_002dV_002dOptions.html#RISC_002dV_002dOptions">RISC-V-Options</a>, for the options available when as is configured 1501for a RISC-V processor. 1502</p> 1503 1504 1505<p>See the info pages for documentation of the RX-specific options. 1506</p> 1507<p>The following options are available when as is configured for the s390 1508processor family. 1509</p> 1510<dl compact="compact"> 1511<dt><code>-m31</code></dt> 1512<dt><code>-m64</code></dt> 1513<dd><p>Select the word size, either 31/32 bits or 64 bits. 1514</p></dd> 1515<dt><code>-mesa</code></dt> 1516<dt><code>-mzarch</code></dt> 1517<dd><p>Select the architecture mode, either the Enterprise System 1518Architecture (esa) or the z/Architecture mode (zarch). 1519</p></dd> 1520<dt><code>-march=<var>processor</var></code></dt> 1521<dd><p>Specify which s390 processor variant is the target, ‘<samp>g5</samp>’ (or 1522‘<samp>arch3</samp>’), ‘<samp>g6</samp>’, ‘<samp>z900</samp>’ (or ‘<samp>arch5</samp>’), ‘<samp>z990</samp>’ (or 1523‘<samp>arch6</samp>’), ‘<samp>z9-109</samp>’, ‘<samp>z9-ec</samp>’ (or ‘<samp>arch7</samp>’), ‘<samp>z10</samp>’ (or 1524‘<samp>arch8</samp>’), ‘<samp>z196</samp>’ (or ‘<samp>arch9</samp>’), ‘<samp>zEC12</samp>’ (or ‘<samp>arch10</samp>’), 1525‘<samp>z13</samp>’ (or ‘<samp>arch11</samp>’), ‘<samp>z14</samp>’ (or ‘<samp>arch12</samp>’), or ‘<samp>z15</samp>’ 1526(or ‘<samp>arch13</samp>’). 1527</p></dd> 1528<dt><code>-mregnames</code></dt> 1529<dt><code>-mno-regnames</code></dt> 1530<dd><p>Allow or disallow symbolic names for registers. 1531</p></dd> 1532<dt><code>-mwarn-areg-zero</code></dt> 1533<dd><p>Warn whenever the operand for a base or index register has been specified 1534but evaluates to zero. 1535</p></dd> 1536</dl> 1537 1538 1539<p>See <a href="TIC6X-Options.html#TIC6X-Options">TIC6X Options</a>, for the options available when as is configured 1540for a TMS320C6000 processor. 1541</p> 1542 1543 1544 1545<p>See <a href="TILE_002dGx-Options.html#TILE_002dGx-Options">TILE-Gx Options</a>, for the options available when as is configured 1546for a TILE-Gx processor. 1547</p> 1548 1549 1550 1551<p>See <a href="Visium-Options.html#Visium-Options">Visium Options</a>, for the options available when as is configured 1552for a Visium processor. 1553</p> 1554 1555 1556 1557<p>See <a href="Xtensa-Options.html#Xtensa-Options">Xtensa Options</a>, for the options available when as is configured 1558for an Xtensa processor. 1559</p> 1560 1561 1562 1563<p>See <a href="Z80-Options.html#Z80-Options">Z80 Options</a>, for the options available when as is configured 1564for an Z80 processor. 1565</p> 1566 1567 1568<table class="menu" border="0" cellspacing="0"> 1569<tr><td align="left" valign="top">• <a href="Manual.html#Manual" accesskey="1">Manual</a>:</td><td> </td><td align="left" valign="top">Structure of this Manual 1570</td></tr> 1571<tr><td align="left" valign="top">• <a href="GNU-Assembler.html#GNU-Assembler" accesskey="2">GNU Assembler</a>:</td><td> </td><td align="left" valign="top">The GNU Assembler 1572</td></tr> 1573<tr><td align="left" valign="top">• <a href="Object-Formats.html#Object-Formats" accesskey="3">Object Formats</a>:</td><td> </td><td align="left" valign="top">Object File Formats 1574</td></tr> 1575<tr><td align="left" valign="top">• <a href="Command-Line.html#Command-Line" accesskey="4">Command Line</a>:</td><td> </td><td align="left" valign="top">Command Line 1576</td></tr> 1577<tr><td align="left" valign="top">• <a href="Input-Files.html#Input-Files" accesskey="5">Input Files</a>:</td><td> </td><td align="left" valign="top">Input Files 1578</td></tr> 1579<tr><td align="left" valign="top">• <a href="Object.html#Object" accesskey="6">Object</a>:</td><td> </td><td align="left" valign="top">Output (Object) File 1580</td></tr> 1581<tr><td align="left" valign="top">• <a href="Errors.html#Errors" accesskey="7">Errors</a>:</td><td> </td><td align="left" valign="top">Error and Warning Messages 1582</td></tr> 1583</table> 1584 1585<hr> 1586<div class="header"> 1587<p> 1588Next: <a href="Invoking.html#Invoking" accesskey="n" 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