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<a name="MSP430-Options"></a>
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<p>
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<hr>
<a name="Options-15"></a>
<h4 class="subsection">9.29.1 Options</h4>
<a name="index-MSP-430-options-_0028none_0029"></a>
<a name="index-options-for-MSP430-_0028none_0029"></a>
<dl compact="compact">
<dt><code>-mmcu</code></dt>
<dd><p>selects the mcu architecture.  If the architecture is 430Xv2 then this
also enables NOP generation unless the <samp>-mN</samp> is also specified.
</p>
</dd>
<dt><code>-mcpu</code></dt>
<dd><p>selects the cpu architecture.  If the architecture is 430Xv2 then this
also enables NOP generation unless the <samp>-mN</samp> is also specified.
</p>
</dd>
<dt><code>-msilicon-errata=<var>name</var>[,<var>name</var>&hellip;]</code></dt>
<dd><p>Implements a fixup for named silicon errata.  Multiple silicon errata
can be specified by multiple uses of the <samp>-msilicon-errata</samp>
option and/or by including the errata names, separated by commas, on
an individual <samp>-msilicon-errata</samp> option.  Errata names
currently recognised by the assembler are:
</p>
<dl compact="compact">
<dt><code>cpu4</code></dt>
<dd><p><code>PUSH #4</code> and <samp>PUSH #8</samp> need longer encodings on the
MSP430.  This option is enabled by default, and cannot be disabled.
</p></dd>
<dt><code>cpu8</code></dt>
<dd><p>Do not set the <code>SP</code> to an odd value.
</p></dd>
<dt><code>cpu11</code></dt>
<dd><p>Do not update the <code>SR</code> and the <code>PC</code> in the same instruction.
</p></dd>
<dt><code>cpu12</code></dt>
<dd><p>Do not use the <code>PC</code> in a <code>CMP</code> or <code>BIT</code> instruction.
</p></dd>
<dt><code>cpu13</code></dt>
<dd><p>Do not use an arithmetic instruction to modify the <code>SR</code>.
</p></dd>
<dt><code>cpu19</code></dt>
<dd><p>Insert <code>NOP</code> after <code>CPUOFF</code>.
</p></dd>
</dl>

</dd>
<dt><code>-msilicon-errata-warn=<var>name</var>[,<var>name</var>&hellip;]</code></dt>
<dd><p>Like the <samp>-msilicon-errata</samp> option except that instead of
fixing the specified errata, a warning message is issued instead.
This option can be used alongside <samp>-msilicon-errata</samp> to
generate messages whenever a problem is fixed, or on its own in order
to inspect code for potential problems.
</p>
</dd>
<dt><code>-mP</code></dt>
<dd><p>enables polymorph instructions handler.
</p>
</dd>
<dt><code>-mQ</code></dt>
<dd><p>enables relaxation at assembly time. DANGEROUS!
</p>
</dd>
<dt><code>-ml</code></dt>
<dd><p>indicates that the input uses the large code model.
</p>
</dd>
<dt><code>-mn</code></dt>
<dd><p>enables the generation of a NOP instruction following any instruction
that might change the interrupts enabled/disabled state.  The
pipelined nature of the MSP430 core means that any instruction that
changes the interrupt state (<code>EINT</code>, <code>DINT</code>, <code>BIC #8,
SR</code>, <code>BIS #8, SR</code> or <code>MOV.W &lt;&gt;, SR</code>) must be
followed by a NOP instruction in order to ensure the correct
processing of interrupts.  By default it is up to the programmer to
supply these NOP instructions, but this command-line option enables
the automatic insertion by the assembler, if they are missing.
</p>
</dd>
<dt><code>-mN</code></dt>
<dd><p>disables the generation of a NOP instruction following any instruction
that might change the interrupts enabled/disabled state.  This is the
default behaviour.
</p>
</dd>
<dt><code>-my</code></dt>
<dd><p>tells the assembler to generate a warning message if a NOP does not
immediately follow an instruction that enables or disables
interrupts.  This is the default.
</p>
<p>Note that this option can be stacked with the <samp>-mn</samp> option so
that the assembler will both warn about missing NOP instructions and
then insert them automatically.
</p>
</dd>
<dt><code>-mY</code></dt>
<dd><p>disables warnings about missing NOP instructions.
</p>
</dd>
<dt><code>-md</code></dt>
<dd><p>mark the object file as one that requires data to copied from ROM to
RAM at execution startup.  Disabled by default.
</p>
</dd>
<dt><code>-mdata-region=<var>region</var></code></dt>
<dd><p>Select the region data will be placed in.
Region placement is performed by the compiler and linker.  The only effect this
option will have on the assembler is that if <var>upper</var> or <var>either</var> is
selected, then the symbols to initialise high data and bss will be defined.
Valid <var>region</var> values are:
</p><dl compact="compact">
<dt><code>none</code></dt>
<dt><code>lower</code></dt>
<dt><code>upper</code></dt>
<dt><code>either</code></dt>
</dl>

</dd>
</dl>

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