1<!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> 2<html> 3<!-- This file documents the GNU Assembler "as". 4 5Copyright (C) 1991-2021 Free Software Foundation, Inc. 6 7Permission is granted to copy, distribute and/or modify this document 8under the terms of the GNU Free Documentation License, Version 1.3 9or any later version published by the Free Software Foundation; 10with no Invariant Sections, with no Front-Cover Texts, and with no 11Back-Cover Texts. A copy of the license is included in the 12section entitled "GNU Free Documentation License". 13 --> 14<!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ --> 15<head> 16<title>Using as: ARM Opcodes</title> 17 18<meta name="description" content="Using as: ARM Opcodes"> 19<meta name="keywords" content="Using as: ARM Opcodes"> 20<meta name="resource-type" content="document"> 21<meta name="distribution" content="global"> 22<meta name="Generator" content="makeinfo"> 23<meta http-equiv="Content-Type" content="text/html; charset=utf-8"> 24<link href="index.html#Top" rel="start" title="Top"> 25<link href="AS-Index.html#AS-Index" rel="index" title="AS Index"> 26<link href="index.html#SEC_Contents" rel="contents" title="Table of Contents"> 27<link href="ARM_002dDependent.html#ARM_002dDependent" rel="up" title="ARM-Dependent"> 28<link href="ARM-Mapping-Symbols.html#ARM-Mapping-Symbols" rel="next" title="ARM Mapping Symbols"> 29<link href="ARM-Directives.html#ARM-Directives" rel="previous" title="ARM Directives"> 30<style type="text/css"> 31<!-- 32a.summary-letter {text-decoration: none} 33blockquote.smallquotation {font-size: smaller} 34div.display {margin-left: 3.2em} 35div.example {margin-left: 3.2em} 36div.indentedblock {margin-left: 3.2em} 37div.lisp {margin-left: 3.2em} 38div.smalldisplay {margin-left: 3.2em} 39div.smallexample {margin-left: 3.2em} 40div.smallindentedblock {margin-left: 3.2em; font-size: smaller} 41div.smalllisp {margin-left: 3.2em} 42kbd {font-style:oblique} 43pre.display {font-family: inherit} 44pre.format {font-family: inherit} 45pre.menu-comment {font-family: serif} 46pre.menu-preformatted {font-family: serif} 47pre.smalldisplay {font-family: inherit; font-size: smaller} 48pre.smallexample {font-size: smaller} 49pre.smallformat {font-family: inherit; font-size: smaller} 50pre.smalllisp {font-size: smaller} 51span.nocodebreak {white-space:nowrap} 52span.nolinebreak {white-space:nowrap} 53span.roman {font-family:serif; font-weight:normal} 54span.sansserif {font-family:sans-serif; font-weight:normal} 55ul.no-bullet {list-style: none} 56--> 57</style> 58 59 60</head> 61 62<body lang="en" bgcolor="#FFFFFF" text="#000000" link="#0000FF" vlink="#800080" alink="#FF0000"> 63<a name="ARM-Opcodes"></a> 64<div class="header"> 65<p> 66Next: <a href="ARM-Mapping-Symbols.html#ARM-Mapping-Symbols" accesskey="n" rel="next">ARM Mapping Symbols</a>, Previous: <a href="ARM-Directives.html#ARM-Directives" accesskey="p" rel="previous">ARM Directives</a>, Up: <a href="ARM_002dDependent.html#ARM_002dDependent" accesskey="u" rel="up">ARM-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> 67</div> 68<hr> 69<a name="Opcodes-3"></a> 70<h4 class="subsection">9.4.5 Opcodes</h4> 71 72<a name="index-ARM-opcodes"></a> 73<a name="index-opcodes-for-ARM"></a> 74<p><code>as</code> implements all the standard ARM opcodes. It also 75implements several pseudo opcodes, including several synthetic load 76instructions. 77</p> 78<dl compact="compact"> 79<dd> 80<a name="index-NOP-pseudo-op_002c-ARM"></a> 81</dd> 82<dt><code>NOP</code></dt> 83<dd><div class="smallexample"> 84<pre class="smallexample"> nop 85</pre></div> 86 87<p>This pseudo op will always evaluate to a legal ARM instruction that does 88nothing. Currently it will evaluate to MOV r0, r0. 89</p> 90<a name="index-LDR-reg_002c_003d_003clabel_003e-pseudo-op_002c-ARM"></a> 91</dd> 92<dt><code>LDR</code></dt> 93<dd><div class="smallexample"> 94<pre class="smallexample"> ldr <register> , = <expression> 95</pre></div> 96 97<p>If expression evaluates to a numeric constant then a MOV or MVN 98instruction will be used in place of the LDR instruction, if the 99constant can be generated by either of these instructions. Otherwise 100the constant will be placed into the nearest literal pool (if it not 101already there) and a PC relative LDR instruction will be generated. 102</p> 103<a name="index-ADR-reg_002c_003clabel_003e-pseudo-op_002c-ARM"></a> 104</dd> 105<dt><code>ADR</code></dt> 106<dd><div class="smallexample"> 107<pre class="smallexample"> adr <register> <label> 108</pre></div> 109 110<p>This instruction will load the address of <var>label</var> into the indicated 111register. The instruction will evaluate to a PC relative ADD or SUB 112instruction depending upon where the label is located. If the label is 113out of range, or if it is not defined in the same file (and section) as 114the ADR instruction, then an error will be generated. This instruction 115will not make use of the literal pool. 116</p> 117<p>If <var>label</var> is a thumb function symbol, and thumb interworking has 118been enabled via the <samp>-mthumb-interwork</samp> option then the bottom 119bit of the value stored into <var>register</var> will be set. This allows 120the following sequence to work as expected: 121</p> 122<div class="smallexample"> 123<pre class="smallexample"> adr r0, thumb_function 124 blx r0 125</pre></div> 126 127<a name="index-ADRL-reg_002c_003clabel_003e-pseudo-op_002c-ARM"></a> 128</dd> 129<dt><code>ADRL</code></dt> 130<dd><div class="smallexample"> 131<pre class="smallexample"> adrl <register> <label> 132</pre></div> 133 134<p>This instruction will load the address of <var>label</var> into the indicated 135register. The instruction will evaluate to one or two PC relative ADD 136or SUB instructions depending upon where the label is located. If a 137second instruction is not needed a NOP instruction will be generated in 138its place, so that this instruction is always 8 bytes long. 139</p> 140<p>If the label is out of range, or if it is not defined in the same file 141(and section) as the ADRL instruction, then an error will be generated. 142This instruction will not make use of the literal pool. 143</p> 144<p>If <var>label</var> is a thumb function symbol, and thumb interworking has 145been enabled via the <samp>-mthumb-interwork</samp> option then the bottom 146bit of the value stored into <var>register</var> will be set. 147</p> 148</dd> 149</dl> 150 151<p>For information on the ARM or Thumb instruction sets, see <cite>ARM 152Software Development Toolkit Reference Manual</cite>, Advanced RISC Machines 153Ltd. 154</p> 155<hr> 156<div class="header"> 157<p> 158Next: <a href="ARM-Mapping-Symbols.html#ARM-Mapping-Symbols" accesskey="n" rel="next">ARM Mapping Symbols</a>, Previous: <a href="ARM-Directives.html#ARM-Directives" accesskey="p" rel="previous">ARM Directives</a>, Up: <a href="ARM_002dDependent.html#ARM_002dDependent" accesskey="u" rel="up">ARM-Dependent</a> [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="AS-Index.html#AS-Index" title="Index" rel="index">Index</a>]</p> 159</div> 160 161 162 163</body> 164</html> 165