1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * es8326.c -- es8326 ALSA SoC audio driver
4 *
5 * Copyright (c) 2021 Everest Semiconductor Co Ltd.
6 * Copyright (c) 2021 Rockchip Electronics Co. Ltd.
7 *
8 * Author: David <zhuning@everset-semi.com>
9 * Author: Xing Zheng <zhengxing@rock-chips.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/init.h>
19 #include <linux/clk.h>
20 #include <linux/delay.h>
21 #include <linux/pm.h>
22 #include <linux/i2c.h>
23 #include <linux/platform_device.h>
24 #include <linux/slab.h>
25 #include <linux/of_gpio.h>
26 #include <sound/core.h>
27 #include <sound/pcm.h>
28 #include <sound/pcm_params.h>
29 #include <sound/tlv.h>
30 #include <sound/soc.h>
31 #include <sound/soc-dapm.h>
32 #include <sound/initval.h>
33 #include <linux/proc_fs.h>
34 #include <linux/gpio.h>
35 #include <linux/interrupt.h>
36 #include <linux/irq.h>
37 #include <sound/jack.h>
38
39 #include "es8326.h"
40
41 #define ES8326_CODEC_SET_SPK 1
42 #define ES8326_CODEC_SET_HP 2
43
44 #define ES8326_LRCK 48000
45
46 /* codec private data */
47 struct es8326_priv {
48 struct clk *mclk;
49 struct snd_pcm_hw_constraint_list *sysclk_constraints;
50 struct i2c_client *i2c;
51 struct regmap *regmap;
52 struct snd_soc_component *component;
53 struct gpio_desc *hp_ctl_gpio;
54 struct gpio_desc *spk_ctl_gpio;
55 struct snd_soc_jack *jack;
56 struct delayed_work hpdet_work;
57 struct mutex lock;
58 int irq;
59 u8 mic1_src;
60 u8 mic2_src;
61 u8 jack_pol;
62 u32 mclk_rate;
63 bool mastermode;
64 bool hp_inserted;
65 };
66
67 /*
68 * es8326 register cache
69 * We can't read the es8326 register space when we
70 * are using 2 wire for device control, so we cache them instead.
71 */
72 static const struct reg_default es8326_reg_defaults[] = {
73 {0x00, 0x03}, {0x01, 0x03}, {0x02, 0x00}, {0x03, 0x20},
74 {0x04, 0x11}, {0x05, 0x00}, {0x06, 0x11}, {0x07, 0x00},
75 {0x08, 0x00}, {0x09, 0x01}, {0x0a, 0x00}, {0x0b, 0x00},
76 {0x0c, 0xf8}, {0x0d, 0x3f}, {0x0e, 0x00}, {0x0f, 0x00},
77 {0x10, 0x01}, {0x11, 0xfc}, {0x12, 0x28}, {0x13, 0x00},
78 {0x14, 0x00}, {0x15, 0x33}, {0x16, 0x00}, {0x17, 0x00},
79 {0x18, 0x88}, {0x19, 0x06}, {0x1a, 0x22}, {0x1b, 0x03},
80 {0x1c, 0x0f}, {0x1d, 0x00}, {0x1e, 0x80}, {0x1f, 0x80},
81 {0x20, 0x00}, {0x21, 0x00}, {0x22, 0xc0}, {0x23, 0x00},
82 {0x24, 0x01}, {0x25, 0x08}, {0x26, 0x10}, {0x27, 0xc0},
83 {0x28, 0x00}, {0x29, 0x1c}, {0x2a, 0x00}, {0x2b, 0xb0},
84 {0x2c, 0x32}, {0x2d, 0x03}, {0x2e, 0x00}, {0x2f, 0x11},
85 {0x30, 0x10}, {0x31, 0x00}, {0x32, 0x00}, {0x33, 0xc0},
86 {0x34, 0xc0}, {0x35, 0x1f}, {0x36, 0xf7}, {0x37, 0xfd},
87 {0x38, 0xff}, {0x39, 0x1f}, {0x3a, 0xf7}, {0x3b, 0xfd},
88 {0x3c, 0xff}, {0x3d, 0x1f}, {0x3e, 0xf7}, {0x3f, 0xfd},
89 {0x40, 0xff}, {0x41, 0x1f}, {0x42, 0xf7}, {0x43, 0xfd},
90 {0x44, 0xff}, {0x45, 0x1f}, {0x46, 0xf7}, {0x47, 0xfd},
91 {0x48, 0xff}, {0x49, 0x1f}, {0x4a, 0xf7}, {0x4b, 0xfd},
92 {0x4c, 0xff}, {0x4d, 0x00}, {0x4e, 0x00}, {0x4f, 0xff},
93 {0x50, 0x00}, {0x51, 0x00}, {0x52, 0x00}, {0x53, 0x00},
94 {0x54, 0x00}, {0x55, 0x00}, {0x56, 0x00}, {0x57, 0x1f},
95 {0x58, 0x00}, {0x59, 0x00}, {0x5a, 0x00}, {0x5b, 0x00},
96 {0x5c, 0x00}, {0xf9, 0x00}, {0xfa, 0x00}, {0xfb, 0x00},
97 {0xfc, 0x00}, {0xfd, 0x00}, {0xfe, 0x00}, {0xff, 0x00},
98 };
99
es8326_set_gpio(struct es8326_priv * es8326,int gpio,bool level)100 static int es8326_set_gpio(struct es8326_priv *es8326, int gpio, bool level)
101 {
102 if (!es8326)
103 return 0;
104
105 if ((gpio & ES8326_CODEC_SET_SPK) && es8326->spk_ctl_gpio)
106 gpiod_set_value(es8326->spk_ctl_gpio, level);
107
108 if ((gpio & ES8326_CODEC_SET_HP) && es8326->hp_ctl_gpio)
109 gpiod_set_value(es8326->hp_ctl_gpio, level);
110
111 return 0;
112 }
113
es8326_hpdetect_work(struct work_struct * work)114 static void es8326_hpdetect_work(struct work_struct *work)
115 {
116 struct es8326_priv *es8326 =
117 container_of(work, struct es8326_priv, hpdet_work.work);
118 struct device *dev = es8326->component->dev;
119 unsigned int iface;
120
121 mutex_lock(&es8326->lock);
122 if (!es8326->jack)
123 goto out;
124
125 snd_soc_component_write(es8326->component, 0x1b, 0x7c);
126 msleep(200);
127
128 iface = snd_soc_component_read(es8326->component, 0xfb);
129 dev_dbg(dev, "%s fb=%#04x\n", __func__, iface);
130
131 if ((iface & 0x02) == 0) {
132 dev_dbg(dev, "No headset detected");
133
134 snd_soc_jack_report(es8326->jack, 0, SND_JACK_HEADSET);
135 snd_soc_component_write(es8326->component, ES8326_ADC1_SRC_2A,
136 es8326->mic2_src);
137
138 es8326_set_gpio(es8326, ES8326_CODEC_SET_SPK, 1);
139 es8326_set_gpio(es8326, ES8326_CODEC_SET_HP, 1);
140 es8326->hp_inserted = 0;
141 } else if ((iface & 0x02) == 0x02) {
142 if ((iface & 0x01) == 0x00) {
143 /* iface == 0x02 is 4-Pole */
144 dev_dbg(dev, "Headset detected");
145 snd_soc_jack_report(es8326->jack, SND_JACK_HEADSET,
146 SND_JACK_HEADSET);
147 snd_soc_component_write(es8326->component,
148 ES8326_ADC1_SRC_2A,
149 es8326->mic1_src);
150 } else {
151 /* iface == 0x03 is 3-Pole */
152 dev_dbg(dev, "Headphone detected");
153 snd_soc_jack_report(es8326->jack, SND_JACK_HEADPHONE,
154 SND_JACK_HEADSET);
155 }
156
157 es8326_set_gpio(es8326, ES8326_CODEC_SET_SPK, 0);
158 es8326_set_gpio(es8326, ES8326_CODEC_SET_HP, 0);
159 es8326->hp_inserted = 1;
160 }
161
162 out:
163 mutex_unlock(&es8326->lock);
164 snd_soc_component_write(es8326->component, 0x1b, 0x70);
165 }
166
es8326_irq(int irq,void * dev_id)167 static irqreturn_t es8326_irq(int irq, void *dev_id)
168 {
169 struct es8326_priv *es8326 = dev_id;
170
171 /*
172 * For the high level irq trigger, disable irq and avoid a lot of
173 * repeated irq handlers entry.
174 */
175 queue_delayed_work(system_power_efficient_wq,
176 &es8326->hpdet_work, msecs_to_jiffies(10));
177
178 return IRQ_HANDLED;
179 }
180
181 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
182 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
183 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_pga_tlv, 0, 600, 0);
184 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(softramp_rate, 0, 100, 0);
185 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_target_tlv, -3200, 200, 0);
186 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(drc_recovery_tlv, -125, 250, 0);
187
188 static const char *const winsize[] = {
189 "0.25db/2 LRCK",
190 "0.25db/4 LRCK",
191 "0.25db/8 LRCK",
192 "0.25db/16 LRCK",
193 "0.25db/32 LRCK",
194 "0.25db/64 LRCK",
195 "0.25db/128 LRCK",
196 "0.25db/256 LRCK",
197 "0.25db/512 LRCK",
198 "0.25db/1024 LRCK",
199 "0.25db/2048 LRCK",
200 "0.25db/4096 LRCK",
201 "0.25db/8192 LRCK",
202 "0.25db/16384 LRCK",
203 "0.25db/32768 LRCK",
204 "0.25db/65536 LRCK",
205 };
206
207 static const char *const dacpol_txt[] = { "Normal", "R Invert", "L Invert", "L + R Invert" };
208 static const struct soc_enum dacpol = SOC_ENUM_SINGLE(0x4d, 4, 4, dacpol_txt);
209 static const struct soc_enum alc_winsize = SOC_ENUM_SINGLE(0x2e, 4, 16, winsize);
210 static const struct soc_enum drc_winsize = SOC_ENUM_SINGLE(0x54, 4, 16, winsize);
211 static const struct snd_kcontrol_new es8326_snd_controls[] = {
212 SOC_SINGLE_TLV("DAC Playback Volume", 0x50, 0, 0xff, 0,
213 dac_vol_tlv),
214 SOC_ENUM("Playback Polarity", dacpol),
215 SOC_SINGLE_TLV("DAC Ramp Rate", 0x4e, 0, 0x0f, 0,
216 softramp_rate),
217 SOC_SINGLE("DRC Switch", 0x53, 3, 1, 0),
218 SOC_SINGLE_TLV("DRC Recovery Level", 0x53, 0, 4, 0, drc_recovery_tlv),
219 SOC_ENUM("DRC Winsize", drc_winsize),
220 SOC_SINGLE_TLV("DRC Target Level", 0x54, 0, 0x0f, 0,
221 drc_target_tlv),
222
223 SOC_DOUBLE_R_TLV("ADC Capture Volume", 0x2C, 0x2D, 0, 0xff, 0,
224 adc_vol_tlv),
225 SOC_DOUBLE_TLV("ADC PGA Gain", 0x29, 4, 0, 5, 0, adc_pga_tlv),
226 SOC_SINGLE_TLV("ADC Ramp Rate", 0x2e, 0, 0x0f, 0,
227 softramp_rate),
228 SOC_SINGLE("ALC Switch", 0x32, 3, 1, 0),
229 SOC_SINGLE_TLV("ALC Recovery Level", 0x33, 0, 4, 0, drc_recovery_tlv),
230 SOC_ENUM("ALC Winsize", alc_winsize),
231 SOC_SINGLE_TLV("ALC Target Level", 0x33, 0, 0x0f, 0,
232 drc_target_tlv),
233 };
234
235 static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
236 SND_SOC_DAPM_INPUT("MIC1"),
237 SND_SOC_DAPM_INPUT("MIC2"),
238
239 SND_SOC_DAPM_ADC("Right ADC", NULL, SND_SOC_NOPM, 0, 0),
240 SND_SOC_DAPM_ADC("Left ADC", NULL, SND_SOC_NOPM, 0, 0),
241
242 /* Digital Interface */
243 SND_SOC_DAPM_AIF_OUT("I2S OUT", "Capture", 0,
244 SND_SOC_NOPM, 0, 0),
245 SND_SOC_DAPM_AIF_IN("I2S IN", "Playback", 0,
246 SND_SOC_NOPM, 0, 0),
247
248 SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN_16, 0, 1),
249 SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN_16, 1, 1),
250 SND_SOC_DAPM_PGA("LHPMIX", 0x25, 7, 0, NULL, 0),
251 SND_SOC_DAPM_PGA("RHPMIX", 0x25, 3, 0, NULL, 0),
252 SND_SOC_DAPM_SUPPLY("HPOR Cal", 0x27, 7, 1, NULL, 0),
253 SND_SOC_DAPM_SUPPLY("HPOL Cal", 0x27, 3, 1, NULL, 0),
254 SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPOR Supply", 0x27,
255 4, (7 << 4), (7 << 4), 0),
256 SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPOL Supply", 0x27,
257 0, 7, 7, 0),
258 SND_SOC_DAPM_OUTPUT("HPOL"),
259 SND_SOC_DAPM_OUTPUT("HPOR"),
260 };
261
262 static const struct snd_soc_dapm_route es8326_dapm_routes[] = {
263 {"Left ADC", NULL, "MIC1"},
264 {"Right ADC", NULL, "MIC2"},
265
266 {"I2S OUT", NULL, "Left ADC"},
267 {"I2S OUT", NULL, "Right ADC"},
268
269 {"Right DAC", NULL, "I2S IN"},
270 {"Left DAC", NULL, "I2S IN"},
271
272 {"LHPMIX", NULL, "Left DAC"},
273 {"RHPMIX", NULL, "Right DAC"},
274
275 {"HPOR", NULL, "HPOR Cal"},
276 {"HPOL", NULL, "HPOL Cal"},
277 {"HPOR", NULL, "HPOR Supply"},
278 {"HPOL", NULL, "HPOL Supply"},
279
280 {"HPOL", NULL, "LHPMIX"},
281 {"HPOR", NULL, "RHPMIX"},
282 };
283
284 static const struct regmap_range es8326_volatile_ranges[] = {
285 regmap_reg_range(0xfb, 0xfb),
286 };
287
288 static const struct regmap_access_table es8326_volatile_table = {
289 .yes_ranges = es8326_volatile_ranges,
290 .n_yes_ranges = ARRAY_SIZE(es8326_volatile_ranges),
291 };
292
293 const struct regmap_config es8326_regmap_config = {
294 .reg_bits = 8,
295 .val_bits = 8,
296 .max_register = 0xff,
297 .volatile_table = &es8326_volatile_table,
298 .cache_type = REGCACHE_RBTREE,
299 };
300
301 struct _coeff_div {
302 u16 fs;
303 u32 rate;
304 u32 mclk;
305 u8 reg4;
306 u8 reg5;
307 u8 reg6;
308 u8 reg7;
309 u8 reg8;
310 u8 reg9;
311 u8 rega;
312 u8 regb;
313 };
314
315 /* codec hifi mclk clock divider coefficients */
316 static const struct _coeff_div coeff_div[] = {
317 /* ratio,LRCK,MCLK,REG04,REG05,REG06,REG07,REG08,REG09,REG10,REG11 */
318 {32, 8000, 256000, 0x60, 0x00, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},
319 {32, 16000, 512000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F},
320 {32, 44100, 1411200, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
321 {32, 48000, 1536000, 0x00, 0x00, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
322 {36, 8000, 288000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47},
323 {36, 16000, 576000, 0x20, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x23, 0x47},
324 {48, 8000, 384000, 0x60, 0x02, 0x1F, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},
325 {48, 16000, 768000, 0x20, 0x02, 0x0F, 0x75, 0x0A, 0x1B, 0x1F, 0x3F},
326 {48, 48000, 2304000, 0x00, 0x02, 0x0D, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
327 {64, 8000, 512000, 0x60, 0x00, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},
328 {64, 16000, 1024000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F},
329
330 {64, 44100, 2822400, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
331 {64, 48000, 3072000, 0x00, 0x00, 0x11, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
332 {72, 8000, 576000, 0x20, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x23, 0x47},
333 {72, 16000, 1152000, 0x20, 0x00, 0x05, 0x75, 0x0A, 0x1B, 0x23, 0x47},
334 {96, 8000, 768000, 0x60, 0x02, 0x1D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},
335 {96, 16000, 1536000, 0x20, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x3F},
336 {100, 48000, 4800000, 0x04, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
337 {125, 48000, 6000000, 0x04, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27},
338 {128, 8000, 1024000, 0x60, 0x00, 0x13, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
339 {128, 16000, 2048000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
340
341 {128, 44100, 5644800, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
342 {128, 48000, 6144000, 0x00, 0x00, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
343 {144, 8000, 1152000, 0x20, 0x00, 0x03, 0x35, 0x0A, 0x1B, 0x23, 0x47},
344 {144, 16000, 2304000, 0x20, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x23, 0x47},
345 {192, 8000, 1536000, 0x60, 0x02, 0x0D, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},
346 {192, 16000, 3072000, 0x20, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x3F},
347 {200, 48000, 9600000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
348 {250, 48000, 12000000, 0x04, 0x04, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27},
349 {256, 8000, 2048000, 0x60, 0x00, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
350 {256, 16000, 4096000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
351 {256, 44100, 11289600, 0x20, 0x00, 0x30, 0x2B, 0x1A, 0xFF, 0x4F, 0x1F},
352 {256, 48000, 12288000, 0x00, 0x00, 0x30, 0x2B, 0x1A, 0x0A, 0x4F, 0x1F},
353
354 {288, 8000, 2304000, 0x20, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x23, 0x47},
355 {384, 8000, 3072000, 0x60, 0x02, 0x05, 0x75, 0x0A, 0x1B, 0x1F, 0x7F},
356 {384, 16000, 6144000, 0x20, 0x02, 0x03, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
357 {384, 48000, 18432000, 0x00, 0x02, 0x01, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
358 {400, 48000, 19200000, 0x09, 0x04, 0x0f, 0x6d, 0x3a, 0x0A, 0x4F, 0x1F},
359 {500, 48000, 24000000, 0x18, 0x04, 0x1F, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
360 {512, 8000, 4096000, 0x60, 0x00, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
361 {512, 16000, 8192000, 0x20, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
362
363 {512, 44100, 22579200, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
364 {512, 48000, 24576000, 0x00, 0x00, 0x00, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
365 {768, 8000, 6144000, 0x60, 0x02, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
366 {768, 16000, 12288000, 0x20, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
367 {800, 48000, 38400000, 0x00, 0x18, 0x13, 0x2D, 0x0A, 0x0A, 0x1F, 0x1F},
368 {1024, 8000, 8192000, 0x60, 0x00, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
369 {1024, 16000, 16384000, 0x20, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
370 {1152, 16000, 18432000, 0x20, 0x08, 0x11, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
371 {1536, 8000, 12288000, 0x60, 0x02, 0x01, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
372
373 {1536, 16000, 24576000, 0x20, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x3F},
374 {1625, 8000, 13000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27},
375 {1625, 16000, 26000000, 0x0C, 0x18, 0x1F, 0x2D, 0x0A, 0x0A, 0x27, 0x27},
376 {2048, 8000, 16384000, 0x60, 0x00, 0x00, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
377 {2304, 8000, 18432000, 0x40, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x5F},
378 {3072, 8000, 24576000, 0x60, 0x02, 0x10, 0x35, 0x0A, 0x1B, 0x1F, 0x7F},
379 {3250, 8000, 26000000, 0x0C, 0x18, 0x0F, 0x2D, 0x0A, 0x0A, 0x27, 0x27},
380 };
381
get_coeff(int mclk,int rate)382 static inline int get_coeff(int mclk, int rate)
383 {
384 int i;
385
386 rate = ES8326_LRCK;
387 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
388 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
389 return i;
390 }
391
392 return -EINVAL;
393 }
394
395 /* The set of rates we can generate from the above for each SYSCLK */
396 static unsigned int rates_12288[] = {
397 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
398 };
399
400 static struct snd_pcm_hw_constraint_list constraints_12288 = {
401 .count = ARRAY_SIZE(rates_12288),
402 .list = rates_12288,
403 };
404
405 static unsigned int rates_112896[] = {
406 8000, 11025, 22050, 44100,
407 };
408
409 static struct snd_pcm_hw_constraint_list constraints_112896 = {
410 .count = ARRAY_SIZE(rates_112896),
411 .list = rates_112896,
412 };
413
414 static unsigned int rates_12[] = {
415 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 48000,
416 48000, 88235, 96000,
417 };
418
419 static struct snd_pcm_hw_constraint_list constraints_12 = {
420 .count = ARRAY_SIZE(rates_12),
421 .list = rates_12,
422 };
423
424 /*
425 * Note that this should be called from init rather than from hw_params.
426 */
es8326_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)427 static int es8326_set_dai_sysclk(struct snd_soc_dai *codec_dai,
428 int clk_id, unsigned int freq, int dir)
429 {
430 struct snd_soc_component *component = codec_dai->component;
431 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
432 unsigned int freq2 = es8326->mclk_rate;
433
434 if (freq == 0) {
435 es8326->sysclk_constraints->list = NULL;
436 es8326->sysclk_constraints->count = 0;
437 return 0;
438 }
439
440 switch (freq2) {
441 case 11289600:
442 case 18432000:
443 case 22579200:
444 case 36864000:
445 es8326->sysclk_constraints = &constraints_112896;
446 return 0;
447
448 case 12288000:
449 case 16934400:
450 case 24576000:
451 case 33868800:
452 es8326->sysclk_constraints = &constraints_12288;
453 return 0;
454
455 case 12000000:
456 case 19200000:
457 case 24000000:
458 es8326->sysclk_constraints = &constraints_12;
459 return 0;
460 }
461
462 return -EINVAL;
463 }
464
es8326_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)465 static int es8326_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
466 {
467
468 struct snd_soc_component *component = codec_dai->component;
469 u8 iface = snd_soc_component_read(component, ES8326_FMT_13);
470
471 /* interface format */
472 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
473 case SND_SOC_DAIFMT_I2S:
474 iface &= 0xFC;
475 break;
476 case SND_SOC_DAIFMT_RIGHT_J:
477 break;
478 case SND_SOC_DAIFMT_LEFT_J:
479 break;
480 case SND_SOC_DAIFMT_DSP_A:
481 break;
482 case SND_SOC_DAIFMT_DSP_B:
483 break;
484 default:
485 return -EINVAL;
486 }
487
488 snd_soc_component_write(component, ES8326_FMT_13, iface);
489
490 return 0;
491 }
492
es8326_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)493 static int es8326_pcm_hw_params(struct snd_pcm_substream *substream,
494 struct snd_pcm_hw_params *params,
495 struct snd_soc_dai *dai)
496 {
497 struct snd_soc_component *component = dai->component;
498 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
499 u8 srate = snd_soc_component_read(component, ES8326_FMT_13) & 0xe3;
500 int coeff = get_coeff(es8326->mclk_rate, params_rate(params));
501
502 /* bit size */
503 switch (params_format(params)) {
504 case SNDRV_PCM_FORMAT_S16_LE:
505 srate |= 0x0C;
506 break;
507 case SNDRV_PCM_FORMAT_S20_3LE:
508 srate |= 0x04;
509 break;
510 case SNDRV_PCM_FORMAT_S18_3LE:
511 srate |= 0x08;
512 case SNDRV_PCM_FORMAT_S24_LE:
513 break;
514 case SNDRV_PCM_FORMAT_S32_LE:
515 srate |= 0x10;
516 break;
517 }
518
519 /* set iface & srate */
520 snd_soc_component_write(component, ES8326_FMT_13, srate);
521
522 if (coeff >= 0) {
523 snd_soc_component_write(component, ES8326_CLK_DIV1_04,
524 coeff_div[coeff].reg4);
525 snd_soc_component_write(component, ES8326_CLK_DIV2_05,
526 coeff_div[coeff].reg5);
527 snd_soc_component_write(component, ES8326_CLK_DLL_06,
528 coeff_div[coeff].reg6);
529 snd_soc_component_write(component, ES8326_CLK_MUX_07,
530 coeff_div[coeff].reg7);
531 snd_soc_component_write(component, ES8326_CLK_ADC_SEL_08,
532 coeff_div[coeff].reg8);
533 snd_soc_component_write(component, ES8326_CLK_DAC_SEL_09,
534 coeff_div[coeff].reg9);
535 snd_soc_component_write(component, ES8326_CLK_ADC_OSR_0A,
536 coeff_div[coeff].rega);
537 snd_soc_component_write(component, ES8326_CLK_DAC_OSR_0B,
538 coeff_div[coeff].regb);
539 }
540
541 return 0;
542 }
543
es8326_mute(struct snd_soc_dai * dai,int mute,int stream)544 static int es8326_mute(struct snd_soc_dai *dai, int mute, int stream)
545 {
546 struct snd_soc_component *component = dai->component;
547 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
548
549 if (stream == SNDRV_PCM_STREAM_CAPTURE)
550 return 0;
551
552 if (es8326->hp_inserted)
553 return 0;
554
555 if (mute) {
556 es8326_set_gpio(es8326, ES8326_CODEC_SET_SPK, 0);
557 es8326_set_gpio(es8326, ES8326_CODEC_SET_HP, 0);
558 } else {
559 es8326_set_gpio(es8326, ES8326_CODEC_SET_SPK, 1);
560 es8326_set_gpio(es8326, ES8326_CODEC_SET_HP, 1);
561 }
562 return 0;
563 }
564
es8326_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)565 static int es8326_set_bias_level(struct snd_soc_component *component,
566 enum snd_soc_bias_level level)
567 {
568 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
569 int ret;
570
571 switch (level) {
572 case SND_SOC_BIAS_ON:
573 dev_dbg(component->dev, "%s SND_SOC_BIAS_ON\n", __func__);
574 break;
575 case SND_SOC_BIAS_PREPARE:
576 dev_dbg(component->dev, "%s SND_SOC_BIAS_PREPARE\n", __func__);
577 if (!IS_ERR(es8326->mclk)) {
578 if (snd_soc_component_get_bias_level(component) ==
579 SND_SOC_BIAS_ON) {
580 clk_disable_unprepare(es8326->mclk);
581 } else {
582 ret = clk_prepare_enable(es8326->mclk);
583 if (ret)
584 return ret;
585 }
586 }
587 snd_soc_component_write(component, 0x01, 0x7F);
588 snd_soc_component_write(component, 0x00, 0x00);
589 snd_soc_component_write(component, 0x59, 0x45);
590 snd_soc_component_write(component, 0x5A, 0x90);
591 snd_soc_component_write(component, 0x5B, 0x00);
592 snd_soc_component_write(component, 0x03, 0x05);
593 snd_soc_component_write(component, 0x24, 0x00);
594 snd_soc_component_write(component, 0x18, 0x02);
595 snd_soc_component_write(component, 0x16, 0x00);
596 snd_soc_component_write(component, 0x17, 0x40);
597 snd_soc_component_write(component, 0x25, 0xAA);
598 snd_soc_component_write(component, 0x15, 0x00);
599 snd_soc_component_write(component, 0x00, 0x80);
600 break;
601 case SND_SOC_BIAS_STANDBY:
602 dev_dbg(component->dev, "%s SND_SOC_BIAS_STANDBY\n", __func__);
603 snd_soc_component_write(component, 0x15, 0x1F);
604 snd_soc_component_write(component, 0x25, 0x11);
605 snd_soc_component_write(component, 0x00, 0x20);
606 snd_soc_component_write(component, 0x17, 0xF8);
607 snd_soc_component_write(component, 0x16, 0xFB);
608 snd_soc_component_write(component, 0x18, 0x00);
609 snd_soc_component_write(component, 0x24, 0x0F);
610 snd_soc_component_write(component, 0x58, 0x08);
611 snd_soc_component_write(component, 0x5A, 0x00);
612 snd_soc_component_write(component, 0x5B, 0x00);
613 snd_soc_component_write(component, 0x00, 0x2F);
614 snd_soc_component_write(component, 0x01, 0x00);
615 break;
616 case SND_SOC_BIAS_OFF:
617 dev_dbg(component->dev, "%s SND_SOC_BIAS_OFF\n", __func__);
618 snd_soc_component_write(component, 0x15, 0x1F);
619 snd_soc_component_write(component, 0x25, 0x11);
620 snd_soc_component_write(component, 0x00, 0x20);
621 snd_soc_component_write(component, 0x17, 0xF8);
622 snd_soc_component_write(component, 0x16, 0xFB);
623 snd_soc_component_write(component, 0x18, 0x00);
624 snd_soc_component_write(component, 0x24, 0x0F);
625 snd_soc_component_write(component, 0x58, 0x08);
626 snd_soc_component_write(component, 0x5A, 0x00);
627 snd_soc_component_write(component, 0x5B, 0x00);
628 snd_soc_component_write(component, 0x00, 0x2F);
629 snd_soc_component_write(component, 0x01, 0x00);
630 break;
631 }
632 return 0;
633 }
634
635 #define es8326_RATES SNDRV_PCM_RATE_8000_96000
636
637 #define es8326_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
638 SNDRV_PCM_FMTBIT_S18_3LE |\
639 SNDRV_PCM_FMTBIT_S20_3LE |\
640 SNDRV_PCM_FMTBIT_S24_LE |\
641 SNDRV_PCM_FMTBIT_S32_LE)
642
643 static const struct snd_soc_dai_ops es8326_ops = {
644 .hw_params = es8326_pcm_hw_params,
645 .set_fmt = es8326_set_dai_fmt,
646 .set_sysclk = es8326_set_dai_sysclk,
647 .mute_stream = es8326_mute,
648 };
649
650 static struct snd_soc_dai_driver es8326_dai = {
651 .name = "ES8326 HiFi",
652 .playback = {
653 .stream_name = "Playback",
654 .channels_min = 1,
655 .channels_max = 2,
656 .rates = es8326_RATES,
657 .formats = es8326_FORMATS,
658 },
659 .capture = {
660 .stream_name = "Capture",
661 .channels_min = 1,
662 .channels_max = 2,
663 .rates = es8326_RATES,
664 .formats = es8326_FORMATS,
665 },
666 .ops = &es8326_ops,
667 };
668
es8326_suspend(struct snd_soc_component * component)669 static int es8326_suspend(struct snd_soc_component *component)
670 {
671 /* TBD */
672 /* snd_soc_component_write(component, 0x19, 0x06); */
673 return 0;
674 }
675
es8326_resume(struct snd_soc_component * component)676 static int es8326_resume(struct snd_soc_component *component)
677 {
678 /* TBD */
679 /* snd_soc_component_write(component, 0x2b, 0x80); */
680 return 0;
681 }
682
es8326_probe(struct snd_soc_component * component)683 static int es8326_probe(struct snd_soc_component *component)
684 {
685 struct es8326_priv *es8326;
686 int ret = 0;
687
688 if (component == NULL)
689 return -ENODEV;
690
691 es8326 = snd_soc_component_get_drvdata(component);
692 es8326->component = component;
693
694 es8326->mclk = devm_clk_get_optional(component->dev, "mclk");
695 if (IS_ERR(es8326->mclk)) {
696 dev_err(component->dev, "%s,unable to get mclk\n", __func__);
697 return PTR_ERR(es8326->mclk);
698 }
699 if (!es8326->mclk)
700 dev_err(component->dev, "%s, assuming static mclk\n", __func__);
701
702 ret = clk_prepare_enable(es8326->mclk);
703 if (ret) {
704 dev_err(component->dev, "%s, unable to enable mclk\n", __func__);
705 return ret;
706 }
707
708 snd_soc_component_write(component, 0x04, 0x3C);
709 snd_soc_component_write(component, 0x01, 0x7F);
710 snd_soc_component_write(component, 0xF9, 0x02);
711 snd_soc_component_write(component, 0x02, 0x00);
712 snd_soc_component_write(component, 0x03, 0x05);
713 snd_soc_component_write(component, 0x04, 0x01);
714 snd_soc_component_write(component, 0x05, 0x00);
715 snd_soc_component_write(component, 0x06, 0x30);
716 snd_soc_component_write(component, 0x07, 0x2D);
717 snd_soc_component_write(component, 0x08, 0x26);
718 snd_soc_component_write(component, 0x09, 0x26);
719 snd_soc_component_write(component, 0x0A, 0x1F);
720 snd_soc_component_write(component, 0x0B, 0x1F);
721 snd_soc_component_write(component, 0x0C, 0x1F);
722 snd_soc_component_write(component, 0x10, 0xC8);
723 snd_soc_component_write(component, 0x11, 0x88);
724 snd_soc_component_write(component, 0x12, 0x20);
725 snd_soc_component_write(component, 0x13, 0x00);
726 snd_soc_component_write(component, 0x14, 0x00);
727 snd_soc_component_write(component, 0x19, 0xF0);
728 snd_soc_component_write(component, 0x1D, 0x08);
729 snd_soc_component_write(component, 0x23, 0x10);
730 snd_soc_component_write(component, 0x25, 0x22);
731 snd_soc_component_write(component, 0x29, 0x00);
732 /* snd_soc_component_write(component,0x2A,0x00); */
733 /* snd_soc_component_write(component,0x2B,0x44); */
734 snd_soc_component_write(component, 0x2A, es8326->mic2_src);
735 snd_soc_component_write(component, 0x2B, es8326->mic2_src);
736 snd_soc_component_write(component, 0x2C, 0xFF);
737 snd_soc_component_write(component, 0x2D, 0xFF);
738 snd_soc_component_write(component, 0x2E, 0x00);
739 snd_soc_component_write(component, 0x4A, 0x00);
740 snd_soc_component_write(component, 0x4D, 0x08);
741 snd_soc_component_write(component, 0x4E, 0x20);
742 snd_soc_component_write(component, 0x4F, 0x15);
743 snd_soc_component_write(component, 0x50, 0xBF);
744 snd_soc_component_write(component, 0x56, 0x88);
745 snd_soc_component_write(component, 0x57, 0x10 | es8326->jack_pol);
746 /* snd_soc_component_write(component,0x57,0x1f); */
747 snd_soc_component_write(component, 0x58, 0x08);
748 snd_soc_component_write(component, 0x59, 0x45);
749 snd_soc_component_write(component, 0x5A, 0x90);
750 snd_soc_component_write(component, 0x5B, 0x00);
751 snd_soc_component_write(component, 0x15, 0x00);
752 snd_soc_component_write(component, 0x00, 0x80);
753 snd_soc_component_write(component, 0x27, 0x77);
754
755 es8326_set_bias_level(component, SND_SOC_BIAS_STANDBY);
756 return 0;
757 }
758
es8326_remove(struct snd_soc_component * component)759 static void es8326_remove(struct snd_soc_component *component)
760 {
761 es8326_set_bias_level(component, SND_SOC_BIAS_OFF);
762 }
763
es8326_enable_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * jack)764 static void es8326_enable_jack_detect(struct snd_soc_component *component,
765 struct snd_soc_jack *jack)
766 {
767 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
768
769 mutex_lock(&es8326->lock);
770 es8326->jack = jack;
771 mutex_unlock(&es8326->lock);
772
773 /* Enable irq and sync initial jack state */
774 enable_irq(es8326->irq);
775 queue_delayed_work(system_power_efficient_wq,
776 &es8326->hpdet_work, msecs_to_jiffies(10));
777 }
778
es8326_disable_jack_detect(struct snd_soc_component * component)779 static void es8326_disable_jack_detect(struct snd_soc_component *component)
780 {
781 struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
782
783 if (!es8326->jack)
784 return;
785
786 disable_irq(es8326->irq);
787
788 mutex_lock(&es8326->lock);
789 if (es8326->jack->status & SND_JACK_MICROPHONE)
790 snd_soc_jack_report(es8326->jack, 0, SND_JACK_BTN_0);
791 es8326->jack = NULL;
792 mutex_unlock(&es8326->lock);
793 }
794
es8326_set_jack(struct snd_soc_component * component,struct snd_soc_jack * jack,void * data)795 static int es8326_set_jack(struct snd_soc_component *component,
796 struct snd_soc_jack *jack, void *data)
797 {
798 dev_info(component->dev, "Enter into %s jack:%p\n", __func__, jack);
799 if (jack)
800 es8326_enable_jack_detect(component, jack);
801 else
802 es8326_disable_jack_detect(component);
803 return 0;
804 }
805
806 static const struct snd_soc_component_driver soc_codec_dev_es8326 = {
807 .probe = es8326_probe,
808 .remove = es8326_remove,
809 .suspend = es8326_suspend,
810 .resume = es8326_resume,
811 .set_bias_level = es8326_set_bias_level,
812 .set_jack = es8326_set_jack,
813
814 .dapm_widgets = es8326_dapm_widgets,
815 .num_dapm_widgets = ARRAY_SIZE(es8326_dapm_widgets),
816 .dapm_routes = es8326_dapm_routes,
817 .num_dapm_routes = ARRAY_SIZE(es8326_dapm_routes),
818 .controls = es8326_snd_controls,
819 .num_controls = ARRAY_SIZE(es8326_snd_controls),
820 };
821
es8326_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)822 static int es8326_i2c_probe(struct i2c_client *i2c,
823 const struct i2c_device_id *id)
824 {
825 struct i2c_adapter *adapter = to_i2c_adapter(i2c->dev.parent);
826 struct es8326_priv *es8326;
827 u8 reg = 0x00;
828 int ret = -1;
829
830 if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
831 dev_warn(&adapter->dev,
832 "I2C-Adapter doesn't support I2C_FUNC_I2C\n");
833 return -EIO;
834 }
835
836 es8326 = devm_kzalloc(&i2c->dev, sizeof(struct es8326_priv), GFP_KERNEL);
837 if (es8326 == NULL)
838 return -ENOMEM;
839
840 i2c_set_clientdata(i2c, es8326);
841 es8326->i2c = i2c;
842 es8326->hp_inserted = 0;
843
844 mutex_init(&es8326->lock);
845 es8326->regmap = devm_regmap_init_i2c(i2c, &es8326_regmap_config);
846 if (IS_ERR(es8326->regmap)) {
847 ret = PTR_ERR(es8326->regmap);
848 dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret);
849 return ret;
850 }
851
852 es8326->spk_ctl_gpio = devm_gpiod_get_optional(&i2c->dev,
853 "spk-con",
854 GPIOD_OUT_LOW);
855 if (IS_ERR(es8326->spk_ctl_gpio))
856 return PTR_ERR(es8326->spk_ctl_gpio);
857
858 es8326->hp_ctl_gpio = devm_gpiod_get_optional(&i2c->dev,
859 "hp-con", GPIOD_OUT_LOW);
860 if (IS_ERR(es8326->hp_ctl_gpio))
861 return PTR_ERR(es8326->hp_ctl_gpio);
862
863 ret = i2c_master_recv(i2c, ®, 1);
864 if (ret < 0) {
865 dev_err(&i2c->dev, "i2c recv Failed\n");
866 return ret;
867 }
868
869 /* TODO */
870 es8326->mastermode = device_property_read_bool(&i2c->dev, "mastermode");
871 dev_dbg(&i2c->dev, "master mode %d", es8326->mastermode);
872
873 ret = of_property_read_u8(i2c->dev.of_node, "mic1-src",
874 &es8326->mic1_src);
875 if (ret != 0) {
876 dev_dbg(&i2c->dev, "mic1-src return %d", ret);
877 es8326->mic1_src = 0x22;
878 }
879 dev_dbg(&i2c->dev, "mic1-src %x", es8326->mic1_src);
880
881 ret = of_property_read_u8(i2c->dev.of_node, "mic2-src",
882 &es8326->mic2_src);
883 if (ret != 0) {
884 dev_dbg(&i2c->dev, "mic2-src return %d", ret);
885 es8326->mic2_src = 0x44;
886 }
887 dev_dbg(&i2c->dev, "mic2-src %x", es8326->mic2_src);
888
889 ret = of_property_read_u8(i2c->dev.of_node, "jack-pol",
890 &es8326->jack_pol);
891 if (ret != 0) {
892 dev_dbg(&i2c->dev, "jack-pol return %d", ret);
893 es8326->jack_pol = 0x0f;
894 }
895 dev_dbg(&i2c->dev, "jack-pol %x", es8326->jack_pol);
896
897 ret = of_property_read_u32(i2c->dev.of_node, "mclk-rate",
898 &es8326->mclk_rate);
899 if (ret != 0) {
900 dev_dbg(&i2c->dev, "mclk-rate return %d", ret);
901 es8326->mclk_rate = 12288000;
902 }
903 dev_dbg(&i2c->dev, "mclk-rate %u", es8326->mclk_rate);
904
905 INIT_DELAYED_WORK(&es8326->hpdet_work, es8326_hpdetect_work);
906
907 es8326->irq = i2c->irq;
908 ret = devm_request_threaded_irq(&i2c->dev, es8326->irq, NULL, es8326_irq,
909 IRQF_TRIGGER_RISING |
910 IRQF_TRIGGER_FALLING |
911 IRQF_ONESHOT,
912 "es8326", es8326);
913 if (ret < 0) {
914 dev_err(&i2c->dev, "Getting irq failed.");
915 return -EINVAL;
916 }
917
918 disable_irq(es8326->irq);
919 dev_info(&i2c->dev, "Getting irq success.");
920
921 return snd_soc_register_component(&i2c->dev, &soc_codec_dev_es8326,
922 &es8326_dai, 1);
923 }
924
925 #ifdef CONFIG_OF
926 static const struct i2c_device_id es8326_i2c_id[] = {
927 {"es8326", 0},
928 {}
929 };
930
931 MODULE_DEVICE_TABLE(i2c, es8326_i2c_id);
932 #endif
933
934 #ifdef CONFIG_ACPI
935 static const struct acpi_device_id es8326_acpi_match[] = {
936 {"ESSX8326", 0},
937 {},
938 };
939
940 MODULE_DEVICE_TABLE(acpi, es8326_acpi_match);
941 #endif
942
943 static const struct of_device_id es8326_of_match[] = {
944 {.compatible = "everest,es8326",},
945 {}
946 };
947
948 MODULE_DEVICE_TABLE(of, es8326_of_match);
949
950 static struct i2c_driver es8326_i2c_driver = {
951 .driver = {
952 .name = "ES8326",
953 #ifdef CONFIG_ACPI
954 .acpi_match_table = ACPI_PTR(es8326_acpi_match),
955 #endif
956 .of_match_table = of_match_ptr(es8326_of_match),
957 },
958 .probe = es8326_i2c_probe,
959 .id_table = es8326_i2c_id,
960 };
961 module_i2c_driver(es8326_i2c_driver);
962
963 MODULE_DESCRIPTION("Everest Semi ES8326 ALSA SoC Codec Driver");
964 MODULE_AUTHOR("David <zhuning@everset-semi.com>");
965 MODULE_LICENSE("GPL");
966