xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/es8323.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright 2005 Openedhand Ltd.
4  *
5  * Author: Richard Purdie <richard@openedhand.com>
6  */
7 
8 #ifndef _ES8323_H
9 #define _ES8323_H
10 
11 #define CONFIG_HHTECH_MINIPMP	1
12 
13 /* ES8323 register space */
14 
15 #define ES8323_CONTROL1         0x00
16 #define ES8323_CONTROL2         0x01
17 #define ES8323_CHIPPOWER        0x02
18 #define ES8323_ADCPOWER         0x03
19 #define ES8323_DACPOWER         0x04
20 #define ES8323_CHIPLOPOW1       0x05
21 #define ES8323_CHIPLOPOW2       0x06
22 #define ES8323_ANAVOLMANAG      0x07
23 #define ES8323_MASTERMODE       0x08
24 #define ES8323_ADCCONTROL1      0x09
25 #define ES8323_ADCCONTROL2      0x0a
26 #define ES8323_ADCCONTROL3      0x0b
27 #define ES8323_ADCCONTROL4      0x0c
28 #define ES8323_ADCCONTROL5      0x0d
29 #define ES8323_ADCCONTROL6      0x0e
30 #define ES8323_ADCCONTROL7      0x0f
31 #define ES8323_ADCCONTROL8      0x10
32 #define ES8323_ADCCONTROL9      0x11
33 #define ES8323_ADCCONTROL10     0x12
34 #define ES8323_ADCCONTROL11     0x13
35 #define ES8323_ADCCONTROL12     0x14
36 #define ES8323_ADCCONTROL13     0x15
37 #define ES8323_ADCCONTROL14     0x16
38 
39 #define ES8323_DACCONTROL1      0x17
40 #define ES8323_DACCONTROL2      0x18
41 #define ES8323_DACCONTROL3      0x19
42 #define ES8323_DACCONTROL4      0x1a
43 #define ES8323_DACCONTROL5      0x1b
44 #define ES8323_DACCONTROL6      0x1c
45 #define ES8323_DACCONTROL7      0x1d
46 #define ES8323_DACCONTROL8      0x1e
47 #define ES8323_DACCONTROL9      0x1f
48 #define ES8323_DACCONTROL10     0x20
49 #define ES8323_DACCONTROL11     0x21
50 #define ES8323_DACCONTROL12     0x22
51 #define ES8323_DACCONTROL13     0x23
52 #define ES8323_DACCONTROL14     0x24
53 #define ES8323_DACCONTROL15     0x25
54 #define ES8323_DACCONTROL16     0x26
55 #define ES8323_DACCONTROL17     0x27
56 #define ES8323_DACCONTROL18     0x28
57 #define ES8323_DACCONTROL19     0x29
58 #define ES8323_DACCONTROL20     0x2a
59 #define ES8323_DACCONTROL21     0x2b
60 #define ES8323_DACCONTROL22     0x2c
61 #define ES8323_DACCONTROL23     0x2d
62 #define ES8323_DACCONTROL24     0x2e
63 #define ES8323_DACCONTROL25     0x2f
64 #define ES8323_DACCONTROL26     0x30
65 #define ES8323_DACCONTROL27     0x31
66 #define ES8323_DACCONTROL28     0x32
67 #define ES8323_DACCONTROL29     0x33
68 #define ES8323_DACCONTROL30     0x34
69 
70 #define ES8323_LADC_VOL         ES8323_ADCCONTROL8
71 #define ES8323_RADC_VOL         ES8323_ADCCONTROL9
72 
73 #define ES8323_LDAC_VOL         ES8323_DACCONTROL4
74 #define ES8323_RDAC_VOL         ES8323_DACCONTROL5
75 
76 #define ES8323_LOUT1_VOL        ES8323_DACCONTROL24
77 #define ES8323_ROUT1_VOL        ES8323_DACCONTROL25
78 #define ES8323_LOUT2_VOL        ES8323_DACCONTROL26
79 #define ES8323_ROUT2_VOL        ES8323_DACCONTROL27
80 
81 #define ES8323_ADC_MUTE         ES8323_ADCCONTROL7
82 #define ES8323_DAC_MUTE         ES8323_DACCONTROL3
83 
84 
85 
86 #define ES8323_IFACE            ES8323_MASTERMODE
87 
88 #define ES8323_ADC_IFACE        ES8323_ADCCONTROL4
89 #define ES8323_ADC_SRATE        ES8323_ADCCONTROL5
90 
91 #define ES8323_DAC_IFACE        ES8323_DACCONTROL1
92 #define ES8323_DAC_SRATE        ES8323_DACCONTROL2
93 
94 
95 
96 #define ES8323_CACHEREGNUM      53
97 #define ES8323_SYSCLK	        0
98 
99 struct es8323_setup_data {
100 	int i2c_bus;
101 	unsigned short i2c_address;
102 };
103 
104 #if 1 //lzcx
105 #define ES8323_PLL1			0
106 #define ES8323_PLL2			1
107 
108 /* clock inputs */
109 #define ES8323_MCLK		0
110 #define ES8323_PCMCLK		1
111 
112 /* clock divider id's */
113 #define ES8323_PCMDIV		0
114 #define ES8323_BCLKDIV		1
115 #define ES8323_VXCLKDIV		2
116 
117 /* PCM clock dividers */
118 #define ES8323_PCM_DIV_1	(0 << 6)
119 #define ES8323_PCM_DIV_3	(2 << 6)
120 #define ES8323_PCM_DIV_5_5	(3 << 6)
121 #define ES8323_PCM_DIV_2	(4 << 6)
122 #define ES8323_PCM_DIV_4	(5 << 6)
123 #define ES8323_PCM_DIV_6	(6 << 6)
124 #define ES8323_PCM_DIV_8	(7 << 6)
125 
126 /* BCLK clock dividers */
127 #define ES8323_BCLK_DIV_1	(0 << 7)
128 #define ES8323_BCLK_DIV_2	(1 << 7)
129 #define ES8323_BCLK_DIV_4	(2 << 7)
130 #define ES8323_BCLK_DIV_8	(3 << 7)
131 
132 /* VXCLK clock dividers */
133 #define ES8323_VXCLK_DIV_1	(0 << 6)
134 #define ES8323_VXCLK_DIV_2	(1 << 6)
135 #define ES8323_VXCLK_DIV_4	(2 << 6)
136 #define ES8323_VXCLK_DIV_8	(3 << 6)
137 #define ES8323_VXCLK_DIV_16	(4 << 6)
138 
139 #define ES8323_DAI_HIFI		0
140 #define ES8323_DAI_VOICE		1
141 
142 #define ES8323_1536FS 1536
143 #define ES8323_1024FS	1024
144 #define ES8323_768FS	768
145 #define ES8323_512FS	512
146 #define ES8323_384FS	384
147 #define ES8323_256FS	256
148 #define ES8323_128FS	128
149 #endif
150 
151 #endif
152