1 /*
2 * ALSA SoC ES7210 adc driver
3 *
4 * Author: David Yang, <yangxiaohua@everest-semi.com>
5 * Copyright: (C) 2018 Everest Semiconductor Co Ltd.,
6 *
7 * Based on sound/soc/codecs/es7243.c by David Yang
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Notes:
14 * ES7210 is a 4-ch ADC of Everest
15 *
16 */
17
18 #include <linux/module.h>
19 #include <linux/moduleparam.h>
20 #include <linux/init.h>
21 #include <linux/clk.h>
22 #include <linux/delay.h>
23 #include <linux/pm.h>
24 #include <linux/i2c.h>
25 #include <linux/slab.h>
26 #include <sound/core.h>
27 #include <sound/pcm.h>
28 #include <sound/pcm_params.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/tlv.h>
32 #include <sound/initval.h>
33 #include <linux/regmap.h>
34 #include "es7210.h"
35
36 #define ENABLE 1
37 #define DISABLE 0
38
39 #define MIC_CHN_16 16
40 #define MIC_CHN_14 14
41 #define MIC_CHN_12 12
42 #define MIC_CHN_10 10
43 #define MIC_CHN_8 8
44 #define MIC_CHN_6 6
45 #define MIC_CHN_4 4
46 #define MIC_CHN_2 2
47
48 #define ES7210_TDM_ENABLE DISABLE
49 #define ES7210_CHANNELS_MAX MIC_CHN_4
50
51 #if ES7210_CHANNELS_MAX == MIC_CHN_2
52 #define ADC_DEV_MAXNUM 1
53 #endif
54 #if ES7210_CHANNELS_MAX == MIC_CHN_4
55 #define ADC_DEV_MAXNUM 1
56 #endif
57 #if ES7210_CHANNELS_MAX == MIC_CHN_6
58 #define ADC_DEV_MAXNUM 2
59 #endif
60 #if ES7210_CHANNELS_MAX == MIC_CHN_8
61 #define ADC_DEV_MAXNUM 2
62 #endif
63 #if ES7210_CHANNELS_MAX == MIC_CHN_10
64 #define ADC_DEV_MAXNUM 3
65 #endif
66 #if ES7210_CHANNELS_MAX == MIC_CHN_12
67 #define ADC_DEV_MAXNUM 3
68 #endif
69 #if ES7210_CHANNELS_MAX == MIC_CHN_14
70 #define ADC_DEV_MAXNUM 4
71 #endif
72 #if ES7210_CHANNELS_MAX == MIC_CHN_16
73 #define ADC_DEV_MAXNUM 4
74 #endif
75
76 #define ES7210_TDM_1LRCK_DSPA 0
77 #define ES7210_TDM_1LRCK_DSPB 1
78 #define ES7210_TDM_1LRCK_I2S 2
79 #define ES7210_TDM_1LRCK_LJ 3
80 #define ES7210_TDM_NLRCK_DSPA 4
81 #define ES7210_TDM_NLRCK_DSPB 5
82 #define ES7210_TDM_NLRCK_I2S 6
83 #define ES7210_TDM_NLRCK_LJ 7
84 #define ES7210_NORMAL_I2S 8
85
86 #define ES7210_WORK_MODE ES7210_NORMAL_I2S
87
88
89 #define ES7210_I2C_BUS_NUM 1
90 #define ES7210_CODEC_RW_TEST_EN 0
91 #define ES7210_IDLE_RESET_EN 1 //reset ES7210 when in idle time
92
93 #define ES7210_MIC_GAIN 0x18 // need check hw design and channel
94 #define ES7210_AEC_GAIN 0x13 // need check hw design and channel
95
96 /* to set internal mclk and adclrclk ratio */
97
98 #define RATIO_768 0xC3
99 #define RATIO_256 0xC1
100 #define RATIO_128 0x01
101 #define RATIO_64 0x41 /* mclk from bclk pin */
102
103 #define ES7210_MCLK_LRCK_RATIO RATIO_256
104
105 static struct i2c_client *i2c_clt1[ADC_DEV_MAXNUM];
106
107 static struct es7210_priv *resume_es7210 = NULL;
108 /* codec private data */
109 struct es7210_priv {
110 struct regmap *regmap;
111 struct i2c_client *i2c_client;
112 unsigned int dmic_enable;
113 unsigned int sysclk;
114 struct clk *mclk;
115 struct snd_pcm_hw_constraint_list *sysclk_constraints;
116 unsigned int tdm_mode;
117 struct delayed_work pcm_pop_work;
118 };
119
120 static struct snd_soc_component *tron_codec1[ADC_DEV_MAXNUM];
121
122 static int es7210_init_reg = 0;
123 static int es7210_codec_num = 0;
124
125 static const struct regmap_config es7210_regmap_config = {
126 .reg_bits = 8, //Number of bits in a register address
127 .val_bits = 8, //Number of bits in a register value
128 };
129 /*
130 * ES7210 register cache
131 */
132 static const u8 es7210_reg[] = {
133 0x32, 0x40, 0x02, 0x04, 0x01, 0x00, 0x00, 0x20, /* 0 - 7 */
134 0x10, 0x40, 0x40, 0x00, 0x00, 0x09, 0x00, 0x00, /* 8 - F */
135 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 10 - 17 */
136 0xf7, 0xf7, 0x00, 0xbf, 0xbf, 0xbf, 0xbf, 0x00, /* 18 - 1f */
137 0x26, 0x26, 0x06, 0x26, 0x00, 0x00, 0x00, 0x00, /* 20 - 27 */
138 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 28 - 2f */
139 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 - 37 */
140 0x00, 0x00, 0x00, 0x00, 0x00, 0x72, 0x10, 0x00, /* 38 - 3f */
141 0x80, 0x71, 0x71, 0x00, 0x00, 0x00, 0x00, 0x00, /* 40 - 47 */
142 0x00, 0x00, 0x00, 0xff, 0xff, /* 48 - 4c */
143 };
144
145 struct es7210_reg_config {
146 unsigned char reg_addr;
147 unsigned char reg_v;
148 };
149 static const struct es7210_reg_config es7210_tdm_reg_common_cfg1[] = {
150 { 0x00, 0xFF },
151 { 0x00, 0x32 },
152 { 0x09, 0x30 },
153 { 0x0A, 0x30 },
154 { 0x23, 0x2a },
155 { 0x22, 0x0a },
156 { 0x21, 0x2a },
157 { 0x20, 0x0a },
158 };
159 static const struct es7210_reg_config es7210_tdm_reg_fmt_cfg[] = {
160 { 0x11, 0x63 },
161 { 0x12, 0x01 },
162 };
163 static const struct es7210_reg_config es7210_tdm_reg_common_cfg2[] = {
164 { 0x40, 0xC3 },
165 { 0x41, 0x70 },
166 { 0x42, 0x70 },
167 { 0x43, 0x1E },
168 { 0x44, 0x1E },
169 { 0x45, 0x1E },
170 { 0x46, 0x1E },
171 { 0x47, 0x08 },
172 { 0x48, 0x08 },
173 { 0x49, 0x08 },
174 { 0x4A, 0x08 },
175 { 0x07, 0x20 },
176 };
177 static const struct es7210_reg_config es7210_tdm_reg_mclk_cfg[] = {
178 { 0x02, 0xC1 },
179 };
180 static const struct es7210_reg_config es7210_tdm_reg_common_cfg3[] = {
181 { 0x06, 0x00 },
182 { 0x4B, 0x0F },
183 { 0x4C, 0x0F },
184 { 0x00, 0x71 },
185 { 0x00, 0x41 },
186 };
es7210_read(u8 reg,u8 * rt_value,struct i2c_client * client)187 static int es7210_read(u8 reg, u8 *rt_value, struct i2c_client *client)
188 {
189 int ret;
190 u8 read_cmd[3] = {0};
191 u8 cmd_len = 0;
192
193 read_cmd[0] = reg;
194 cmd_len = 1;
195
196 if (client->adapter == NULL)
197 pr_err("es7210_read client->adapter==NULL\n");
198
199 ret = i2c_master_send(client, read_cmd, cmd_len);
200 if (ret != cmd_len) {
201 pr_err("es7210_read error1\n");
202 return -1;
203 }
204
205 ret = i2c_master_recv(client, rt_value, 1);
206 if (ret != 1) {
207 pr_err("es7210_read error2, ret = %d.\n", ret);
208 return -1;
209 }
210
211 return 0;
212 }
es7210_write(u8 reg,unsigned char value,struct i2c_client * client)213 static int es7210_write(u8 reg, unsigned char value, struct i2c_client *client)
214 {
215 int ret;
216 u8 write_cmd[2] = {0};
217 write_cmd[0] = reg;
218 write_cmd[1] = value;
219
220 ret = i2c_master_send(client, write_cmd, 2);
221 if (ret != 2) {
222 pr_err("es7210_write error->[REG-0x%02x,val-0x%02x]\n", reg, value);
223 return -1;
224 }
225 return 0;
226 }
es7210_update_bits(u8 reg,u8 mask,u8 value,struct i2c_client * client)227 static int es7210_update_bits(u8 reg, u8 mask, u8 value, struct i2c_client *client)
228 {
229 u8 val_old = 0, val_new = 0;
230
231 es7210_read(reg, &val_old, client);
232 val_new = (val_old & ~mask) | (value & mask);
233 if (val_new != val_old) {
234 es7210_write(reg, val_new, client);
235 }
236
237 return 0;
238 }
239 /*
240 static int es7210_multi_chips_read(u8 reg, unsigned char *rt_value)
241 {
242 u8 i;
243
244 for(i=0; i< ADC_DEV_MAXNUM; i++){
245 es7210_read(reg, rt_value++, i2c_clt1[i]);
246 }
247
248 return 0;
249 }
250 */
es7210_multi_chips_write(u8 reg,unsigned char value)251 static int es7210_multi_chips_write(u8 reg, unsigned char value)
252 {
253 u8 i;
254 for (i = 0; i < ADC_DEV_MAXNUM; i++) {
255 es7210_write(reg, value, i2c_clt1[i]);
256 }
257
258 return 0;
259 }
260
es7210_multi_chips_update_bits(u8 reg,u8 mask,u8 value)261 static int es7210_multi_chips_update_bits(u8 reg, u8 mask, u8 value)
262 {
263 u8 i;
264
265 for (i = 0; i < ADC_DEV_MAXNUM; i++) {
266 es7210_update_bits(reg, mask, value, i2c_clt1[i]);
267 }
268
269 return 0;
270 }
271
272 /*
273 * Note that this should be called from init rather than from hw_params.
274 */
es7210_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)275 static int es7210_set_dai_sysclk(struct snd_soc_dai *codec_dai,
276 int clk_id, unsigned int freq, int dir)
277 {
278 return 0;
279 }
280
es7210_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)281 static int es7210_set_dai_fmt(struct snd_soc_dai *codec_dai,
282 unsigned int fmt)
283 {
284 return 0;
285 }
286 /*
287 * to initialize es7210 for tdm mode
288 */
es7210_tdm_init_codec(u8 mode)289 static void es7210_tdm_init_codec(u8 mode)
290 {
291 int cnt, channel, i;
292 printk("begin->>>>>>>>>>%s!\n", __func__);
293 for (cnt = 0;
294 cnt < sizeof(es7210_tdm_reg_common_cfg1) /
295 sizeof(es7210_tdm_reg_common_cfg1[0]);
296 cnt++) {
297 es7210_multi_chips_write(
298 es7210_tdm_reg_common_cfg1[cnt].reg_addr,
299 es7210_tdm_reg_common_cfg1[cnt].reg_v);
300 }
301 switch (mode) {
302 case ES7210_TDM_1LRCK_DSPA:
303 /*
304 * Here to set TDM format for DSP-A mode
305 */
306 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
307 es7210_write(ES7210_SDP_CFG1_REG11,
308 0x63, i2c_clt1[cnt]);
309 es7210_write(ES7210_SDP_CFG2_REG12,
310 0x01, i2c_clt1[cnt]);
311 }
312 break;
313 case ES7210_TDM_1LRCK_DSPB:
314 /*
315 * Here to set TDM format for DSP-B mode
316 */
317 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
318 es7210_write(ES7210_SDP_CFG1_REG11,
319 0x73, i2c_clt1[cnt]);
320 es7210_write(ES7210_SDP_CFG2_REG12,
321 0x01, i2c_clt1[cnt]);
322 }
323 break;
324 case ES7210_TDM_1LRCK_I2S:
325 /*
326 * Here to set TDM format for I2S mode
327 */
328 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
329 es7210_write(ES7210_SDP_CFG1_REG11,
330 0x60, i2c_clt1[cnt]);
331 }
332 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
333 es7210_write(ES7210_SDP_CFG2_REG12,
334 0x02, i2c_clt1[cnt]);
335 }
336 break;
337 case ES7210_TDM_1LRCK_LJ:
338 /*
339 * Here to set TDM format for Left Justified mode
340 */
341 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
342 es7210_write(ES7210_SDP_CFG1_REG11,
343 0x61, i2c_clt1[cnt]);
344 }
345 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
346 es7210_write(ES7210_SDP_CFG2_REG12,
347 0x02, i2c_clt1[cnt]);
348 }
349 break;
350 case ES7210_TDM_NLRCK_DSPA:
351 /*
352 * set format, dsp-a with multiple LRCK tdm mode
353 */
354 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
355 es7210_write(ES7210_SDP_CFG1_REG11,
356 0x63, i2c_clt1[cnt]);
357 }
358 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
359 if (cnt == 0) {
360 /*
361 * set tdm flag in the interface
362 * chip
363 */
364 es7210_write(
365 ES7210_SDP_CFG2_REG12, 0x07,
366 i2c_clt1[cnt]);
367 } else {
368 es7210_write(
369 ES7210_SDP_CFG2_REG12, 0x03,
370 i2c_clt1[cnt]);
371 }
372 }
373 break;
374 case ES7210_TDM_NLRCK_DSPB:
375 /*
376 * set format, dsp-b with multiple LRCK tdm mode
377 */
378 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
379 es7210_write(ES7210_SDP_CFG1_REG11,
380 0x73, i2c_clt1[cnt]);
381 }
382 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
383 if (cnt == 0) {
384 /*
385 * set tdm flag in the interface
386 * chip
387 */
388 es7210_write(
389 ES7210_SDP_CFG2_REG12, 0x07,
390 i2c_clt1[cnt]);
391 } else {
392 es7210_write(
393 ES7210_SDP_CFG2_REG12, 0x03,
394 i2c_clt1[cnt]);
395 }
396 }
397
398 break;
399 case ES7210_TDM_NLRCK_I2S:
400 /*
401 * set format, I2S with multiple LRCK tdm mode
402 */
403 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
404 es7210_write(ES7210_SDP_CFG1_REG11,
405 0x60, i2c_clt1[cnt]);
406 }
407 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
408 if (cnt == 0) {
409 /*
410 * set tdm flag in the interface
411 * chip
412 */
413 es7210_write(
414 ES7210_SDP_CFG2_REG12, 0x07,
415 i2c_clt1[cnt]);
416 } else {
417 es7210_write(
418 ES7210_SDP_CFG2_REG12, 0x03,
419 i2c_clt1[cnt]);
420 }
421 }
422
423 break;
424 case ES7210_TDM_NLRCK_LJ:
425 /*
426 * set format, left justified with multiple LRCK
427 * tdm mode
428 */
429 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
430 es7210_write(ES7210_SDP_CFG1_REG11,
431 0x61, i2c_clt1[cnt]);
432 }
433 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
434 if (cnt == 0) {
435 /*
436 * set tdm flag in the interface
437 * chip
438 */
439 es7210_write(
440 ES7210_SDP_CFG2_REG12, 0x07,
441 i2c_clt1[cnt]);
442 } else {
443 es7210_write(
444 ES7210_SDP_CFG2_REG12, 0x03,
445 i2c_clt1[cnt]);
446 }
447 }
448
449 break;
450 case ES7210_NORMAL_I2S:
451 /*
452 * Here to set Normal i2s mode format for SD1/SD2 output
453 */
454 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
455 es7210_write(ES7210_SDP_CFG1_REG11,
456 0x60, i2c_clt1[cnt]);
457 }
458 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
459 es7210_write(ES7210_SDP_CFG2_REG12,
460 0x00, i2c_clt1[cnt]);
461 }
462
463 break;
464
465 default:
466 /*
467 * here to disable tdm and set i2s-16bit for
468 * normal mode
469 */
470 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
471 es7210_write(ES7210_SDP_CFG1_REG11,
472 0x60, i2c_clt1[cnt]);
473 es7210_write(ES7210_SDP_CFG2_REG12,
474 0x00, i2c_clt1[cnt]);
475 }
476 break;
477 }
478 for (cnt = 0;
479 cnt < sizeof(es7210_tdm_reg_common_cfg2) /
480 sizeof(es7210_tdm_reg_common_cfg2[0]);
481 cnt++) {
482 es7210_multi_chips_write(
483 es7210_tdm_reg_common_cfg2[cnt].reg_addr,
484 es7210_tdm_reg_common_cfg2[cnt].reg_v);
485 }
486 switch (mode) {
487 case ES7210_TDM_1LRCK_DSPA:
488 case ES7210_TDM_1LRCK_DSPB:
489 case ES7210_TDM_1LRCK_I2S:
490 case ES7210_TDM_1LRCK_LJ:
491 case ES7210_NORMAL_I2S:
492 /*
493 * to set internal mclk
494 * here, we assume that cpu/soc always provides
495 * 256FS i2s clock
496 * to es7210.
497 * dll bypassed, use clock doubler to get double
498 * frequency for
499 * internal modem which need
500 * 512FS clock. the clk divider ratio is 1.
501 * user must modify the setting of register0x02
502 * according to FS
503 * ratio provided by CPU/SOC.
504 */
505
506 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
507 es7210_write(ES7210_MCLK_CTL_REG02,
508 ES7210_MCLK_LRCK_RATIO, i2c_clt1[cnt]);
509 }
510 // es7210_multi_chips_write(ES7210_MCLK_CTL_REG02,
511 // 0xc1);
512 break;
513 case ES7210_TDM_NLRCK_DSPA:
514 case ES7210_TDM_NLRCK_DSPB:
515 case ES7210_TDM_NLRCK_I2S:
516 case ES7210_TDM_NLRCK_LJ:
517 /*
518 * Here to set TDM format for DSP-A with
519 * multiple LRCK TDM mode
520 */
521 channel = ES7210_CHANNELS_MAX;
522 /*
523 * Set the microphone numbers in array
524 */
525 switch (channel) {
526 case 2:
527 /* ES7210_CHANNELS_MAX=2 */
528 es7210_multi_chips_write(
529 ES7210_MODE_CFG_REG08, 0x10);
530 break;
531 case 4:
532 /* ES7210_CHANNELS_MAX=4 */
533 es7210_multi_chips_write(
534 ES7210_MODE_CFG_REG08, 0x20);
535 break;
536 case 6:
537 /* ES7210_CHANNELS_MAX=6 */
538 es7210_multi_chips_write(
539 ES7210_MODE_CFG_REG08, 0x30);
540 break;
541 case 8:
542 /* ES7210_CHANNELS_MAX=8 */
543 es7210_multi_chips_write(
544 ES7210_MODE_CFG_REG08, 0x40);
545 break;
546 case 10:
547 /* ES7210_CHANNELS_MAX=10 */
548 es7210_multi_chips_write(
549 ES7210_MODE_CFG_REG08, 0x50);
550 break;
551 case 12:
552 /* ES7210_CHANNELS_MAX=12 */
553 es7210_multi_chips_write(
554 ES7210_MODE_CFG_REG08, 0x60);
555 break;
556 case 14:
557 /* ES7210_CHANNELS_MAX=14 */
558 es7210_multi_chips_write(
559 ES7210_MODE_CFG_REG08, 0x70);
560 break;
561 case 16:
562 /* ES7210_CHANNELS_MAX=16 */
563 es7210_multi_chips_write(
564 ES7210_MODE_CFG_REG08, 0x80);
565 break;
566 default:
567 break;
568 }
569 /*
570 * to set internal mclk
571 * here, we assume that cpu/soc always provides
572 * 256FS i2s clock
573 * to es7210 and there is four
574 * es7210 devices in tdm link. so the
575 * internal FS in es7210
576 * is only FS/4;
577 * dll bypassed, clock doubler bypassed. the clk
578 * divider ratio is
579 * 2. so the clock of internal
580 * modem equals to (256FS / (FS/4) / 2) * FS
581 * = 512FS
582 * user must modify the setting of register0x02
583 * according to FS
584 * ratio provided by CPU/SOC.
585 */
586
587 es7210_multi_chips_write(ES7210_MCLK_CTL_REG02,
588 ES7210_MCLK_LRCK_RATIO);// NFS MODE:RATIO_768 ,12.288M/48K(16K 6 CH),12.288M/64K(16K 8 CH)
589 break;
590 default:
591 /*
592 * to set internal mclk for normal mode
593 * here, we assume that cpu/soc always provides
594 * 256FS i2s clock
595 * to es7210.
596 * dll bypassed, use clock doubler to get double
597 * frequency for
598 * internal modem which need
599 * 512FS clock. the clk divider ratio is 1.
600 * user must modify the setting of register0x02
601 * according to FS
602 * ratio provided by CPU/SOC.
603 */
604 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
605 es7210_write(ES7210_MCLK_CTL_REG02,
606 ES7210_MCLK_LRCK_RATIO, i2c_clt1[cnt]);
607 }
608
609 break;
610 }
611 for (cnt = 0;
612 cnt < sizeof(es7210_tdm_reg_common_cfg3) /
613 sizeof(es7210_tdm_reg_common_cfg3[0]);
614 cnt++) {
615 es7210_multi_chips_write(
616 es7210_tdm_reg_common_cfg3[cnt].reg_addr,
617 es7210_tdm_reg_common_cfg3[cnt].reg_v);
618 }
619 /*
620 * Mute All ADC
621 */
622 printk("enter es7210_multi_chips_update_bits %s\n",
623 __func__);
624 for (cnt = 0; cnt < ADC_DEV_MAXNUM; cnt++) {
625 es7210_write(ES7210_ADC34_MUTE_REG14, 0x03,
626 i2c_clt1[cnt]);
627 es7210_write(ES7210_ADC12_MUTE_REG15, 0x03,
628 i2c_clt1[cnt]);
629 }
630 for (i = 0; i < ADC_DEV_MAXNUM; i++) {
631 if (i == 0) {
632 /* set first es7210 PGA GAIN */
633 es7210_write(ES7210_MIC1_GAIN_REG43, ES7210_MIC_GAIN,
634 i2c_clt1[i]);
635 es7210_write(ES7210_MIC2_GAIN_REG44, ES7210_MIC_GAIN,
636 i2c_clt1[i]);
637 es7210_write(ES7210_MIC3_GAIN_REG45, ES7210_MIC_GAIN,
638 i2c_clt1[i]);
639 es7210_write(ES7210_MIC4_GAIN_REG46, ES7210_MIC_GAIN,
640 i2c_clt1[i]);
641 }
642 if (i == 1) {
643 /* set second es7210 PGA GAIN */
644 es7210_write(ES7210_MIC1_GAIN_REG43, ES7210_AEC_GAIN,
645 i2c_clt1[i]);
646 es7210_write(ES7210_MIC2_GAIN_REG44, ES7210_AEC_GAIN,
647 i2c_clt1[i]);
648 es7210_write(ES7210_MIC3_GAIN_REG45, ES7210_AEC_GAIN,
649 i2c_clt1[i]);
650 es7210_write(ES7210_MIC4_GAIN_REG46, ES7210_AEC_GAIN,
651 i2c_clt1[i]);
652 }
653 if (i == 2) {
654 /* set third es7210 PGA GAIN */
655 es7210_write(ES7210_MIC1_GAIN_REG43, ES7210_AEC_GAIN,
656 i2c_clt1[i]);
657 es7210_write(ES7210_MIC2_GAIN_REG44, ES7210_AEC_GAIN,
658 i2c_clt1[i]);
659 es7210_write(ES7210_MIC3_GAIN_REG45, ES7210_AEC_GAIN,
660 i2c_clt1[i]);
661 es7210_write(ES7210_MIC4_GAIN_REG46, ES7210_AEC_GAIN,
662 i2c_clt1[i]);
663 }
664
665 if (i == 3) {
666 /* set third es7210 PGA GAIN */
667 es7210_write(ES7210_MIC1_GAIN_REG43, ES7210_AEC_GAIN,
668 i2c_clt1[i]);
669 es7210_write(ES7210_MIC2_GAIN_REG44, ES7210_AEC_GAIN,
670 i2c_clt1[i]);
671 es7210_write(ES7210_MIC3_GAIN_REG45, ES7210_AEC_GAIN,
672 i2c_clt1[i]);
673 es7210_write(ES7210_MIC4_GAIN_REG46, ES7210_AEC_GAIN,
674 i2c_clt1[i]);
675 }
676 }
677 printk("exit->>>>>>>>>>%s!\n", __func__);
678 }
es7210_unmute(void)679 static void es7210_unmute(void)
680 {
681 printk("enter into %s\n", __func__);
682 es7210_multi_chips_update_bits(ES7210_ADC34_MUTE_REG14, 0x03, 0x00);
683 es7210_multi_chips_update_bits(ES7210_ADC12_MUTE_REG15, 0x03, 0x00);
684 }
685
pcm_pop_work_events(struct work_struct * work)686 static void pcm_pop_work_events(struct work_struct *work)
687 {
688 printk("enter into %s\n", __func__);
689 es7210_unmute();
690 es7210_init_reg = 1;
691 }
es7210_mute(struct snd_soc_dai * dai,int mute,int stream)692 static int es7210_mute(struct snd_soc_dai *dai, int mute, int stream)
693 {
694 printk("enter into %s, mute = %d\n", __func__, mute);
695 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
696 return 0;
697
698 if (mute) {
699 es7210_multi_chips_update_bits(ES7210_ADC34_MUTE_REG14, 0x03, 0x03);
700 es7210_multi_chips_update_bits(ES7210_ADC12_MUTE_REG15, 0x03, 0x03);
701 } else {
702 es7210_multi_chips_update_bits(ES7210_ADC34_MUTE_REG14, 0x03, 0x00);
703 es7210_multi_chips_update_bits(ES7210_ADC12_MUTE_REG15, 0x03, 0x00);
704 }
705 return 0;
706 }
707
es7210_pcm_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)708 static int es7210_pcm_startup(struct snd_pcm_substream *substream,
709 struct snd_soc_dai *dai)
710 {
711 struct snd_soc_component *component = dai->component;
712 struct es7210_priv *es7210 = snd_soc_component_get_drvdata(component);
713
714 if (es7210_init_reg == 0) {
715 schedule_delayed_work(&es7210->pcm_pop_work, msecs_to_jiffies(100));
716 }
717 return 0;
718 }
es7210_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)719 static int es7210_pcm_hw_params(struct snd_pcm_substream *substream,
720 struct snd_pcm_hw_params *params,
721 struct snd_soc_dai *dai)
722 {
723 int i;
724 es7210_multi_chips_update_bits(ES7210_RESET_CTL_REG00, 0x30, 0x30);
725 for (i = 0; i < ADC_DEV_MAXNUM; i++) {
726 /* set es7210 bit size */
727 switch (params_format(params)) {
728 case SNDRV_PCM_FORMAT_S16_LE:
729 es7210_update_bits(0x11, 0xE0, 0x60,
730 i2c_clt1[i]);
731 break;
732 case SNDRV_PCM_FORMAT_S20_3LE:
733 es7210_update_bits(0x11, 0xE0, 0x20,
734 i2c_clt1[i]);
735 break;
736 case SNDRV_PCM_FORMAT_S24_3LE:
737 es7210_update_bits(0x11, 0xE0, 0x00,
738 i2c_clt1[i]);
739 break;
740 case SNDRV_PCM_FORMAT_S24_LE:
741 case SNDRV_PCM_FORMAT_S32_LE:
742 es7210_update_bits(0x11, 0xE0, 0x80,
743 i2c_clt1[i]);
744 break;
745 }
746 }
747 es7210_multi_chips_update_bits(ES7210_RESET_CTL_REG00, 0x30, 0x00);
748 switch (params_rate(params)) {
749 case 16000:
750 break;
751 case 32000:
752 break;
753 case 48000:
754 break;
755 case 64000:
756 break;
757 default:
758 break;
759 }
760 return 0;
761 }
762
763 #define es7210_RATES SNDRV_PCM_RATE_8000_96000
764
765 #define es7210_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_3LE |\
766 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
767
768 static struct snd_soc_dai_ops es7210_ops = {
769 .startup = es7210_pcm_startup,
770 .hw_params = es7210_pcm_hw_params,
771 .set_fmt = es7210_set_dai_fmt,
772 .set_sysclk = es7210_set_dai_sysclk,
773 .mute_stream = es7210_mute,
774 };
775 #if ES7210_CHANNELS_MAX > 0
776 static struct snd_soc_dai_driver es7210_dai0 = {
777 .name = "ES7210 4CH ADC 0",
778 .capture = {
779 .stream_name = "Capture",
780 .channels_min = 1,
781 .channels_max = 8,
782 .rates = es7210_RATES,
783 .formats = es7210_FORMATS,
784 },
785 .ops = &es7210_ops,
786 .symmetric_rates = 1,
787 };
788 #endif
789 #if ES7210_CHANNELS_MAX > 4
790 static struct snd_soc_dai_driver es7210_dai1 = {
791 .name = "ES7210 4CH ADC 1",
792 .capture = {
793 .stream_name = "Capture",
794 .channels_min = 1,
795 .channels_max = 8,
796 .rates = es7210_RATES,
797 .formats = es7210_FORMATS,
798 },
799 .ops = &es7210_ops,
800 .symmetric_rates = 1,
801 };
802 #endif
803 #if ES7210_CHANNELS_MAX > 8
804 static struct snd_soc_dai_driver es7210_dai2 = {
805 .name = "ES7210 4CH ADC 2",
806 .capture = {
807 .stream_name = "Capture",
808 .channels_min = 1,
809 .channels_max = 4,
810 .rates = es7210_RATES,
811 .formats = es7210_FORMATS,
812 },
813 .ops = &es7210_ops,
814 .symmetric_rates = 1,
815 };
816 #endif
817 #if ES7210_CHANNELS_MAX > 12
818 static struct snd_soc_dai_driver es7210_dai3 = {
819 .name = "ES7210 4CH ADC 3",
820 .capture = {
821 .stream_name = "Capture",
822 .channels_min = 1,
823 .channels_max = 4,
824 .rates = es7210_RATES,
825 .formats = es7210_FORMATS,
826 },
827 .ops = &es7210_ops,
828 .symmetric_rates = 1,
829 };
830 #endif
831 static struct snd_soc_dai_driver *es7210_dai[] = {
832 #if ES7210_CHANNELS_MAX > 0
833 &es7210_dai0,
834 #endif
835 #if ES7210_CHANNELS_MAX > 4
836 &es7210_dai1,
837 #endif
838 #if ES7210_CHANNELS_MAX > 8
839 &es7210_dai2,
840 #endif
841 #if ES7210_CHANNELS_MAX > 12
842 &es7210_dai3,
843 #endif
844 };
845
es7210_suspend(struct snd_soc_component * component)846 static int es7210_suspend(struct snd_soc_component *component)
847 {
848 int i = 0;
849
850 printk("jsl es7210_suspend enter\n");
851
852 for (i = 0; i < ADC_DEV_MAXNUM; i++) {
853 if (i == 1) {
854 es7210_write(0x06, 0x05, i2c_clt1[i]);
855 es7210_write(0x05, 0x1B, i2c_clt1[i]);
856 es7210_write(0x06, 0x5C, i2c_clt1[i]);
857 es7210_write(0x07, 0x3F, i2c_clt1[i]);
858 es7210_write(0x08, 0x4B, i2c_clt1[i]);
859 es7210_write(0x09, 0x9F, i2c_clt1[i]);
860
861 } else {
862 /*turn off mic3/4 */
863
864 es7210_write(0x4C, 0xFF, i2c_clt1[i]);
865 es7210_write(0x0B, 0xD0, i2c_clt1[i]);
866 es7210_write(0x40, 0x80, i2c_clt1[i]);
867 es7210_write(0x01, 0x34, i2c_clt1[i]);
868 es7210_write(0x06, 0x07, i2c_clt1[i]);
869 /*turn off mic 1/2/3/4 */
870 /*
871 es7210_write(0x4B, 0xFF, i2c_clt1[i]);
872 es7210_write(0x4C, 0xFF, i2c_clt1[i]);
873 es7210_write(0x0B, 0xD0, i2c_clt1[i]);
874 es7210_write(0x40, 0x80, i2c_clt1[i]);
875 es7210_write(0x01, 0x7F, i2c_clt1[i]);
876 es7210_write(0x06, 0x07, i2c_clt1[i]);
877 */
878 }
879 }
880
881 es7210_init_reg = 0;
882 return 0;
883 }
884
es7210_resume(struct snd_soc_component * component)885 static int es7210_resume(struct snd_soc_component *component)
886 {
887 //snd_soc_cache_sync(codec);
888 es7210_tdm_init_codec(resume_es7210->tdm_mode);
889 return 0;
890 }
891
es7210_probe(struct snd_soc_component * component)892 static int es7210_probe(struct snd_soc_component *component)
893 {
894 struct es7210_priv *es7210 = snd_soc_component_get_drvdata(component);
895 int ret = 0;
896 printk("begin->>>>>>>>>>%s!\n", __func__);
897 es7210->mclk = devm_clk_get(component->dev, "mclk");
898 if (PTR_ERR(es7210->mclk) == -EPROBE_DEFER)
899 return -EPROBE_DEFER;
900
901 ret = clk_prepare_enable(es7210->mclk);
902 if (ret)
903 return ret;
904 resume_es7210 = es7210;
905 #if !ES7210_CODEC_RW_TEST_EN
906 //ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);//8,8
907 #else
908 component->control_data = devm_regmap_init_i2c(es7210->i2c_client, &es7210_regmap_config);
909 ret = PTR_ERR_OR_ZERO(component->control_data);
910 #endif
911
912 if (ret < 0) {
913 dev_err(component->dev, "Failed to set cache I/O: %d\n", ret);
914 return ret;
915 }
916 printk("begin->>>>>>>>>>%s!\n", __func__);
917
918 tron_codec1[es7210_codec_num++] = component;
919 INIT_DELAYED_WORK(&es7210->pcm_pop_work, pcm_pop_work_events);
920 es7210_tdm_init_codec(es7210->tdm_mode);
921 return 0;
922 }
923
es7210_remove(struct snd_soc_component * component)924 static void es7210_remove(struct snd_soc_component *component)
925 {
926
927 }
928
es7210_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)929 static int es7210_set_bias_level(struct snd_soc_component *component,
930 enum snd_soc_bias_level level)
931 {
932 struct es7210_priv *es7210 = snd_soc_component_get_drvdata(component);
933 int ret;
934
935 switch (level) {
936 case SND_SOC_BIAS_ON:
937 break;
938 case SND_SOC_BIAS_PREPARE:
939 if (IS_ERR(es7210->mclk))
940 break;
941 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_ON) {
942 clk_disable_unprepare(es7210->mclk);
943 } else {
944 ret = clk_prepare_enable(es7210->mclk);
945 if (ret)
946 return ret;
947 }
948 break;
949
950 case SND_SOC_BIAS_STANDBY:
951 break;
952
953 case SND_SOC_BIAS_OFF:
954 break;
955 }
956 return 0;
957 }
958
959 static const DECLARE_TLV_DB_SCALE(mic_boost_tlv, 0, 300, 0);
960
961 #if ES7210_CHANNELS_MAX > 0
es7210_micboost1_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)962 static int es7210_micboost1_setting_set(struct snd_kcontrol *kcontrol,
963 struct snd_ctl_elem_value *ucontrol)
964 {
965 es7210_update_bits(0x43, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[0]);
966 return 0;
967 }
968
es7210_micboost1_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)969 static int es7210_micboost1_setting_get(struct snd_kcontrol *kcontrol,
970 struct snd_ctl_elem_value *ucontrol)
971 {
972 u8 val = 0;
973 es7210_read(0x43, &val, i2c_clt1[0]);
974 ucontrol->value.integer.value[0] = val;
975 return 0;
976 }
977
es7210_micboost2_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)978 static int es7210_micboost2_setting_set(struct snd_kcontrol *kcontrol,
979 struct snd_ctl_elem_value *ucontrol)
980 {
981 es7210_update_bits(0x44, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[0]);
982 return 0;
983 }
984
es7210_micboost2_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)985 static int es7210_micboost2_setting_get(struct snd_kcontrol *kcontrol,
986 struct snd_ctl_elem_value *ucontrol)
987 {
988 u8 val = 0;
989 es7210_read(0x44, &val, i2c_clt1[0]);
990 ucontrol->value.integer.value[0] = val;
991 return 0;
992 }
993
es7210_micboost3_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)994 static int es7210_micboost3_setting_set(struct snd_kcontrol *kcontrol,
995 struct snd_ctl_elem_value *ucontrol)
996 {
997 es7210_update_bits(0x45, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[0]);
998 return 0;
999 }
1000
es7210_micboost3_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1001 static int es7210_micboost3_setting_get(struct snd_kcontrol *kcontrol,
1002 struct snd_ctl_elem_value *ucontrol)
1003 {
1004 u8 val = 0;
1005 es7210_read(0x45, &val, i2c_clt1[0]);
1006 ucontrol->value.integer.value[0] = val;
1007 return 0;
1008 }
es7210_micboost4_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1009 static int es7210_micboost4_setting_set(struct snd_kcontrol *kcontrol,
1010 struct snd_ctl_elem_value *ucontrol)
1011 {
1012 es7210_update_bits(0x46, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[0]);
1013 return 0;
1014 }
1015
es7210_micboost4_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1016 static int es7210_micboost4_setting_get(struct snd_kcontrol *kcontrol,
1017 struct snd_ctl_elem_value *ucontrol)
1018 {
1019 u8 val = 0;
1020 es7210_read(0x46, &val, i2c_clt1[0]);
1021 ucontrol->value.integer.value[0] = val;
1022 return 0;
1023 }
1024
es7210_adc1_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1025 static int es7210_adc1_mute_set(struct snd_kcontrol *kcontrol,
1026 struct snd_ctl_elem_value *ucontrol)
1027 {
1028 es7210_update_bits(ES7210_ADC12_MUTE_REG15, 0x01,
1029 ucontrol->value.integer.value[0]&0x01, i2c_clt1[0]);
1030 return 0;
1031 }
1032
es7210_adc1_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1033 static int es7210_adc1_mute_get(struct snd_kcontrol *kcontrol,
1034 struct snd_ctl_elem_value *ucontrol)
1035 {
1036 u8 val = 0;
1037 es7210_read(ES7210_ADC12_MUTE_REG15, &val, i2c_clt1[0]);
1038 ucontrol->value.integer.value[0] = val & 0x01;
1039 return 0;
1040 }
1041
es7210_adc2_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1042 static int es7210_adc2_mute_set(struct snd_kcontrol *kcontrol,
1043 struct snd_ctl_elem_value *ucontrol)
1044 {
1045 es7210_update_bits(ES7210_ADC12_MUTE_REG15, 0x02,
1046 (ucontrol->value.integer.value[0] & 0x01) << 1, i2c_clt1[0]);
1047 return 0;
1048 }
1049
es7210_adc2_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1050 static int es7210_adc2_mute_get(struct snd_kcontrol *kcontrol,
1051 struct snd_ctl_elem_value *ucontrol)
1052 {
1053 u8 val = 0;
1054 es7210_read(ES7210_ADC12_MUTE_REG15, &val, i2c_clt1[0]);
1055 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
1056 return 0;
1057 }
1058
es7210_adc3_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1059 static int es7210_adc3_mute_set(struct snd_kcontrol *kcontrol,
1060 struct snd_ctl_elem_value *ucontrol)
1061 {
1062 es7210_update_bits(ES7210_ADC34_MUTE_REG14, 0x01,
1063 ucontrol->value.integer.value[0]&0x01, i2c_clt1[0]);
1064 return 0;
1065 }
1066
es7210_adc3_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1067 static int es7210_adc3_mute_get(struct snd_kcontrol *kcontrol,
1068 struct snd_ctl_elem_value *ucontrol)
1069 {
1070 u8 val = 0;
1071 es7210_read(ES7210_ADC34_MUTE_REG14, &val, i2c_clt1[0]);
1072 ucontrol->value.integer.value[0] = val & 0x01;
1073 return 0;
1074 }
es7210_adc4_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1075 static int es7210_adc4_mute_set(struct snd_kcontrol *kcontrol,
1076 struct snd_ctl_elem_value *ucontrol)
1077 {
1078 es7210_update_bits(ES7210_ADC34_MUTE_REG14, 0x02,
1079 (ucontrol->value.integer.value[0] & 0x01) << 1, i2c_clt1[0]);
1080 return 0;
1081 }
1082
es7210_adc4_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1083 static int es7210_adc4_mute_get(struct snd_kcontrol *kcontrol,
1084 struct snd_ctl_elem_value *ucontrol)
1085 {
1086 u8 val = 0;
1087 es7210_read(ES7210_ADC34_MUTE_REG14, &val, i2c_clt1[0]);
1088 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
1089 return 0;
1090 }
1091
1092 #endif
1093
1094 #if ES7210_CHANNELS_MAX > 4
es7210_micboost5_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1095 static int es7210_micboost5_setting_set(struct snd_kcontrol *kcontrol,
1096 struct snd_ctl_elem_value *ucontrol)
1097 {
1098 es7210_update_bits(0x43, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[1]);
1099 return 0;
1100 }
1101
es7210_micboost5_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1102 static int es7210_micboost5_setting_get(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1104 {
1105 u8 val;
1106 es7210_read(0x43, &val, i2c_clt1[1]);
1107 ucontrol->value.integer.value[0] = val;
1108 return 0;
1109 }
es7210_micboost6_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1110 static int es7210_micboost6_setting_set(struct snd_kcontrol *kcontrol,
1111 struct snd_ctl_elem_value *ucontrol)
1112 {
1113 es7210_update_bits(0x44, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[1]);
1114 return 0;
1115 }
1116
es7210_micboost6_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1117 static int es7210_micboost6_setting_get(struct snd_kcontrol *kcontrol,
1118 struct snd_ctl_elem_value *ucontrol)
1119 {
1120 u8 val;
1121 es7210_read(0x44, &val, i2c_clt1[1]);
1122 ucontrol->value.integer.value[0] = val;
1123 return 0;
1124 }
es7210_micboost7_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1125 static int es7210_micboost7_setting_set(struct snd_kcontrol *kcontrol,
1126 struct snd_ctl_elem_value *ucontrol)
1127 {
1128 es7210_update_bits(0x45, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[1]);
1129 return 0;
1130 }
1131
es7210_micboost7_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1132 static int es7210_micboost7_setting_get(struct snd_kcontrol *kcontrol,
1133 struct snd_ctl_elem_value *ucontrol)
1134 {
1135 u8 val;
1136 es7210_read(0x45, &val, i2c_clt1[1]);
1137 ucontrol->value.integer.value[0] = val;
1138 return 0;
1139 }
es7210_micboost8_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1140 static int es7210_micboost8_setting_set(struct snd_kcontrol *kcontrol,
1141 struct snd_ctl_elem_value *ucontrol)
1142 {
1143 es7210_update_bits(0x46, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[1]);
1144 return 0;
1145 }
1146
es7210_micboost8_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1147 static int es7210_micboost8_setting_get(struct snd_kcontrol *kcontrol,
1148 struct snd_ctl_elem_value *ucontrol)
1149 {
1150 u8 val;
1151 es7210_read(0x46, &val, i2c_clt1[1]);
1152 ucontrol->value.integer.value[0] = val;
1153 return 0;
1154 }
es7210_adc5_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1155 static int es7210_adc5_mute_set(struct snd_kcontrol *kcontrol,
1156 struct snd_ctl_elem_value *ucontrol)
1157 {
1158 es7210_update_bits(ES7210_ADC12_MUTE_REG15, 0x01,
1159 ucontrol->value.integer.value[0]&0x01, i2c_clt1[1]);
1160 return 0;
1161 }
1162
es7210_adc5_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1163 static int es7210_adc5_mute_get(struct snd_kcontrol *kcontrol,
1164 struct snd_ctl_elem_value *ucontrol)
1165 {
1166 u8 val;
1167 es7210_read(ES7210_ADC12_MUTE_REG15, &val, i2c_clt1[1]);
1168 ucontrol->value.integer.value[0] = val & 0x01;
1169 return 0;
1170 }
1171
es7210_adc6_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1172 static int es7210_adc6_mute_set(struct snd_kcontrol *kcontrol,
1173 struct snd_ctl_elem_value *ucontrol)
1174 {
1175 es7210_update_bits(ES7210_ADC12_MUTE_REG15, 0x02,
1176 (ucontrol->value.integer.value[0] & 0x01) << 1, i2c_clt1[1]);
1177 return 0;
1178 }
1179
es7210_adc6_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1180 static int es7210_adc6_mute_get(struct snd_kcontrol *kcontrol,
1181 struct snd_ctl_elem_value *ucontrol)
1182 {
1183 u8 val;
1184 es7210_read(ES7210_ADC12_MUTE_REG15, &val, i2c_clt1[1]);
1185 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
1186 return 0;
1187 }
1188
es7210_adc7_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1189 static int es7210_adc7_mute_set(struct snd_kcontrol *kcontrol,
1190 struct snd_ctl_elem_value *ucontrol)
1191 {
1192 es7210_update_bits(ES7210_ADC34_MUTE_REG14, 0x01,
1193 ucontrol->value.integer.value[0]&0x01, i2c_clt1[1]);
1194 return 0;
1195 }
1196
es7210_adc7_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1197 static int es7210_adc7_mute_get(struct snd_kcontrol *kcontrol,
1198 struct snd_ctl_elem_value *ucontrol)
1199 {
1200 u8 val;
1201 es7210_read(ES7210_ADC34_MUTE_REG14, &val, i2c_clt1[1]);
1202 ucontrol->value.integer.value[0] = val & 0x01;
1203 return 0;
1204 }
es7210_adc8_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1205 static int es7210_adc8_mute_set(struct snd_kcontrol *kcontrol,
1206 struct snd_ctl_elem_value *ucontrol)
1207 {
1208 es7210_update_bits(ES7210_ADC34_MUTE_REG14, 0x02,
1209 (ucontrol->value.integer.value[0] & 0x01) << 1, i2c_clt1[1]);
1210 return 0;
1211 }
1212
es7210_adc8_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1213 static int es7210_adc8_mute_get(struct snd_kcontrol *kcontrol,
1214 struct snd_ctl_elem_value *ucontrol)
1215 {
1216 u8 val;
1217 es7210_read(ES7210_ADC34_MUTE_REG14, &val, i2c_clt1[1]);
1218 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
1219 return 0;
1220 }
1221
1222 #endif
1223 #if ES7210_CHANNELS_MAX > 8
es7210_micboost9_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1224 static int es7210_micboost9_setting_set(struct snd_kcontrol *kcontrol,
1225 struct snd_ctl_elem_value *ucontrol)
1226 {
1227 es7210_update_bits(0x43, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[2]);
1228 return 0;
1229 }
1230
es7210_micboost9_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1231 static int es7210_micboost9_setting_get(struct snd_kcontrol *kcontrol,
1232 struct snd_ctl_elem_value *ucontrol)
1233 {
1234 u8 val;
1235 es7210_read(0x43, &val, i2c_clt1[2]);
1236 ucontrol->value.integer.value[0] = val;
1237 return 0;
1238 }
es7210_micboost10_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1239 static int es7210_micboost10_setting_set(struct snd_kcontrol *kcontrol,
1240 struct snd_ctl_elem_value *ucontrol)
1241 {
1242 es7210_update_bits(0x44, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[2]);
1243 return 0;
1244 }
1245
es7210_micboost10_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1246 static int es7210_micboost10_setting_get(struct snd_kcontrol *kcontrol,
1247 struct snd_ctl_elem_value *ucontrol)
1248 {
1249 u8 val;
1250 es7210_read(0x44, &val, i2c_clt1[2]);
1251 ucontrol->value.integer.value[0] = val;
1252 return 0;
1253 }
es7210_micboost11_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1254 static int es7210_micboost11_setting_set(struct snd_kcontrol *kcontrol,
1255 struct snd_ctl_elem_value *ucontrol)
1256 {
1257 es7210_update_bits(0x45, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[2]);
1258 return 0;
1259 }
1260
es7210_micboost11_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1261 static int es7210_micboost11_setting_get(struct snd_kcontrol *kcontrol,
1262 struct snd_ctl_elem_value *ucontrol)
1263 {
1264 u8 val;
1265 es7210_read(0x45, &val, i2c_clt1[2]);
1266 ucontrol->value.integer.value[0] = val;
1267 return 0;
1268 }
es7210_micboost12_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1269 static int es7210_micboost12_setting_set(struct snd_kcontrol *kcontrol,
1270 struct snd_ctl_elem_value *ucontrol)
1271 {
1272 es7210_update_bits(0x46, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[2]);
1273 return 0;
1274 }
1275
es7210_micboost12_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1276 static int es7210_micboost12_setting_get(struct snd_kcontrol *kcontrol,
1277 struct snd_ctl_elem_value *ucontrol)
1278 {
1279 u8 val;
1280 es7210_read(0x46, &val, i2c_clt1[2]);
1281 ucontrol->value.integer.value[0] = val;
1282 return 0;
1283 }
es7210_adc9_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1284 static int es7210_adc9_mute_set(struct snd_kcontrol *kcontrol,
1285 struct snd_ctl_elem_value *ucontrol)
1286 {
1287 es7210_update_bits(ES7210_ADC12_MUTE_REG15, 0x01,
1288 ucontrol->value.integer.value[0]&0x01, i2c_clt1[2]);
1289 return 0;
1290 }
1291
es7210_adc9_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1292 static int es7210_adc9_mute_get(struct snd_kcontrol *kcontrol,
1293 struct snd_ctl_elem_value *ucontrol)
1294 {
1295 u8 val;
1296 es7210_read(ES7210_ADC12_MUTE_REG15, &val, i2c_clt1[2]);
1297 ucontrol->value.integer.value[0] = val & 0x01;
1298 return 0;
1299 }
1300
es7210_adc10_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1301 static int es7210_adc10_mute_set(struct snd_kcontrol *kcontrol,
1302 struct snd_ctl_elem_value *ucontrol)
1303 {
1304 es7210_update_bits(ES7210_ADC12_MUTE_REG15, 0x02,
1305 (ucontrol->value.integer.value[0] & 0x01) << 1, i2c_clt1[2]);
1306 return 0;
1307 }
1308
es7210_adc10_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1309 static int es7210_adc10_mute_get(struct snd_kcontrol *kcontrol,
1310 struct snd_ctl_elem_value *ucontrol)
1311 {
1312 u8 val;
1313 es7210_read(ES7210_ADC12_MUTE_REG15, &val, i2c_clt1[2]);
1314 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
1315 return 0;
1316 }
1317
es7210_adc11_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1318 static int es7210_adc11_mute_set(struct snd_kcontrol *kcontrol,
1319 struct snd_ctl_elem_value *ucontrol)
1320 {
1321 es7210_update_bits(ES7210_ADC34_MUTE_REG14, 0x01,
1322 ucontrol->value.integer.value[0]&0x01, i2c_clt1[2]);
1323 return 0;
1324 }
1325
es7210_adc11_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1326 static int es7210_adc11_mute_get(struct snd_kcontrol *kcontrol,
1327 struct snd_ctl_elem_value *ucontrol)
1328 {
1329 u8 val;
1330 es7210_read(ES7210_ADC34_MUTE_REG14, &val, i2c_clt1[2]);
1331 ucontrol->value.integer.value[0] = val & 0x01;
1332 return 0;
1333 }
es7210_adc12_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1334 static int es7210_adc12_mute_set(struct snd_kcontrol *kcontrol,
1335 struct snd_ctl_elem_value *ucontrol)
1336 {
1337 es7210_update_bits(ES7210_ADC34_MUTE_REG14, 0x02,
1338 (ucontrol->value.integer.value[0] & 0x01) << 1, i2c_clt1[2]);
1339 return 0;
1340 }
1341
es7210_adc12_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1342 static int es7210_adc12_mute_get(struct snd_kcontrol *kcontrol,
1343 struct snd_ctl_elem_value *ucontrol)
1344 {
1345 u8 val;
1346 es7210_read(ES7210_ADC34_MUTE_REG14, &val, i2c_clt1[2]);
1347 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
1348 return 0;
1349 }
1350
1351 #endif
1352 #if ES7210_CHANNELS_MAX > 12
es7210_micboost13_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1353 static int es7210_micboost13_setting_set(struct snd_kcontrol *kcontrol,
1354 struct snd_ctl_elem_value *ucontrol)
1355 {
1356 es7210_update_bits(0x43, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[3]);
1357 return 0;
1358 }
1359
es7210_micboost13_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1360 static int es7210_micboost13_setting_get(struct snd_kcontrol *kcontrol,
1361 struct snd_ctl_elem_value *ucontrol)
1362 {
1363 u8 val;
1364 es7210_read(0x43, &val, i2c_clt1[3]);
1365 ucontrol->value.integer.value[0] = val;
1366 return 0;
1367 }
es7210_micboost14_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1368 static int es7210_micboost14_setting_set(struct snd_kcontrol *kcontrol,
1369 struct snd_ctl_elem_value *ucontrol)
1370 {
1371 es7210_update_bits(0x44, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[3]);
1372 return 0;
1373 }
1374
es7210_micboost14_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1375 static int es7210_micboost14_setting_get(struct snd_kcontrol *kcontrol,
1376 struct snd_ctl_elem_value *ucontrol)
1377 {
1378 u8 val;
1379 es7210_read(0x44, &val, i2c_clt1[3]);
1380 ucontrol->value.integer.value[0] = val;
1381 return 0;
1382 }
es7210_micboost15_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1383 static int es7210_micboost15_setting_set(struct snd_kcontrol *kcontrol,
1384 struct snd_ctl_elem_value *ucontrol)
1385 {
1386 es7210_update_bits(0x45, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[3]);
1387 return 0;
1388 }
1389
es7210_micboost15_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1390 static int es7210_micboost15_setting_get(struct snd_kcontrol *kcontrol,
1391 struct snd_ctl_elem_value *ucontrol)
1392 {
1393 u8 val;
1394 es7210_read(0x45, &val, i2c_clt1[3]);
1395 ucontrol->value.integer.value[0] = val;
1396 return 0;
1397 }
es7210_micboost16_setting_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1398 static int es7210_micboost16_setting_set(struct snd_kcontrol *kcontrol,
1399 struct snd_ctl_elem_value *ucontrol)
1400 {
1401 es7210_update_bits(0x46, 0x0F, ucontrol->value.integer.value[0], i2c_clt1[3]);
1402 return 0;
1403 }
1404
es7210_micboost16_setting_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1405 static int es7210_micboost16_setting_get(struct snd_kcontrol *kcontrol,
1406 struct snd_ctl_elem_value *ucontrol)
1407 {
1408 u8 val;
1409 es7210_read(0x46, &val, i2c_clt1[3]);
1410 ucontrol->value.integer.value[0] = val;
1411 return 0;
1412 }
es7210_adc13_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1413 static int es7210_adc13_mute_set(struct snd_kcontrol *kcontrol,
1414 struct snd_ctl_elem_value *ucontrol)
1415 {
1416 es7210_update_bits(ES7210_ADC12_MUTE_REG15, 0x01,
1417 ucontrol->value.integer.value[0]&0x01, i2c_clt1[3]);
1418 return 0;
1419 }
1420
es7210_adc13_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1421 static int es7210_adc13_mute_get(struct snd_kcontrol *kcontrol,
1422 struct snd_ctl_elem_value *ucontrol)
1423 {
1424 u8 val;
1425 es7210_read(ES7210_ADC12_MUTE_REG15, &val, i2c_clt1[3]);
1426 ucontrol->value.integer.value[0] = val & 0x01;
1427 return 0;
1428 }
1429
es7210_adc14_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1430 static int es7210_adc14_mute_set(struct snd_kcontrol *kcontrol,
1431 struct snd_ctl_elem_value *ucontrol)
1432 {
1433 es7210_update_bits(ES7210_ADC12_MUTE_REG15, 0x02,
1434 (ucontrol->value.integer.value[0] & 0x01) << 1, i2c_clt1[3]);
1435 return 0;
1436 }
1437
es7210_adc14_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1438 static int es7210_adc14_mute_get(struct snd_kcontrol *kcontrol,
1439 struct snd_ctl_elem_value *ucontrol)
1440 {
1441 u8 val;
1442 es7210_read(ES7210_ADC12_MUTE_REG15, &val, i2c_clt1[3]);
1443 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
1444 return 0;
1445 }
1446
es7210_adc15_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1447 static int es7210_adc15_mute_set(struct snd_kcontrol *kcontrol,
1448 struct snd_ctl_elem_value *ucontrol)
1449 {
1450 es7210_update_bits(ES7210_ADC34_MUTE_REG14, 0x01,
1451 ucontrol->value.integer.value[0]&0x01, i2c_clt1[3]);
1452 return 0;
1453 }
1454
es7210_adc15_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1455 static int es7210_adc15_mute_get(struct snd_kcontrol *kcontrol,
1456 struct snd_ctl_elem_value *ucontrol)
1457 {
1458 u8 val;
1459 es7210_read(ES7210_ADC34_MUTE_REG14, &val, i2c_clt1[3]);
1460 ucontrol->value.integer.value[0] = val & 0x01;
1461 return 0;
1462 }
es7210_adc16_mute_set(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1463 static int es7210_adc16_mute_set(struct snd_kcontrol *kcontrol,
1464 struct snd_ctl_elem_value *ucontrol)
1465 {
1466 es7210_update_bits(ES7210_ADC34_MUTE_REG14, 0x02,
1467 (ucontrol->value.integer.value[0] & 0x01) << 1, i2c_clt1[3]);
1468 return 0;
1469 }
1470
es7210_adc16_mute_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1471 static int es7210_adc16_mute_get(struct snd_kcontrol *kcontrol,
1472 struct snd_ctl_elem_value *ucontrol)
1473 {
1474 u8 val;
1475 es7210_read(ES7210_ADC34_MUTE_REG14, &val, i2c_clt1[3]);
1476 ucontrol->value.integer.value[0] = (val & 0x02) >> 1;
1477 return 0;
1478 }
1479
1480 #endif
1481 static const struct snd_kcontrol_new es7210_snd_controls[] = {
1482 #if ES7210_CHANNELS_MAX > 0
1483 SOC_SINGLE_EXT_TLV("PGA1_setting",
1484 0x43, 0, 0x0E, 0,
1485 es7210_micboost1_setting_get, es7210_micboost1_setting_set,
1486 mic_boost_tlv),
1487 SOC_SINGLE_EXT_TLV("PGA2_setting",
1488 0x44, 0, 0x0E, 0,
1489 es7210_micboost2_setting_get, es7210_micboost2_setting_set,
1490 mic_boost_tlv),
1491 SOC_SINGLE_EXT_TLV("PGA3_setting",
1492 0x45, 0, 0x0E, 0,
1493 es7210_micboost3_setting_get, es7210_micboost3_setting_set,
1494 mic_boost_tlv),
1495 SOC_SINGLE_EXT_TLV("PGA4_setting",
1496 0x46, 0, 0x0E, 0,
1497 es7210_micboost4_setting_get, es7210_micboost4_setting_set,
1498 mic_boost_tlv),
1499 SOC_SINGLE_EXT("ADC1_MUTE", ES7210_ADC12_MUTE_REG15, 0, 1, 0,
1500 es7210_adc1_mute_get, es7210_adc1_mute_set),
1501 SOC_SINGLE_EXT("ADC2_MUTE", ES7210_ADC12_MUTE_REG15, 1, 1, 0,
1502 es7210_adc2_mute_get, es7210_adc2_mute_set),
1503 SOC_SINGLE_EXT("ADC3_MUTE", ES7210_ADC34_MUTE_REG14, 0, 1, 0,
1504 es7210_adc3_mute_get, es7210_adc3_mute_set),
1505 SOC_SINGLE_EXT("ADC4_MUTE", ES7210_ADC34_MUTE_REG14, 1, 1, 0,
1506 es7210_adc4_mute_get, es7210_adc4_mute_set),
1507 #endif
1508 #if ES7210_CHANNELS_MAX > 4
1509 SOC_SINGLE_EXT_TLV("PGA5_setting",
1510 0x43, 0, 0x0E, 0,
1511 es7210_micboost5_setting_get, es7210_micboost5_setting_set,
1512 mic_boost_tlv),
1513 SOC_SINGLE_EXT_TLV("PGA6_setting",
1514 0x44, 0, 0x0E, 0,
1515 es7210_micboost6_setting_get, es7210_micboost6_setting_set,
1516 mic_boost_tlv),
1517 SOC_SINGLE_EXT_TLV("PGA7_setting",
1518 0x45, 0, 0x0E, 0,
1519 es7210_micboost7_setting_get, es7210_micboost7_setting_set,
1520 mic_boost_tlv),
1521 SOC_SINGLE_EXT_TLV("PGA8_setting",
1522 0x46, 0, 0x0E, 0,
1523 es7210_micboost8_setting_get, es7210_micboost8_setting_set,
1524 mic_boost_tlv),
1525 SOC_SINGLE_EXT("ADC5_MUTE", ES7210_ADC12_MUTE_REG15, 0, 1, 0,
1526 es7210_adc5_mute_get, es7210_adc5_mute_set),
1527 SOC_SINGLE_EXT("ADC6_MUTE", ES7210_ADC12_MUTE_REG15, 1, 1, 0,
1528 es7210_adc6_mute_get, es7210_adc6_mute_set),
1529 SOC_SINGLE_EXT("ADC7_MUTE", ES7210_ADC34_MUTE_REG14, 0, 1, 0,
1530 es7210_adc7_mute_get, es7210_adc7_mute_set),
1531 SOC_SINGLE_EXT("ADC8_MUTE", ES7210_ADC34_MUTE_REG14, 1, 1, 0,
1532 es7210_adc8_mute_get, es7210_adc8_mute_set),
1533
1534 #endif
1535 #if ES7210_CHANNELS_MAX > 8
1536 SOC_SINGLE_EXT_TLV("PGA9_setting",
1537 0x43, 0, 0x0E, 0,
1538 es7210_micboost9_setting_get, es7210_micboost9_setting_set,
1539 mic_boost_tlv),
1540 SOC_SINGLE_EXT_TLV("PGA10_setting",
1541 0x44, 0, 0x0E, 0,
1542 es7210_micboost10_setting_get, es7210_micboost10_setting_set,
1543 mic_boost_tlv),
1544 SOC_SINGLE_EXT_TLV("PGA11_setting",
1545 0x45, 0, 0x0E, 0,
1546 es7210_micboost11_setting_get, es7210_micboost11_setting_set,
1547 mic_boost_tlv),
1548 SOC_SINGLE_EXT_TLV("PGA12_setting",
1549 0x46, 0, 0x0E, 0,
1550 es7210_micboost12_setting_get, es7210_micboost12_setting_set,
1551 mic_boost_tlv),
1552 SOC_SINGLE_EXT("ADC9_MUTE", ES7210_ADC12_MUTE_REG15, 0, 1, 0,
1553 es7210_adc9_mute_get, es7210_adc9_mute_set),
1554 SOC_SINGLE_EXT("ADC10_MUTE", ES7210_ADC12_MUTE_REG15, 1, 1, 0,
1555 es7210_adc10_mute_get, es7210_adc10_mute_set),
1556 SOC_SINGLE_EXT("ADC11_MUTE", ES7210_ADC34_MUTE_REG14, 0, 1, 0,
1557 es7210_adc11_mute_get, es7210_adc11_mute_set),
1558 SOC_SINGLE_EXT("ADC12_MUTE", ES7210_ADC34_MUTE_REG14, 1, 1, 0,
1559 es7210_adc12_mute_get, es7210_adc12_mute_set),
1560
1561 #endif
1562 #if ES7210_CHANNELS_MAX > 12
1563 SOC_SINGLE_EXT_TLV("PGA13_setting",
1564 0x43, 0, 0x0E, 0,
1565 es7210_micboost13_setting_get, es7210_micboost13_setting_set,
1566 mic_boost_tlv),
1567 SOC_SINGLE_EXT_TLV("PGA14_setting",
1568 0x44, 0, 0x0E, 0,
1569 es7210_micboost14_setting_get, es7210_micboost14_setting_set,
1570 mic_boost_tlv),
1571 SOC_SINGLE_EXT_TLV("PGA15_setting",
1572 0x45, 0, 0x0E, 0,
1573 es7210_micboost15_setting_get, es7210_micboost15_setting_set,
1574 mic_boost_tlv),
1575 SOC_SINGLE_EXT_TLV("PGA16_setting",
1576 0x46, 0, 0x0E, 0,
1577 es7210_micboost16_setting_get, es7210_micboost16_setting_set,
1578 mic_boost_tlv),
1579 SOC_SINGLE_EXT("ADC13_MUTE", ES7210_ADC12_MUTE_REG15, 0, 1, 0,
1580 es7210_adc13_mute_get, es7210_adc13_mute_set),
1581 SOC_SINGLE_EXT("ADC14_MUTE", ES7210_ADC12_MUTE_REG15, 1, 1, 0,
1582 es7210_adc14_mute_get, es7210_adc14_mute_set),
1583 SOC_SINGLE_EXT("ADC15_MUTE", ES7210_ADC34_MUTE_REG14, 0, 1, 0,
1584 es7210_adc15_mute_get, es7210_adc15_mute_set),
1585 SOC_SINGLE_EXT("ADC16_MUTE", ES7210_ADC34_MUTE_REG14, 1, 1, 0,
1586 es7210_adc16_mute_get, es7210_adc16_mute_set),
1587
1588 #endif
1589
1590 };
1591
1592 static struct snd_soc_component_driver soc_codec_dev_es7210 = {
1593 .probe = es7210_probe,
1594 .remove = es7210_remove,
1595 .suspend = es7210_suspend,
1596 .resume = es7210_resume,
1597 .set_bias_level = es7210_set_bias_level,
1598 .controls = es7210_snd_controls,
1599 .num_controls = ARRAY_SIZE(es7210_snd_controls),
1600 };
1601
es7210_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1602 static ssize_t es7210_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
1603 {
1604 int val = 0, flag = 0;
1605 u8 i = 0, reg, num, value_w, value_r;
1606
1607 struct es7210_priv *es7210 = dev_get_drvdata(dev);
1608 val = simple_strtol(buf, NULL, 16);
1609 flag = (val >> 16) & 0xFF;
1610
1611 if (flag) {
1612 reg = (val >> 8) & 0xFF;
1613 value_w = val & 0xFF;
1614 printk("\nWrite: start REG:0x%02x,val:0x%02x,count:0x%02x\n", reg, value_w, flag);
1615 while (flag--) {
1616 es7210_write(reg, value_w, es7210->i2c_client);
1617 printk("Write 0x%02x to REG:0x%02x\n", value_w, reg);
1618 reg++;
1619 }
1620 } else {
1621 reg = (val >> 8) & 0xFF;
1622 num = val & 0xff;
1623 printk("\nRead: start REG:0x%02x,count:0x%02x\n", reg, num);
1624 do {
1625 value_r = 0;
1626 es7210_read(reg, &value_r, es7210->i2c_client);
1627 printk("REG[0x%02x]: 0x%02x; ", reg, value_r);
1628 reg++;
1629 i++;
1630 if ((i == num) || (i % 4 == 0)) printk("\n");
1631 } while (i < num);
1632 }
1633
1634 return count;
1635 }
1636
es7210_show(struct device * dev,struct device_attribute * attr,char * buf)1637 static ssize_t es7210_show(struct device *dev, struct device_attribute *attr, char *buf)
1638 {
1639 printk("echo flag|reg|val > es7210\n");
1640 printk("eg read star address=0x06,count 0x10:echo 0610 >es7210\n");
1641 printk("eg write star address=0x90,value=0x3c,count=4:echo 4903c >es7210\n");
1642 return 0;
1643 }
1644
1645 static DEVICE_ATTR(es7210, 0644, es7210_show, es7210_store);
1646
1647 static struct attribute *es7210_debug_attrs[] = {
1648 &dev_attr_es7210.attr,
1649 NULL,
1650 };
1651
1652 static struct attribute_group es7210_debug_attr_group = {
1653 .name = "es7210_debug",
1654 .attrs = es7210_debug_attrs,
1655 };
1656
1657 /*
1658 * If the i2c layer weren't so broken, we could pass this kind of data
1659 * around
1660 */
es7210_i2c_probe(struct i2c_client * i2c_client,const struct i2c_device_id * i2c_id)1661 static int es7210_i2c_probe(struct i2c_client *i2c_client,
1662 const struct i2c_device_id *i2c_id)
1663 {
1664 struct es7210_priv *es7210;
1665 int ret;
1666
1667 printk("begin->>>>>>>>>>%s!\n", __func__);
1668
1669 es7210 = devm_kzalloc(&i2c_client->dev, sizeof(struct es7210_priv),
1670 GFP_KERNEL);
1671 if (es7210 == NULL)
1672 return -ENOMEM;
1673 es7210->i2c_client = i2c_client;
1674 es7210->tdm_mode = ES7210_WORK_MODE; //to set tdm mode or normal mode
1675 i2c_set_clientdata(i2c_client, es7210);
1676 if (i2c_id->driver_data < ADC_DEV_MAXNUM) {
1677 i2c_clt1[i2c_id->driver_data] = i2c_client;
1678 ret = devm_snd_soc_register_component(&i2c_client->dev, &soc_codec_dev_es7210,
1679 es7210_dai[i2c_id->driver_data], 1);
1680 if (ret < 0) {
1681 return ret;
1682 }
1683 }
1684 ret = sysfs_create_group(&i2c_client->dev.kobj, &es7210_debug_attr_group);
1685 if (ret) {
1686 pr_err("failed to create attr group\n");
1687 }
1688 printk("%s success!\n", __func__);
1689 return ret;
1690 }
1691
es7210_i2c_remove(struct i2c_client * client)1692 static int es7210_i2c_remove(struct i2c_client *client)
1693 {
1694 sysfs_remove_group(&client->dev.kobj, &es7210_debug_attr_group);
1695
1696 return 0;
1697 }
1698
1699 static const struct i2c_device_id es7210_i2c_id[] = {
1700 #if ES7210_CHANNELS_MAX > 0
1701 { "ES7210_MicArray_0", 0 },//es7210_0
1702 #endif
1703
1704 #if ES7210_CHANNELS_MAX > 4
1705 { "ES7210_MicArray_1", 1 },//es7210_1
1706 #endif
1707
1708 #if ES7210_CHANNELS_MAX > 8
1709 { "ES7210_MicArray_2", 2 },//es7210_2
1710 #endif
1711
1712 #if ES7210_CHANNELS_MAX > 12
1713 { "ES7210_MicArray_3", 3 },//es7210_3
1714 #endif
1715 { }
1716 };
1717 MODULE_DEVICE_TABLE(i2c_client, es7210_i2c_id);
1718
1719 static const struct of_device_id es7210_dt_ids[] = {
1720 #if ES7210_CHANNELS_MAX > 0
1721 { .compatible = "ES7210_MicArray_0", },//es7210_0
1722 #endif
1723
1724 #if ES7210_CHANNELS_MAX > 4
1725 { .compatible = "ES7210_MicArray_1", },//es7210_1
1726 #endif
1727
1728 #if ES7210_CHANNELS_MAX > 8
1729 { .compatible = "ES7210_MicArray_2", },//es7210_2
1730 #endif
1731
1732 #if ES7210_CHANNELS_MAX > 12
1733 { .compatible = "ES7210_MicArray_3", },//es7210_3
1734 #endif
1735 { }
1736 };
1737 MODULE_DEVICE_TABLE(of, es7210_dt_ids);
1738
1739 static struct i2c_driver es7210_i2c_driver = {
1740 .driver = {
1741 .name = "es7210",
1742 .owner = THIS_MODULE,
1743 .of_match_table = es7210_dt_ids,
1744 },
1745 .probe = es7210_i2c_probe,
1746 .remove = es7210_i2c_remove,
1747 .id_table = es7210_i2c_id,
1748
1749 };
1750 module_i2c_driver(es7210_i2c_driver);
1751
1752 MODULE_DESCRIPTION("ASoC ES7210 audio adc driver");
1753 MODULE_AUTHOR("David Yang <yangxiaohua@everest-semi.com> / info@everest-semi.com");
1754 MODULE_LICENSE("GPL v2");
1755