xref: /OK3568_Linux_fs/kernel/sound/soc/codecs/aw883xx/aw883xx.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 
3 #ifndef __AW883XX_H__
4 #define __AW883XX_H__
5 
6 #include <linux/version.h>
7 #include <sound/control.h>
8 #include <sound/soc.h>
9 #include "aw_device.h"
10 
11 /*#define AW_QCOM_PLATFORM*/
12 #define AW_MTK_PLATFORM
13 /*#define AW_SPRD_PLATFORM*/
14 
15 #define AW883XX_CHIP_ID_REG	(0x00)
16 
17 #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 19, 1)
18 #define AW_KERNEL_VER_OVER_4_19_1
19 #endif
20 
21 #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)
22 #define AW_KERNEL_VER_OVER_5_4_0
23 MODULE_IMPORT_NS(VFS_internal_I_am_really_a_filesystem_and_am_NOT_a_driver);
24 #endif
25 
26 /* i2c transaction on Linux limited to 64k
27  * (See Linux kernel documentation: Documentation/i2c/writing-clients)
28 */
29 #define MAX_I2C_BUFFER_SIZE		(65536)
30 #define AW883XX_READ_MSG_NUM		(2)
31 
32 #define AW_I2C_RETRIES			(5)
33 #define AW_I2C_RETRY_DELAY		(5)/* 5ms */
34 
35 #define AW_READ_CHIPID_RETRY_DELAY	(5)/* 5ms */
36 #define AW_START_RETRIES		(5)
37 
38 #define AW883XX_FLAG_START_ON_MUTE	(1 << 0)
39 #define AW883XX_FLAG_SKIP_INTERRUPTS	(1 << 1)
40 
41 #define AW883XX_I2S_CHECK_MAX		(5)
42 
43 #define AW883XX_SYSST_CHECK_MAX		(10)
44 
45 #define AW883XX_BIN_TYPE_NUM		(3)
46 #define AW883XX_LOAD_FW_DELAY_TIME	(3000)
47 #define AW883XX_START_WORK_DELAY_MS	(0)
48 
49 
50 #define AW883XX_DSP_16_DATA_MASK	(0x0000ffff)
51 
52 #define AW_GET_IV_CNT_MAX		(6)
53 #define AW_KCONTROL_NUM			(3)
54 #define AW_HW_MONITOR_DELAY		(1000)
55 
56 enum {
57 	AWRW_I2C_ST_NONE = 0,
58 	AWRW_I2C_ST_READ,
59 	AWRW_I2C_ST_WRITE,
60 };
61 
62 enum {
63 	AWRW_DSP_ST_NONE = 0,
64 	AWRW_DSP_READY,
65 };
66 
67 enum {
68 	AW_SYNC_START = 0,
69 	AW_ASYNC_START,
70 };
71 
72 
73 #define AWRW_ADDR_BYTES (1)
74 #define AWRW_DATA_BYTES (2)
75 #define AWRW_HDR_LEN (24)
76 
77 enum {
78 	AWRW_FLAG_WRITE = 0,
79 	AWRW_FLAG_READ,
80 };
81 
82 enum {
83 	AWRW_HDR_WR_FLAG = 0,
84 	AWRW_HDR_ADDR_BYTES,
85 	AWRW_HDR_DATA_BYTES,
86 	AWRW_HDR_REG_NUM,
87 	AWRW_HDR_REG_ADDR,
88 	AWRW_HDR_MAX,
89 };
90 
91 struct aw883xx_i2c_packet{
92 	unsigned char i2c_status;
93 	unsigned char dsp_status;
94 	unsigned int reg_num;
95 	unsigned int reg_addr;
96 	unsigned int dsp_addr;
97 	char *reg_data;
98 };
99 
100 
101 
102 enum {
103 	AW883XX_STREAM_CLOSE = 0,
104 	AW883XX_STREAM_OPEN,
105 };
106 
107 enum aw883xx_init {
108 	AW883XX_INIT_ST = 0,
109 	AW883XX_INIT_OK = 1,
110 	AW883XX_INIT_NG = 2,
111 };
112 
113 enum aw_re_range {
114 	AW_RE_MIN = 1000,
115 	AW_RE_MAX = 40000,
116 };
117 
118 
119 /********************************************
120  *
121  * Compatible with codec and component
122  *
123  *******************************************/
124 #ifdef AW_KERNEL_VER_OVER_4_19_1
125 typedef struct snd_soc_component aw_snd_soc_codec_t;
126 typedef struct snd_soc_component_driver aw_snd_soc_codec_driver_t;
127 #else
128 typedef struct snd_soc_codec aw_snd_soc_codec_t;
129 typedef struct snd_soc_codec_driver aw_snd_soc_codec_driver_t;
130 #endif
131 
132 struct aw_componet_codec_ops {
133 	aw_snd_soc_codec_t *(*kcontrol_codec)(struct snd_kcontrol *kcontrol);
134 	void *(*codec_get_drvdata)(aw_snd_soc_codec_t *codec);
135 	int (*add_codec_controls)(aw_snd_soc_codec_t *codec,
136 		const struct snd_kcontrol_new *controls, unsigned int num_controls);
137 	void (*unregister_codec)(struct device *dev);
138 	int (*register_codec)(struct device *dev,
139 			const aw_snd_soc_codec_driver_t *codec_drv,
140 			struct snd_soc_dai_driver *dai_drv,
141 			int num_dai);
142 };
143 
144 struct aw883xx {
145 	struct i2c_client *i2c;
146 	struct device *dev;
147 	struct clk *mclk;
148 	struct mutex lock;
149 	struct mutex i2c_lock;
150 	aw_snd_soc_codec_t *codec;
151 	struct aw_componet_codec_ops *codec_ops;
152 	struct aw_device *aw_pa;
153 
154 	int sysclk;
155 	int reset_gpio;
156 	int irq_gpio;
157 
158 	unsigned char phase_sync;	/*phase sync*/
159 	uint32_t allow_pw;
160 	uint8_t pstream;
161 	unsigned char fw_retry_cnt;
162 
163 	uint8_t dbg_en_prof;
164 	uint8_t i2c_log_en;
165 	uint8_t spin_flag;
166 
167 	struct list_head list;
168 
169 	struct workqueue_struct *work_queue;
170 	struct delayed_work start_work;
171 	struct delayed_work monitor_work;
172 	struct delayed_work interrupt_work;
173 	struct delayed_work acf_work;
174 
175 	uint8_t reg_addr;
176 	uint16_t dsp_addr;
177 	uint16_t chip_id;
178 	struct aw883xx_i2c_packet i2c_packet;
179 };
180 
181 int aw883xx_init(struct aw883xx *aw883xx);
182 int aw883xx_i2c_writes(struct aw883xx *aw883xx,
183 		uint8_t reg_addr, uint8_t *buf, uint16_t len);
184 int aw883xx_i2c_write(struct aw883xx *aw883xx,
185 		uint8_t reg_addr, uint16_t reg_data);
186 int aw883xx_reg_write(struct aw883xx *aw883xx,
187 		uint8_t reg_addr, uint16_t reg_data);
188 int aw883xx_i2c_read(struct aw883xx *aw883xx,
189 			uint8_t reg_addr, uint16_t *reg_data);
190 int aw883xx_reg_read(struct aw883xx *aw883xx,
191 		uint8_t reg_addr, uint16_t *reg_data);
192 int aw883xx_reg_write_bits(struct aw883xx *aw883xx,
193 		uint8_t reg_addr, uint16_t mask, uint16_t reg_data);
194 int aw883xx_dsp_write(struct aw883xx *aw883xx,
195 		uint16_t dsp_addr, uint32_t dsp_data, uint8_t data_type);
196 int aw883xx_dsp_read(struct aw883xx *aw883xx,
197 		uint16_t dsp_addr, uint32_t *dsp_data, uint8_t data_type);
198 int aw883xx_get_dev_num(void);
199 int aw883xx_get_version(char *buf, int size);
200 
201 #endif
202