1 /*
2 * aw_device.c aw87xxx pa module
3 *
4 * Copyright (c) 2021 AWINIC Technology CO., LTD
5 *
6 * Author: Barry <zhaozhongbo@awinic.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15 #include <linux/i2c.h>
16 #include <linux/gpio.h>
17 #include <linux/of_gpio.h>
18 #include <linux/interrupt.h>
19 #include <linux/delay.h>
20 #include <linux/kernel.h>
21 #include <linux/device.h>
22 #include <linux/irq.h>
23 #include <linux/io.h>
24 #include <linux/init.h>
25 #include <linux/timer.h>
26 #include "aw87xxx.h"
27 #include "aw_device.h"
28 #include "aw_log.h"
29 #include "aw87xxx_pid_9b_reg.h"
30 #include "aw87xxx_pid_18_reg.h"
31 #include "aw87xxx_pid_39_reg.h"
32 #include "aw87xxx_pid_59_3x9_reg.h"
33 #include "aw87xxx_pid_59_5x9_reg.h"
34 #include "aw87xxx_pid_5a_reg.h"
35 #include "aw87xxx_pid_76_reg.h"
36
37 /*************************************************************************
38 * aw87xxx variable
39 ************************************************************************/
40 const char *g_aw_pid_9b_product[] = {
41 "aw87319",
42 };
43
44 const char *g_aw_pid_39_product[] = {
45 "aw87329",
46 "aw87339",
47 "aw87349",
48 };
49
50 const char *g_aw_pid_59_3x9_product[] = {
51 "aw87359",
52 "aw87389",
53 };
54
55 const char *g_aw_pid_59_5x9_product[] = {
56 "aw87509",
57 "aw87519",
58 "aw87529",
59 "aw87539",
60 };
61
62 const char *g_aw_pid_5a_product[] = {
63 "aw87549",
64 "aw87559",
65 "aw87569",
66 "aw87579",
67 "aw81509",
68 };
69
70 const char *g_aw_pid_76_product[] = {
71 "aw87390",
72 "aw87320",
73 "aw87401",
74 };
75
76 static int aw_dev_get_chipid(struct aw_device *aw_dev);
77
78 /***************************************************************************
79 *
80 * reading and writing of I2C bus
81 *
82 ***************************************************************************/
aw_dev_i2c_write_byte(struct aw_device * aw_dev,uint8_t reg_addr,uint8_t reg_data)83 int aw_dev_i2c_write_byte(struct aw_device *aw_dev,
84 uint8_t reg_addr, uint8_t reg_data)
85 {
86 int ret = -1;
87 unsigned char cnt = 0;
88
89 while (cnt < AW_I2C_RETRIES) {
90 ret = i2c_smbus_write_byte_data(aw_dev->i2c, reg_addr, reg_data);
91 if (ret < 0)
92 AW_DEV_LOGE(aw_dev->dev, "i2c_write cnt=%d error=%d",
93 cnt, ret);
94 else
95 break;
96
97 cnt++;
98 msleep(AW_I2C_RETRY_DELAY);
99 }
100
101 return ret;
102 }
103
aw_dev_i2c_read_byte(struct aw_device * aw_dev,uint8_t reg_addr,uint8_t * reg_data)104 int aw_dev_i2c_read_byte(struct aw_device *aw_dev,
105 uint8_t reg_addr, uint8_t *reg_data)
106 {
107 int ret = -1;
108 unsigned char cnt = 0;
109
110 while (cnt < AW_I2C_RETRIES) {
111 ret = i2c_smbus_read_byte_data(aw_dev->i2c, reg_addr);
112 if (ret < 0) {
113 AW_DEV_LOGE(aw_dev->dev, "i2c_read cnt=%d error=%d",
114 cnt, ret);
115 } else {
116 *reg_data = ret;
117 break;
118 }
119 cnt++;
120 msleep(AW_I2C_RETRY_DELAY);
121 }
122
123 return ret;
124 }
125
aw_dev_i2c_read_msg(struct aw_device * aw_dev,uint8_t reg_addr,uint8_t * data_buf,uint32_t data_len)126 int aw_dev_i2c_read_msg(struct aw_device *aw_dev,
127 uint8_t reg_addr, uint8_t *data_buf, uint32_t data_len)
128 {
129 int ret = -1;
130
131 struct i2c_msg msg[] = {
132 [0] = {
133 .addr = aw_dev->i2c_addr,
134 .flags = 0,
135 .len = sizeof(uint8_t),
136 .buf = ®_addr,
137 },
138 [1] = {
139 .addr = aw_dev->i2c_addr,
140 .flags = I2C_M_RD,
141 .len = data_len,
142 .buf = data_buf,
143 },
144 };
145
146 ret = i2c_transfer(aw_dev->i2c->adapter, msg, ARRAY_SIZE(msg));
147 if (ret < 0) {
148 AW_DEV_LOGE(aw_dev->dev, "transfer failed");
149 return ret;
150 } else if (ret != AW_I2C_READ_MSG_NUM) {
151 AW_DEV_LOGE(aw_dev->dev, "transfer failed(size error)");
152 return -ENXIO;
153 }
154
155 return 0;
156 }
157
aw_dev_i2c_write_bits(struct aw_device * aw_dev,uint8_t reg_addr,uint8_t mask,uint8_t reg_data)158 int aw_dev_i2c_write_bits(struct aw_device *aw_dev,
159 uint8_t reg_addr, uint8_t mask, uint8_t reg_data)
160 {
161 int ret = -1;
162 unsigned char reg_val = 0;
163
164 ret = aw_dev_i2c_read_byte(aw_dev, reg_addr, ®_val);
165 if (ret < 0) {
166 AW_DEV_LOGE(aw_dev->dev, "i2c read error, ret=%d", ret);
167 return ret;
168 }
169 reg_val &= mask;
170 reg_val |= reg_data;
171 ret = aw_dev_i2c_write_byte(aw_dev, reg_addr, reg_val);
172 if (ret < 0) {
173 AW_DEV_LOGE(aw_dev->dev, "i2c write error, ret=%d", ret);
174 return ret;
175 }
176
177 return 0;
178 }
179
180 /************************************************************************
181 *
182 * aw87xxx device update profile data to registers
183 *
184 ************************************************************************/
aw_dev_reg_update(struct aw_device * aw_dev,struct aw_data_container * profile_data)185 static int aw_dev_reg_update(struct aw_device *aw_dev,
186 struct aw_data_container *profile_data)
187 {
188 int i = 0;
189 int ret = -1;
190
191 if (profile_data == NULL)
192 return -EINVAL;
193
194 if (aw_dev->hwen_status == AW_DEV_HWEN_OFF) {
195 AW_DEV_LOGE(aw_dev->dev, "dev is pwr_off,can not update reg");
196 return -EINVAL;
197 }
198
199 for (i = 0; i < profile_data->len; i = i + 2) {
200 AW_DEV_LOGI(aw_dev->dev, "reg=0x%02x, val = 0x%02x",
201 profile_data->data[i], profile_data->data[i + 1]);
202
203 ret = aw_dev_i2c_write_byte(aw_dev, profile_data->data[i],
204 profile_data->data[i + 1]);
205 if (ret < 0)
206 return ret;
207 }
208
209 return 0;
210 }
211
aw_dev_reg_mute_bits_set(struct aw_device * aw_dev,uint8_t * reg_val,bool enable)212 static void aw_dev_reg_mute_bits_set(struct aw_device *aw_dev,
213 uint8_t *reg_val, bool enable)
214 {
215 if (enable) {
216 *reg_val &= aw_dev->mute_desc.mask;
217 *reg_val |= aw_dev->mute_desc.enable;
218 } else {
219 *reg_val &= aw_dev->mute_desc.mask;
220 *reg_val |= aw_dev->mute_desc.disable;
221 }
222 }
223
224 /************************************************************************
225 *
226 * aw87xxx device hadware and soft contols
227 *
228 ************************************************************************/
aw_dev_gpio_is_valid(struct aw_device * aw_dev)229 static bool aw_dev_gpio_is_valid(struct aw_device *aw_dev)
230 {
231 if (gpio_is_valid(aw_dev->rst_gpio))
232 return true;
233 else
234 return false;
235 }
236
aw_dev_hw_pwr_ctrl(struct aw_device * aw_dev,bool enable)237 void aw_dev_hw_pwr_ctrl(struct aw_device *aw_dev, bool enable)
238 {
239 if (aw_dev->hwen_status == AW_DEV_HWEN_INVALID) {
240 AW_DEV_LOGD(aw_dev->dev, "product not have reset-pin,hardware pwd control invalid");
241 return;
242 }
243 if (enable) {
244 if (aw_dev_gpio_is_valid(aw_dev)) {
245 gpio_set_value_cansleep(aw_dev->rst_gpio, AW_GPIO_LOW_LEVEL);
246 mdelay(2);
247 gpio_set_value_cansleep(aw_dev->rst_gpio, AW_GPIO_HIGHT_LEVEL);
248 mdelay(2);
249 aw_dev->hwen_status = AW_DEV_HWEN_ON;
250 AW_DEV_LOGI(aw_dev->dev, "hw power on");
251 } else {
252 AW_DEV_LOGI(aw_dev->dev, "hw already power on");
253 }
254 } else {
255 if (aw_dev_gpio_is_valid(aw_dev)) {
256 gpio_set_value_cansleep(aw_dev->rst_gpio, AW_GPIO_LOW_LEVEL);
257 mdelay(2);
258 aw_dev->hwen_status = AW_DEV_HWEN_OFF;
259 AW_DEV_LOGI(aw_dev->dev, "hw power off");
260 } else {
261 AW_DEV_LOGI(aw_dev->dev, "hw already power off");
262 }
263 }
264 }
265
aw_dev_mute_ctrl(struct aw_device * aw_dev,bool enable)266 int aw_dev_mute_ctrl(struct aw_device *aw_dev, bool enable)
267 {
268 int ret = 0;
269
270 if (enable) {
271 ret = aw_dev_i2c_write_bits(aw_dev, aw_dev->mute_desc.addr,
272 aw_dev->mute_desc.mask, aw_dev->mute_desc.enable);
273 if (ret < 0)
274 return ret;
275 AW_DEV_LOGI(aw_dev->dev, "set mute down");
276 } else {
277 ret = aw_dev_i2c_write_bits(aw_dev, aw_dev->mute_desc.addr,
278 aw_dev->mute_desc.mask, aw_dev->mute_desc.disable);
279 if (ret < 0)
280 return ret;
281 AW_DEV_LOGI(aw_dev->dev, "close mute down");
282 }
283
284 return 0;
285 }
286
aw_dev_soft_reset(struct aw_device * aw_dev)287 void aw_dev_soft_reset(struct aw_device *aw_dev)
288 {
289 int i = 0;
290 int ret = -1;
291 struct aw_soft_rst_desc *soft_rst = &aw_dev->soft_rst_desc;
292
293 AW_DEV_LOGD(aw_dev->dev, "enter");
294
295 if (aw_dev->hwen_status == AW_DEV_HWEN_OFF) {
296 AW_DEV_LOGE(aw_dev->dev, "hw is off,can not softrst");
297 return;
298 }
299
300 if (aw_dev->soft_rst_enable == AW_DEV_SOFT_RST_DISENABLE) {
301 AW_DEV_LOGD(aw_dev->dev, "softrst is disenable");
302 return;
303 }
304
305 if (soft_rst->access == NULL || soft_rst->len == 0) {
306 AW_DEV_LOGE(aw_dev->dev, "softrst_info not init");
307 return;
308 }
309
310 if (soft_rst->len % 2) {
311 AW_DEV_LOGE(aw_dev->dev, "softrst data_len[%d] is odd number,data not available",
312 aw_dev->soft_rst_desc.len);
313 return;
314 }
315
316 for (i = 0; i < soft_rst->len / sizeof(uint8_t); i += 2) {
317 AW_DEV_LOGD(aw_dev->dev, "softrst_reg=0x%02x, val = 0x%02x",
318 soft_rst->access[i], soft_rst->access[i + 1]);
319
320 ret = aw_dev_i2c_write_byte(aw_dev, soft_rst->access[i],
321 soft_rst->access[i + 1]);
322 if (ret < 0) {
323 AW_DEV_LOGE(aw_dev->dev, "write failed,ret = %d,cnt=%d",
324 ret, i);
325 return;
326 }
327 }
328 AW_DEV_LOGD(aw_dev->dev, "down");
329 }
330
331
aw_dev_default_pwr_off(struct aw_device * aw_dev,struct aw_data_container * profile_data)332 int aw_dev_default_pwr_off(struct aw_device *aw_dev,
333 struct aw_data_container *profile_data)
334 {
335 int ret = 0;
336
337 AW_DEV_LOGD(aw_dev->dev, "enter");
338 if (aw_dev->hwen_status == AW_DEV_HWEN_OFF) {
339 AW_DEV_LOGE(aw_dev->dev, "hwen is already off");
340 return 0;
341 }
342
343 if (aw_dev->soft_off_enable && profile_data) {
344 ret = aw_dev_reg_update(aw_dev, profile_data);
345 if (ret < 0) {
346 AW_DEV_LOGE(aw_dev->dev, "update profile[Off] fw config failed");
347 goto reg_off_update_failed;
348 }
349 }
350
351 aw_dev_hw_pwr_ctrl(aw_dev, false);
352 AW_DEV_LOGD(aw_dev->dev, "down");
353 return 0;
354
355 reg_off_update_failed:
356 aw_dev_hw_pwr_ctrl(aw_dev, false);
357 return ret;
358 }
359
360
361 /************************************************************************
362 *
363 * aw87xxx device power on process function
364 *
365 ************************************************************************/
366
aw_dev_default_pwr_on(struct aw_device * aw_dev,struct aw_data_container * profile_data)367 int aw_dev_default_pwr_on(struct aw_device *aw_dev,
368 struct aw_data_container *profile_data)
369 {
370 int ret = 0;
371
372 /*hw power on*/
373 aw_dev_hw_pwr_ctrl(aw_dev, true);
374
375 ret = aw_dev_reg_update(aw_dev, profile_data);
376 if (ret < 0)
377 return ret;
378
379 return 0;
380 }
381
382 /****************************************************************************
383 *
384 * aw87xxx chip esd status check
385 *
386 ****************************************************************************/
aw_dev_esd_reg_status_check(struct aw_device * aw_dev)387 int aw_dev_esd_reg_status_check(struct aw_device *aw_dev)
388 {
389 int ret;
390 unsigned char reg_val = 0;
391 struct aw_esd_check_desc *esd_desc = &aw_dev->esd_desc;
392
393 AW_DEV_LOGD(aw_dev->dev, "enter");
394
395 if (!esd_desc->first_update_reg_addr) {
396 AW_DEV_LOGE(aw_dev->dev, "esd check info if not init,please check");
397 return -EINVAL;
398 }
399
400 ret = aw_dev_i2c_read_byte(aw_dev, esd_desc->first_update_reg_addr,
401 ®_val);
402 if (ret < 0) {
403 AW_DEV_LOGE(aw_dev->dev, "read reg 0x%02x failed",
404 esd_desc->first_update_reg_addr);
405 return ret;
406 }
407
408 AW_DEV_LOGD(aw_dev->dev, "0x%02x:default val=0x%02x real val=0x%02x",
409 esd_desc->first_update_reg_addr,
410 esd_desc->first_update_reg_val, reg_val);
411
412 if (reg_val == esd_desc->first_update_reg_val) {
413 AW_DEV_LOGE(aw_dev->dev, "reg status check failed");
414 return -EINVAL;
415 }
416 return 0;
417 }
418
aw_dev_check_reg_is_rec_mode(struct aw_device * aw_dev)419 int aw_dev_check_reg_is_rec_mode(struct aw_device *aw_dev)
420 {
421 int ret;
422 unsigned char reg_val = 0;
423 struct aw_rec_mode_desc *rec_desc = &aw_dev->rec_desc;
424
425 if (!rec_desc->addr) {
426 AW_DEV_LOGE(aw_dev->dev, "rec check info if not init,please check");
427 return -EINVAL;
428 }
429
430 ret = aw_dev_i2c_read_byte(aw_dev, rec_desc->addr, ®_val);
431 if (ret < 0) {
432 AW_DEV_LOGE(aw_dev->dev, "read reg 0x%02x failed",
433 rec_desc->addr);
434 return ret;
435 }
436
437 if (rec_desc->enable) {
438 if (reg_val & ~(rec_desc->mask)) {
439 AW_DEV_LOGI(aw_dev->dev, "reg status is receiver mode");
440 aw_dev->is_rec_mode = AW_IS_REC_MODE;
441 } else {
442 aw_dev->is_rec_mode = AW_NOT_REC_MODE;
443 }
444 } else {
445 if (!(reg_val & ~(rec_desc->mask))) {
446 AW_DEV_LOGI(aw_dev->dev, "reg status is receiver mode");
447 aw_dev->is_rec_mode = AW_IS_REC_MODE;
448 } else {
449 aw_dev->is_rec_mode = AW_NOT_REC_MODE;
450 }
451 }
452 return 0;
453 }
454
455
456 /****************************************************************************
457 *
458 * aw87xxx product attributes init info
459 *
460 ****************************************************************************/
461
462 /********************** aw87xxx_pid_9A attributes ***************************/
463
aw_dev_pid_9b_reg_update(struct aw_device * aw_dev,struct aw_data_container * profile_data)464 static int aw_dev_pid_9b_reg_update(struct aw_device *aw_dev,
465 struct aw_data_container *profile_data)
466 {
467 int i = 0;
468 int ret = -1;
469 uint8_t reg_val = 0;
470
471 if (profile_data == NULL)
472 return -EINVAL;
473
474 if (aw_dev->hwen_status == AW_DEV_HWEN_OFF) {
475 AW_DEV_LOGE(aw_dev->dev, "dev is pwr_off,can not update reg");
476 return -EINVAL;
477 }
478
479 if (profile_data->len != AW_PID_9B_BIN_REG_CFG_COUNT) {
480 AW_DEV_LOGE(aw_dev->dev, "reg_config count of bin is error,can not update reg");
481 return -EINVAL;
482 }
483 ret = aw_dev_i2c_write_byte(aw_dev, AW87XXX_PID_9B_ENCRYPTION_REG,
484 AW87XXX_PID_9B_ENCRYPTION_BOOST_OUTPUT_SET);
485 if (ret < 0)
486 return ret;
487
488 for (i = 1; i < AW_PID_9B_BIN_REG_CFG_COUNT; i++) {
489 AW_DEV_LOGI(aw_dev->dev, "reg=0x%02x, val = 0x%02x",
490 i, profile_data->data[i]);
491 reg_val = profile_data->data[i];
492 if (i == AW87XXX_PID_9B_SYSCTRL_REG) {
493 aw_dev_reg_mute_bits_set(aw_dev, ®_val, true);
494 AW_DEV_LOGD(aw_dev->dev, "change mute_mask, val = 0x%02x",
495 reg_val);
496 }
497
498 ret = aw_dev_i2c_write_byte(aw_dev, i, reg_val);
499 if (ret < 0)
500 return ret;
501 }
502
503 return 0;
504 }
505
aw_dev_pid_9b_pwr_on(struct aw_device * aw_dev,struct aw_data_container * data)506 int aw_dev_pid_9b_pwr_on(struct aw_device *aw_dev, struct aw_data_container *data)
507 {
508 int ret = 0;
509
510 /*hw power on*/
511 aw_dev_hw_pwr_ctrl(aw_dev, true);
512
513 /* open the mute */
514 ret = aw_dev_mute_ctrl(aw_dev, true);
515 if (ret < 0)
516 return ret;
517
518 /* Update scene parameters in mute mode */
519 ret = aw_dev_pid_9b_reg_update(aw_dev, data);
520 if (ret < 0)
521 return ret;
522
523 /* close the mute */
524 aw_dev_mute_ctrl(aw_dev, false);
525 if (ret < 0)
526 return ret;
527
528 return 0;
529 }
530
aw_dev_pid_9b_init(struct aw_device * aw_dev)531 static void aw_dev_pid_9b_init(struct aw_device *aw_dev)
532 {
533 /* Product register permission info */
534 aw_dev->reg_max_addr = AW87XXX_PID_9B_REG_MAX;
535 aw_dev->reg_access = aw87xxx_pid_9b_reg_access;
536
537 aw_dev->mute_desc.addr = AW87XXX_PID_9B_SYSCTRL_REG;
538 aw_dev->mute_desc.mask = AW87XXX_PID_9B_REG_EN_SW_MASK;
539 aw_dev->mute_desc.enable = AW87XXX_PID_9B_REG_EN_SW_DISABLE_VALUE;
540 aw_dev->mute_desc.disable = AW87XXX_PID_9B_REG_EN_SW_ENABLE_VALUE;
541 aw_dev->ops.pwr_on_func = aw_dev_pid_9b_pwr_on;
542
543 /* software reset control info */
544 aw_dev->soft_rst_desc.len = sizeof(aw87xxx_pid_9b_softrst_access);
545 aw_dev->soft_rst_desc.access = aw87xxx_pid_9b_softrst_access;
546 aw_dev->soft_rst_enable = AW_DEV_SOFT_RST_ENABLE;
547
548 /* Whether to allow register operation to power off */
549 aw_dev->soft_off_enable = AW_DEV_SOFT_OFF_DISENABLE;
550
551 aw_dev->product_tab = g_aw_pid_9b_product;
552 aw_dev->product_cnt = AW87XXX_PID_9B_PRODUCT_MAX;
553
554 aw_dev->rec_desc.addr = AW87XXX_PID_9B_SYSCTRL_REG;
555 aw_dev->rec_desc.disable = AW87XXX_PID_9B_SPK_MODE_ENABLE;
556 aw_dev->rec_desc.enable = AW87XXX_PID_9B_SPK_MODE_DISABLE;
557 aw_dev->rec_desc.mask = AW87XXX_PID_9B_SPK_MODE_MASK;
558
559 /* esd reg info */
560 aw_dev->esd_desc.first_update_reg_addr = AW87XXX_PID_9B_SYSCTRL_REG;
561 aw_dev->esd_desc.first_update_reg_val = AW87XXX_PID_9B_SYSCTRL_DEFAULT;
562 }
563
aw_dev_pid_9a_init(struct aw_device * aw_dev)564 static int aw_dev_pid_9a_init(struct aw_device *aw_dev)
565 {
566 int ret = 0;
567
568 ret = aw_dev_i2c_write_byte(aw_dev, AW87XXX_PID_9B_ENCRYPTION_REG,
569 AW87XXX_PID_9B_ENCRYPTION_BOOST_OUTPUT_SET);
570 if (ret < 0) {
571 AW_DEV_LOGE(aw_dev->dev, "write 0x64=0x2C error");
572 return -EINVAL;
573 }
574
575 ret = aw_dev_get_chipid(aw_dev);
576 if (ret < 0) {
577 AW_DEV_LOGE(aw_dev->dev, "read chipid is failed,ret=%d", ret);
578 return ret;
579 }
580
581 if (aw_dev->chipid == AW_DEV_CHIPID_9B) {
582 AW_DEV_LOGI(aw_dev->dev, "product is pid_9B class");
583 aw_dev_pid_9b_init(aw_dev);
584 } else {
585 AW_DEV_LOGE(aw_dev->dev, "product is not pid_9B class, not support");
586 return -EINVAL;
587 }
588
589 return 0;
590 }
591
592 /********************** aw87xxx_pid_9b attributes end ***********************/
593
594 /********************** aw87xxx_pid_39 attributes ***************************/
aw_dev_chipid_39_init(struct aw_device * aw_dev)595 static void aw_dev_chipid_39_init(struct aw_device *aw_dev)
596 {
597 /* Product register permission info */
598 aw_dev->reg_max_addr = AW87XXX_PID_39_REG_MAX;
599 aw_dev->reg_access = aw87xxx_pid_39_reg_access;
600
601 /* software reset control info */
602 aw_dev->soft_rst_desc.len = sizeof(aw87xxx_pid_39_softrst_access);
603 aw_dev->soft_rst_desc.access = aw87xxx_pid_39_softrst_access;
604 aw_dev->soft_rst_enable = AW_DEV_SOFT_RST_ENABLE;
605
606 /* Whether to allow register operation to power off */
607 aw_dev->soft_off_enable = AW_DEV_SOFT_OFF_ENABLE;
608
609 aw_dev->product_tab = g_aw_pid_39_product;
610 aw_dev->product_cnt = AW87XXX_PID_39_PRODUCT_MAX;
611
612 aw_dev->rec_desc.addr = AW87XXX_PID_39_REG_MODECTRL;
613 aw_dev->rec_desc.disable = AW87XXX_PID_39_REC_MODE_DISABLE;
614 aw_dev->rec_desc.enable = AW87XXX_PID_39_REC_MODE_ENABLE;
615 aw_dev->rec_desc.mask = AW87XXX_PID_39_REC_MODE_MASK;
616
617 /* esd reg info */
618 aw_dev->esd_desc.first_update_reg_addr = AW87XXX_PID_39_REG_MODECTRL;
619 aw_dev->esd_desc.first_update_reg_val = AW87XXX_PID_39_MODECTRL_DEFAULT;
620 }
621 /********************* aw87xxx_pid_39 attributes end *************************/
622
623
624 /********************* aw87xxx_pid_59_5x9 attributes *************************/
aw_dev_chipid_59_5x9_init(struct aw_device * aw_dev)625 static void aw_dev_chipid_59_5x9_init(struct aw_device *aw_dev)
626 {
627 /* Product register permission info */
628 aw_dev->reg_max_addr = AW87XXX_PID_59_5X9_REG_MAX;
629 aw_dev->reg_access = aw87xxx_pid_59_5x9_reg_access;
630
631 /* software reset control info */
632 aw_dev->soft_rst_desc.len = sizeof(aw87xxx_pid_59_5x9_softrst_access);
633 aw_dev->soft_rst_desc.access = aw87xxx_pid_59_5x9_softrst_access;
634 aw_dev->soft_rst_enable = AW_DEV_SOFT_RST_ENABLE;
635
636 /* Whether to allow register operation to power off */
637 aw_dev->soft_off_enable = AW_DEV_SOFT_OFF_ENABLE;
638
639 aw_dev->product_tab = g_aw_pid_59_5x9_product;
640 aw_dev->product_cnt = AW87XXX_PID_59_5X9_PRODUCT_MAX;
641
642 aw_dev->rec_desc.addr = AW87XXX_PID_59_5X9_REG_SYSCTRL;
643 aw_dev->rec_desc.disable = AW87XXX_PID_59_5X9_REC_MODE_DISABLE;
644 aw_dev->rec_desc.enable = AW87XXX_PID_59_5X9_REC_MODE_ENABLE;
645 aw_dev->rec_desc.mask = AW87XXX_PID_59_5X9_REC_MODE_MASK;
646
647 /* esd reg info */
648 aw_dev->esd_desc.first_update_reg_addr = AW87XXX_PID_59_5X9_REG_ENCR;
649 aw_dev->esd_desc.first_update_reg_val = AW87XXX_PID_59_5X9_ENCRY_DEFAULT;
650 }
651 /******************* aw87xxx_pid_59_5x9 attributes end ***********************/
652
653 /********************* aw87xxx_pid_59_3x9 attributes *************************/
aw_dev_chipid_59_3x9_init(struct aw_device * aw_dev)654 static void aw_dev_chipid_59_3x9_init(struct aw_device *aw_dev)
655 {
656 /* Product register permission info */
657 aw_dev->reg_max_addr = AW87XXX_PID_59_3X9_REG_MAX;
658 aw_dev->reg_access = aw87xxx_pid_59_3x9_reg_access;
659
660 /* software reset control info */
661 aw_dev->soft_rst_desc.len = sizeof(aw87xxx_pid_59_3x9_softrst_access);
662 aw_dev->soft_rst_desc.access = aw87xxx_pid_59_3x9_softrst_access;
663 aw_dev->soft_rst_enable = AW_DEV_SOFT_RST_ENABLE;
664
665 /* Whether to allow register operation to power off */
666 aw_dev->soft_off_enable = AW_DEV_SOFT_OFF_ENABLE;
667
668 aw_dev->product_tab = g_aw_pid_59_3x9_product;
669 aw_dev->product_cnt = AW87XXX_PID_59_3X9_PRODUCT_MAX;
670
671 aw_dev->rec_desc.addr = AW87XXX_PID_59_3X9_REG_MDCRTL;
672 aw_dev->rec_desc.disable = AW87XXX_PID_59_3X9_SPK_MODE_ENABLE;
673 aw_dev->rec_desc.enable = AW87XXX_PID_59_3X9_SPK_MODE_DISABLE;
674 aw_dev->rec_desc.mask = AW87XXX_PID_59_3X9_SPK_MODE_MASK;
675
676 /* esd reg info */
677 aw_dev->esd_desc.first_update_reg_addr = AW87XXX_PID_59_3X9_REG_ENCR;
678 aw_dev->esd_desc.first_update_reg_val = AW87XXX_PID_59_3X9_ENCR_DEFAULT;
679 }
680 /******************* aw87xxx_pid_59_3x9 attributes end ***********************/
681
682 /********************** aw87xxx_pid_5a attributes ****************************/
aw_dev_chipid_5a_init(struct aw_device * aw_dev)683 static void aw_dev_chipid_5a_init(struct aw_device *aw_dev)
684 {
685 /* Product register permission info */
686 aw_dev->reg_max_addr = AW87XXX_PID_5A_REG_MAX;
687 aw_dev->reg_access = aw87xxx_pid_5a_reg_access;
688
689 /* software reset control info */
690 aw_dev->soft_rst_desc.len = sizeof(aw87xxx_pid_5a_softrst_access);
691 aw_dev->soft_rst_desc.access = aw87xxx_pid_5a_softrst_access;
692 aw_dev->soft_rst_enable = AW_DEV_SOFT_RST_ENABLE;
693
694 /* Whether to allow register operation to power off */
695 aw_dev->soft_off_enable = AW_DEV_SOFT_OFF_ENABLE;
696
697 aw_dev->product_tab = g_aw_pid_5a_product;
698 aw_dev->product_cnt = AW87XXX_PID_5A_PRODUCT_MAX;
699
700 aw_dev->rec_desc.addr = AW87XXX_PID_5A_REG_SYSCTRL_REG;
701 aw_dev->rec_desc.disable = AW87XXX_PID_5A_REG_RCV_MODE_DISABLE;
702 aw_dev->rec_desc.enable = AW87XXX_PID_5A_REG_RCV_MODE_ENABLE;
703 aw_dev->rec_desc.mask = AW87XXX_PID_5A_REG_RCV_MODE_MASK;
704
705 /* esd reg info */
706 aw_dev->esd_desc.first_update_reg_addr = AW87XXX_PID_5A_REG_DFT3R_REG;
707 aw_dev->esd_desc.first_update_reg_val = AW87XXX_PID_5A_DFT3R_DEFAULT;
708 }
709
aw_dev_chipid_76_init(struct aw_device * aw_dev)710 static void aw_dev_chipid_76_init(struct aw_device *aw_dev)
711 {
712 /* Product register permission info */
713 aw_dev->reg_max_addr = AW87XXX_PID_76_REG_MAX;
714 aw_dev->reg_access = aw87xxx_pid_76_reg_access;
715
716 /* software reset control info */
717 aw_dev->soft_rst_desc.len = sizeof(aw87xxx_pid_76_softrst_access);
718 aw_dev->soft_rst_desc.access = aw87xxx_pid_76_softrst_access;
719 aw_dev->soft_rst_enable = AW_DEV_SOFT_RST_ENABLE;
720
721 /* software power off control info */
722 aw_dev->soft_off_enable = AW_DEV_SOFT_OFF_ENABLE;
723
724 aw_dev->product_tab = g_aw_pid_76_product;
725 aw_dev->product_cnt = AW87XXX_PID_76_PROFUCT_MAX;
726
727 aw_dev->rec_desc.addr = AW87XXX_PID_76_MDCTRL_REG;
728 aw_dev->rec_desc.disable = AW87XXX_PID_76_EN_SPK_ENABLE;
729 aw_dev->rec_desc.enable = AW87XXX_PID_76_EN_SPK_DISABLE;
730 aw_dev->rec_desc.mask = AW87XXX_PID_76_EN_SPK_MASK;
731
732 /* esd reg info */
733 aw_dev->esd_desc.first_update_reg_addr = AW87XXX_PID_76_DFT_ADP1_REG;
734 aw_dev->esd_desc.first_update_reg_val = AW87XXX_PID_76_DFT_ADP1_CHECK;
735 }
736
737 /********************** aw87xxx_pid_5a attributes end ************************/
738
aw_dev_chip_init(struct aw_device * aw_dev)739 static void aw_dev_chip_init(struct aw_device *aw_dev)
740 {
741 int ret = 0;
742
743 /*get info by chipid*/
744 switch (aw_dev->chipid) {
745 case AW_DEV_CHIPID_9A:
746 ret = aw_dev_pid_9a_init(aw_dev);
747 if (ret < 0)
748 AW_DEV_LOGE(aw_dev->dev, "product is pid_9B init failed");
749 break;
750 case AW_DEV_CHIPID_9B:
751 aw_dev_pid_9b_init(aw_dev);
752 AW_DEV_LOGI(aw_dev->dev, "product is pid_9B class");
753 break;
754 case AW_DEV_CHIPID_39:
755 aw_dev_chipid_39_init(aw_dev);
756 AW_DEV_LOGI(aw_dev->dev, "product is pid_39 class");
757 break;
758 case AW_DEV_CHIPID_59:
759 if (aw_dev_gpio_is_valid(aw_dev)) {
760 aw_dev_chipid_59_5x9_init(aw_dev);
761 AW_DEV_LOGI(aw_dev->dev, "product is pid_59_5x9 class");
762 } else {
763 aw_dev_chipid_59_3x9_init(aw_dev);
764 AW_DEV_LOGI(aw_dev->dev, "product is pid_59_3x9 class");
765 }
766 break;
767 case AW_DEV_CHIPID_5A:
768 aw_dev_chipid_5a_init(aw_dev);
769 AW_DEV_LOGI(aw_dev->dev, "product is pid_5A class");
770 break;
771 case AW_DEV_CHIPID_76:
772 aw_dev_chipid_76_init(aw_dev);
773 AW_DEV_LOGI(aw_dev->dev, "product is pid_76 class");
774 break;
775 default:
776 AW_DEV_LOGE(aw_dev->dev, "unsupported device revision [0x%x]",
777 aw_dev->chipid);
778 return;
779 }
780 }
781
aw_dev_get_chipid(struct aw_device * aw_dev)782 static int aw_dev_get_chipid(struct aw_device *aw_dev)
783 {
784 int ret = -1;
785 unsigned int cnt = 0;
786 unsigned char reg_val = 0;
787
788 for (cnt = 0; cnt < AW_READ_CHIPID_RETRIES; cnt++) {
789 ret = aw_dev_i2c_read_byte(aw_dev, AW_DEV_REG_CHIPID, ®_val);
790 if (ret < 0) {
791 AW_DEV_LOGE(aw_dev->dev, "[%d] read chip is failed, ret=%d",
792 cnt, ret);
793 continue;
794 }
795 break;
796 }
797
798
799 if (cnt == AW_READ_CHIPID_RETRIES) {
800 AW_DEV_LOGE(aw_dev->dev, "read chip is failed,cnt=%d", cnt);
801 return -EINVAL;
802 }
803
804 AW_DEV_LOGI(aw_dev->dev, "read chipid[0x%x] succeed", reg_val);
805 aw_dev->chipid = reg_val;
806
807 return 0;
808 }
809
aw_dev_init(struct aw_device * aw_dev)810 int aw_dev_init(struct aw_device *aw_dev)
811 {
812 int ret = -1;
813
814 ret = aw_dev_get_chipid(aw_dev);
815 if (ret < 0) {
816 AW_DEV_LOGE(aw_dev->dev, "read chipid is failed,ret=%d", ret);
817 return ret;
818 }
819
820 aw_dev_chip_init(aw_dev);
821
822 return 0;
823 }
824
825
826