1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 3 #ifndef __AW_ACF_BIN_H__ 4 #define __AW_ACF_BIN_H__ 5 6 #include "aw_device.h" 7 8 #define AW_PROJECT_NAME_MAX (24) 9 #define AW_CUSTOMER_NAME_MAX (16) 10 #define AW_CFG_VERSION_MAX (4) 11 #define AW_TBL_VERSION_MAX (4) 12 #define AW_DDE_DEVICE_TYPE (0) 13 #define AW_DDE_SKT_TYPE (1) 14 #define AW_DDE_DEFAULT_TYPE (2) 15 16 #define AW_REG_ADDR_BYTE (1) 17 #define AW_REG_DATA_BYTE (1) 18 19 #define AW_ACF_FILE_ID (0xa15f908) 20 #define AW_PROFILE_STR_MAX (32) 21 #define AW_POWER_OFF_NAME_SUPPORT_COUNT (5) 22 23 enum aw_cfg_hdr_version { 24 AW_ACF_HDR_VER_0_0_0_1 = 0x00000001, 25 AW_ACF_HDR_VER_1_0_0_0 = 0x01000000, 26 }; 27 28 enum aw_acf_dde_type_id { 29 AW_DEV_NONE_TYPE_ID = 0xFFFFFFFF, 30 AW_DDE_DEV_TYPE_ID = 0x00000000, 31 AW_DDE_SKT_TYPE_ID = 0x00000001, 32 AW_DDE_DEV_DEFAULT_TYPE_ID = 0x00000002, 33 AW_DDE_TYPE_MAX, 34 }; 35 36 enum aw_raw_data_type_id { 37 AW_BIN_TYPE_REG = 0x00000000, 38 AW_BIN_TYPE_DSP, 39 AW_BIN_TYPE_DSP_CFG, 40 AW_BIN_TYPE_DSP_FW, 41 AW_BIN_TYPE_HDR_REG, 42 AW_BIN_TYPE_HDR_DSP_CFG, 43 AW_BIN_TYPE_HDR_DSP_FW, 44 AW_BIN_TYPE_MUTLBIN, 45 AW_SKT_UI_PROJECT, 46 AW_DSP_CFG, 47 AW_MONITOR, 48 AW_BIN_TYPE_MAX, 49 }; 50 51 enum { 52 AW_DEV_TYPE_OK = 0, 53 AW_DEV_TYPE_NONE = 1, 54 }; 55 56 enum aw_profile_status { 57 AW_PROFILE_WAIT = 0, 58 AW_PROFILE_OK, 59 }; 60 61 enum aw_acf_load_status { 62 AW_ACF_WAIT = 0, 63 AW_ACF_UPDATE, 64 }; 65 66 enum aw_bin_dev_profile_id { 67 AW_PROFILE_MUSIC = 0x0000, 68 AW_PROFILE_VOICE, 69 AW_PROFILE_VOIP, 70 AW_PROFILE_RINGTONE, 71 AW_PROFILE_RINGTONE_HS, 72 AW_PROFILE_LOWPOWER, 73 AW_PROFILE_BYPASS, 74 AW_PROFILE_MMI, 75 AW_PROFILE_FM, 76 AW_PROFILE_NOTIFICATION, 77 AW_PROFILE_RECEIVER, 78 AW_PROFILE_OFF, 79 AW_PROFILE_MAX, 80 }; 81 82 struct aw_acf_hdr { 83 int32_t a_id; /* acf file ID 0xa15f908 */ 84 char project[AW_PROJECT_NAME_MAX]; /* project name */ 85 char custom[AW_CUSTOMER_NAME_MAX]; /* custom name :huawei xiaomi vivo oppo */ 86 uint8_t version[AW_CFG_VERSION_MAX]; /* author update version */ 87 int32_t author_id; /* author id */ 88 int32_t ddt_size; /* sub section table entry size */ 89 int32_t dde_num; /* sub section table entry num */ 90 int32_t ddt_offset; /* sub section table offset in file */ 91 int32_t hdr_version; /* sub section table version */ 92 int32_t reserve[3]; /* Reserved Bits */ 93 }; 94 95 struct aw_acf_dde { 96 int32_t type; /* dde type id */ 97 char dev_name[AW_CUSTOMER_NAME_MAX]; /* customer dev name */ 98 int16_t dev_index; /* dev id */ 99 int16_t dev_bus; /* dev bus id */ 100 int16_t dev_addr; /* dev addr id */ 101 int16_t dev_profile; /* dev profile id */ 102 int32_t data_type; /* data type id */ 103 int32_t data_size; /* dde data size in block */ 104 int32_t data_offset; /* dde data offset in block */ 105 int32_t data_crc; /* dde data crc checkout */ 106 int32_t reserve[5]; /* Reserved Bits */ 107 }; 108 109 struct aw_acf_dde_v_1_0_0_0 { 110 uint32_t type; /* DDE type id */ 111 char dev_name[AW_CUSTOMER_NAME_MAX]; /* customer dev name */ 112 uint16_t dev_index; /* dev id */ 113 uint16_t dev_bus; /* dev bus id */ 114 uint16_t dev_addr; /* dev addr id */ 115 uint16_t dev_profile; /* dev profile id*/ 116 uint32_t data_type; /* data type id */ 117 uint32_t data_size; /* dde data size in block */ 118 uint32_t data_offset; /* dde data offset in block */ 119 uint32_t data_crc; /* dde data crc checkout */ 120 char dev_profile_str[AW_PROFILE_STR_MAX]; /* dde custom profile name */ 121 uint32_t chip_id; /* dde custom product chip id */ 122 uint32_t reserve[4]; 123 }; 124 125 struct aw_data_with_header { 126 uint32_t check_sum; 127 uint32_t header_ver; 128 uint32_t bin_data_type; 129 uint32_t bin_data_ver; 130 uint32_t bin_data_size; 131 uint32_t ui_ver; 132 char product[8]; 133 uint32_t addr_byte_len; 134 uint32_t data_byte_len; 135 uint32_t device_addr; 136 uint32_t reserve[4]; 137 }; 138 139 struct aw_data_container { 140 uint32_t len; 141 uint8_t *data; 142 }; 143 144 struct aw_prof_desc { 145 uint32_t prof_st; 146 char *prof_name; 147 char dev_name[AW_CUSTOMER_NAME_MAX]; 148 struct aw_data_container data_container; 149 }; 150 151 struct aw_all_prof_info { 152 struct aw_prof_desc prof_desc[AW_PROFILE_MAX]; 153 }; 154 155 struct aw_prof_info { 156 int count; 157 int status; 158 int prof_type; 159 char (*prof_name_list)[AW_PROFILE_STR_MAX]; 160 struct aw_prof_desc *prof_desc; 161 }; 162 163 struct acf_bin_info { 164 int load_count; 165 int fw_size; 166 int16_t dev_index; 167 char *fw_data; 168 int product_cnt; 169 const char **product_tab; 170 struct aw_device *aw_dev; 171 172 struct aw_acf_hdr acf_hdr; 173 struct aw_prof_info prof_info; 174 }; 175 176 177 void aw_acf_profile_free(struct device *dev, 178 struct acf_bin_info *acf_info); 179 int aw_acf_parse(struct device *dev, struct acf_bin_info *acf_info); 180 struct aw_prof_desc *aw_acf_get_prof_desc_form_name(struct device *dev, 181 struct acf_bin_info *acf_info, char *profile_name); 182 int aw_acf_get_prof_index_form_name(struct device *dev, 183 struct acf_bin_info *acf_info, char *profile_name); 184 char *aw_acf_get_prof_name_form_index(struct device *dev, 185 struct acf_bin_info *acf_info, int index); 186 int aw_acf_get_profile_count(struct device *dev, 187 struct acf_bin_info *acf_info); 188 int aw_acf_check_profile_is_off(struct device *dev, 189 struct acf_bin_info *acf_info, char *profile_name); 190 char *aw_acf_get_prof_off_name(struct device *dev, 191 struct acf_bin_info *acf_info); 192 void aw_acf_init(struct aw_device *aw_dev, struct acf_bin_info *acf_info, int index); 193 194 195 #endif 196