1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include <dt-bindings/usb/pd.h> 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pwm/pwm.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/input/rk-input.h> 12#include <dt-bindings/display/drm_mipi_dsi.h> 13#include <dt-bindings/display/rockchip_vop.h> 14#include <dt-bindings/sensor-dev.h> 15#include "rk3588s.dtsi" 16#include "rk3588-android.dtsi" 17#include "rk3588s-rk806-dual.dtsi" 18 19/ { 20 adc_keys: adc-keys { 21 compatible = "adc-keys"; 22 io-channels = <&saradc 1>; 23 io-channel-names = "buttons"; 24 keyup-threshold-microvolt = <1800000>; 25 poll-interval = <100>; 26 27 vol-up-key { 28 label = "volume up"; 29 linux,code = <KEY_VOLUMEUP>; 30 press-threshold-microvolt = <17000>; 31 }; 32 33 vol-down-key { 34 label = "volume down"; 35 linux,code = <KEY_VOLUMEDOWN>; 36 press-threshold-microvolt = <417000>; 37 }; 38 }; 39 40 backlight: backlight { 41 compatible = "pwm-backlight"; 42 pwms = <&pwm12 0 25000 0>; 43 brightness-levels = < 44 0 20 20 21 21 22 22 23 45 23 24 24 25 25 26 26 27 46 27 28 28 29 29 30 30 31 47 31 32 32 33 33 34 34 35 48 35 36 36 37 37 38 38 39 49 40 41 42 43 44 45 46 47 50 48 49 50 51 52 53 54 55 51 56 57 58 59 60 61 62 63 52 64 65 66 67 68 69 70 71 53 72 73 74 75 76 77 78 79 54 80 81 82 83 84 85 86 87 55 88 89 90 91 92 93 94 95 56 96 97 98 99 100 101 102 103 57 104 105 106 107 108 109 110 111 58 112 113 114 115 116 117 118 119 59 120 121 122 123 124 125 126 127 60 128 129 130 131 132 133 134 135 61 136 137 138 139 140 141 142 143 62 144 145 146 147 148 149 150 151 63 152 153 154 155 156 157 158 159 64 160 161 162 163 164 165 166 167 65 168 169 170 171 172 173 174 175 66 176 177 178 179 180 181 182 183 67 184 185 186 187 188 189 190 191 68 192 193 194 195 196 197 198 199 69 200 201 202 203 204 205 206 207 70 208 209 210 211 212 213 214 215 71 216 217 218 219 220 221 222 223 72 224 225 226 227 228 229 230 231 73 232 233 234 235 236 237 238 239 74 240 241 242 243 244 245 246 247 75 248 249 250 251 252 253 254 255 76 >; 77 default-brightness-level = <200>; 78 }; 79 80 battery: battery { 81 compatible = "simple-battery"; 82 charge-full-design-microamp-hours = <4500000>; 83 }; 84 85 bt_sco: bt-sco { 86 status = "disabled"; 87 compatible = "delta,dfbmcs320"; 88 #sound-dai-cells = <1>; 89 }; 90 91 bt_sound: bt-sound { 92 status = "disabled"; 93 compatible = "simple-audio-card"; 94 simple-audio-card,format = "dsp_a"; 95 simple-audio-card,bitclock-inversion = <0>; 96 simple-audio-card,mclk-fs = <256>; 97 simple-audio-card,name = "rockchip,bt"; 98 simple-audio-card,cpu { 99 sound-dai = <&i2s2_2ch>; 100 }; 101 simple-audio-card,codec { 102 sound-dai = <&bt_sco 1>; 103 }; 104 }; 105 106 charge-animation { 107 compatible = "rockchip,uboot-charge"; 108 rockchip,uboot-charge-on = <1>; 109 rockchip,android-charge-on = <0>; 110 rockchip,uboot-low-power-voltage = <6800>; 111 rockchip,screen-on-voltage = <6900>; 112 rockchip,uboot-exit-charge-level = <2>; 113 rockchip,uboot-exit-charge-auto = <0>; 114 rockchip,system-suspend = <1>; 115 regulator-on-in-mem = <&vdd_log_s0>, <&vcc_2v0_pldo_s3>, 116 <&vdd2_ddr_s3>, <&vcc_1v1_nldo_s3>, 117 <&vdd1_1v8_ddr_s3>, <&vcc_1v8_s3>, 118 <&master_pldo6_s3>, <&vdd_0v75_s3>, 119 <&vdd2l_0v9_ddr_s3>, <&vdd_1v8_pll_s0>, <&pldo6_s3>; 120 121 regulator-off-in-mem = <&vdd_gpu_s0>, <&vdd_npu_s0>, 122 <&vdd_vdenc_s0>, <&vdd_gpu_mem_s0>, <&vdd_npu_mem_s0>, 123 <&vdd_vdenc_mem_s0>, <&avcc_1v8_s0>, <&vcc_3v3_s0>, 124 <&vccio_sd_s0>, <&master_nldo3>, <&avdd_0v75_s0>, 125 <&vdd_0v85_s0>, <&vdd_cpu_big1_s0>, <&vdd_cpu_big0_s0>, 126 <&vdd_cpu_lit_s0>, <&vdd_cpu_big1_mem_s0>, <&vdd_cpu_big0_mem_s0>, 127 <&vcc_1v8_s0>, <&vdd_cpu_lit_mem_s0>, <&vddq_ddr_s0>, 128 <&vdd_ddr_s0>, <&vcc_1v8_cam_s0>, <&avdd1v8_ddr_pll_s0>, 129 <&vcc_3v3_sd_s0>, <&vcc_2v8_cam_s0>, <&vdd_0v75_pll_s0>, 130 <&vdd_ddr_pll_s0>, <&slave_nldo3>, <&avdd_1v2_cam_s0>, 131 <&avdd_1v2_s0>, <&vcc_3v3_s3>; 132 status = "okay"; 133 }; 134 135 dp0_sound: dp0-sound { 136 status = "okay"; 137 compatible = "rockchip,hdmi"; 138 rockchip,card-name= "rockchip-dp0"; 139 rockchip,mclk-fs = <512>; 140 rockchip,cpu = <&spdif_tx2>; 141 rockchip,codec = <&dp0 1>; 142 rockchip,jack-det; 143 }; 144 145 es7202_sound_micarray: es7202-sound-micarray { 146 status = "okay"; 147 compatible = "simple-audio-card"; 148 simple-audio-card,format = "i2s"; 149 simple-audio-card,name = "rockchip,sound-micarray"; 150 simple-audio-card,mclk-fs = <256>; 151 simple-audio-card,dai-link@0 { 152 format = "pdm"; 153 cpu { 154 sound-dai = <&pdm0>; 155 }; 156 codec { 157 sound-dai = <&es7202>; 158 }; 159 }; 160 }; 161 162 es8388_sound: es8388-sound { 163 status = "okay"; 164 compatible = "rockchip,multicodecs-card"; 165 rockchip,card-name = "rockchip,es8388-codec"; 166 hp-det-gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; 167 io-channels = <&saradc 3>; 168 io-channel-names = "adc-detect"; 169 keyup-threshold-microvolt = <1800000>; 170 poll-interval = <100>; 171 spk-con-gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 172 hp-con-gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>; 173 rockchip,format = "i2s"; 174 rockchip,mclk-fs = <256>; 175 rockchip,cpu = <&i2s0_8ch>; 176 rockchip,codec = <&es8388>; 177 rockchip,audio-routing = 178 "Headphone", "LOUT1", 179 "Headphone", "ROUT1", 180 "Speaker", "LOUT2", 181 "Speaker", "ROUT2", 182 "Headphone", "Headphone Power", 183 "Headphone", "Headphone Power", 184 "Speaker", "Speaker Power", 185 "Speaker", "Speaker Power", 186 "LINPUT1", "Main Mic", 187 "LINPUT2", "Main Mic", 188 "RINPUT1", "Headset Mic", 189 "RINPUT2", "Headset Mic"; 190 pinctrl-names = "default"; 191 pinctrl-0 = <&hp_det>; 192 play-pause-key { 193 label = "playpause"; 194 linux,code = <KEY_PLAYPAUSE>; 195 press-threshold-microvolt = <2000>; 196 }; 197 }; 198 199 hall_sensor: hall-mh248 { 200 compatible = "hall-mh248"; 201 pinctrl-names = "default"; 202 pinctrl-0 = <&mh248_irq_gpio>; 203 irq-gpio = <&gpio1 RK_PA1 IRQ_TYPE_EDGE_BOTH>; 204 hall-active = <1>; 205 status = "okay"; 206 }; 207 208 panel-edp { 209 compatible = "innolux,p120zdg-bf4", "simple-panel"; 210 backlight = <&backlight>; 211 power-supply = <&vcc3v3_lcd_edp>; 212 prepare-delay-ms = <120>; 213 enable-delay-ms = <120>; 214 unprepare-delay-ms = <500>; 215 disable-delay-ms = <120>; 216 width-mm = <254>; 217 height-mm = <169>; 218 219 panel-timing { 220 clock-frequency = <206000000>; 221 hactive = <2160>; 222 vactive = <1440>; 223 hfront-porch = <48>; 224 hsync-len = <32>; 225 hback-porch = <80>; 226 vfront-porch = <3>; 227 vsync-len = <10>; 228 vback-porch = <27>; 229 hsync-active = <0>; 230 vsync-active = <0>; 231 de-active = <0>; 232 pixelclk-active = <0>; 233 }; 234 235 port { 236 panel_in_edp: endpoint { 237 remote-endpoint = <&edp0_out>; 238 }; 239 }; 240 }; 241 242 vcc3v3_lcd_edp: vcc3v3-lcd-edp { 243 compatible = "regulator-fixed"; 244 regulator-name = "vcc3v3_lcd_edp"; 245 regulator-boot-on; 246 gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; 247 enable-active-high; 248 vin-supply = <&vcc_3v3_s3>; 249 }; 250 251 vcc5v0_host: vcc5v0-host { 252 compatible = "regulator-fixed"; 253 regulator-name = "vcc5v0_host"; 254 regulator-boot-on; 255 regulator-always-on; 256 regulator-min-microvolt = <5000000>; 257 regulator-max-microvolt = <5000000>; 258 enable-active-high; 259 gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; 260 vin-supply = <&vcc5v0_usb>; 261 pinctrl-names = "default"; 262 pinctrl-0 = <&vcc5v0_host_en>; 263 }; 264 265 vcc5v0_sys: vcc5v0-sys { 266 compatible = "regulator-fixed"; 267 regulator-name = "vcc5v0_sys"; 268 regulator-always-on; 269 regulator-boot-on; 270 regulator-min-microvolt = <5000000>; 271 regulator-max-microvolt = <5000000>; 272 }; 273 274 vcc5v0_usb: vcc5v0-usb { 275 compatible = "regulator-fixed"; 276 regulator-name = "vcc5v0_usb"; 277 regulator-always-on; 278 regulator-boot-on; 279 regulator-min-microvolt = <5000000>; 280 regulator-max-microvolt = <5000000>; 281 }; 282 283 vcc_mipidcphy1: vcc-mipidcphy1-regulator { 284 compatible = "regulator-fixed"; 285 gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 286 pinctrl-names = "default"; 287 pinctrl-0 = <&mipidcphy1_pwr>; 288 regulator-name = "vcc_mipidcphy1"; 289 enable-active-high; 290 regulator-always-on; 291 regulator-boot-on; 292 }; 293 294 wireless_bluetooth: wireless-bluetooth { 295 compatible = "bluetooth-platdata"; 296 clocks = <&hym8563>; 297 clock-names = "ext_clock"; 298 uart_rts_gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; 299 pinctrl-names = "default", "rts_gpio"; 300 pinctrl-0 = <&uart7m1_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>; 301 pinctrl-1 = <&uart7_gpios>; 302 BT,reset_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; 303 BT,wake_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 304 BT,wake_host_irq = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; 305 status = "okay"; 306 }; 307 308 wireless_wlan: wireless-wlan { 309 compatible = "wlan-platdata"; 310 wifi_chip_type = "ap6275p"; 311 pinctrl-names = "default"; 312 pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>; 313 WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 314 WIFI,poweren_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 315 status = "okay"; 316 }; 317}; 318 319&av1d_mmu { 320 status = "okay"; 321}; 322 323&avdd_1v2_cam_s0 { 324 regulator-min-microvolt = <1350000>; 325 regulator-max-microvolt = <1350000>; 326 regulator-ramp-delay = <12500>; 327}; 328 329&combphy0_ps { 330 status = "okay"; 331}; 332 333&cpu_l0 { 334 cpu-supply = <&vdd_cpu_lit_s0>; 335 mem-supply = <&vdd_cpu_lit_mem_s0>; 336}; 337 338&cpu_b0 { 339 cpu-supply = <&vdd_cpu_big0_s0>; 340 mem-supply = <&vdd_cpu_big0_mem_s0>; 341}; 342 343&cpu_b2 { 344 cpu-supply = <&vdd_cpu_big1_s0>; 345 mem-supply = <&vdd_cpu_big1_mem_s0>; 346}; 347 348&dp0 { 349 status = "okay"; 350}; 351 352&dp0_out { 353 link-frequencies = /bits/ 64 <5400000000>; 354}; 355 356&dp0_in_vp1 { 357 status = "okay"; 358}; 359 360&edp0 { 361 support-psr; 362 force-hpd; 363 status = "okay"; 364}; 365 366&edp0_in_vp2 { 367 status = "okay"; 368}; 369 370&edp0_out { 371 remote-endpoint = <&panel_in_edp>; 372}; 373 374&fiq_debugger { 375 pinctrl-0 = <&uart2m1_xfer>; 376}; 377 378&gpu { 379 mali-supply = <&vdd_gpu_s0>; 380 mem-supply = <&vdd_gpu_mem_s0>; 381 status = "okay"; 382}; 383 384&hdptxphy0 { 385 /* Single Vdiff Training Table for power reduction (optional) */ 386 training-table = /bits/ 8 < 387 /* voltage swing 0, pre-emphasis 0->3 */ 388 0x0d 0x00 0x00 0x00 0x00 0x00 389 0x0d 0x00 0x00 0x00 0x00 0x00 390 0x0d 0x00 0x00 0x00 0x00 0x00 391 0x0d 0x00 0x00 0x00 0x00 0x00 392 /* voltage swing 1, pre-emphasis 0->2 */ 393 0x0d 0x00 0x00 0x00 0x00 0x00 394 0x0d 0x00 0x00 0x00 0x00 0x00 395 0x0d 0x00 0x00 0x00 0x00 0x00 396 /* voltage swing 2, pre-emphasis 0->1 */ 397 0x0d 0x00 0x00 0x00 0x00 0x00 398 0x0d 0x00 0x00 0x00 0x00 0x00 399 /* voltage swing 3, pre-emphasis 0 */ 400 0x0d 0x00 0x00 0x00 0x00 0x00 401 >; 402 status = "okay"; 403}; 404 405&i2c2 { 406 status = "okay"; 407 408 hym8563: hym8563@51 { 409 compatible = "haoyu,hym8563"; 410 reg = <0x51>; 411 #clock-cells = <0>; 412 clock-frequency = <32768>; 413 clock-output-names = "hym8563"; 414 pinctrl-names = "default"; 415 pinctrl-0 = <&rtc_int>; 416 417 interrupt-parent = <&gpio0>; 418 interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>; 419 wakeup-source; 420 }; 421 422 cw2015@62 { 423 status = "okay"; 424 compatible = "cellwise,cw2015"; 425 reg = <0x62>; 426 cellwise,battery-profile = /bits/ 8 427 <0x17 0x67 0x6C 0x66 0x65 0x64 0x61 0x5B 428 0x5F 0x75 0x49 0x52 0x50 0x51 0x48 0x3D 429 0x34 0x2C 0x29 0x21 0x23 0x2D 0x40 0x49 430 0x25 0x5C 0x0B 0x85 0x10 0x1F 0x31 0x49 431 0x58 0x5E 0x63 0x6C 0x3E 0x1D 0x9A 0x35 432 0x0A 0x33 0x15 0x3B 0x70 0x99 0xAB 0x17 433 0x40 0x75 0x99 0xC4 0x80 0xB5 0xDE 0xCB 434 0x2F 0x00 0x64 0xA5 0xB5 0x00 0xF8 0x39>; 435 cellwise,dual-cell = <1>; 436 cellwise,monitor-interval-ms = <5000>; 437 monitored-battery = <&battery>; 438 power-supplies = <&bq25703>; 439 }; 440 441 bq25703: bq25703@6b { 442 status = "okay"; 443 compatible = "ti,bq25703"; 444 reg = <0x6b>; 445 ti,usb-charger-detection = <&usbc0>; 446 447 interrupt-parent = <&gpio0>; 448 interrupts = <RK_PD2 IRQ_TYPE_LEVEL_LOW>; 449 otg-mode-en-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; 450 pinctrl-names = "default"; 451 pinctrl-0 = <&charger_ok>; 452 extcon = <&u2phy0>; 453 ti,charge-current = <2500000>; 454 ti,max-input-voltage = <20000000>; 455 ti,max-input-current = <6000000>; 456 ti,max-charge-voltage = <8750000>; 457 ti,input-current = <500000>; 458 ti,input-current-sdp = <500000>; 459 ti,input-current-dcp = <2000000>; 460 ti,input-current-cdp = <2000000>; 461 ti,minimum-sys-voltage = <7400000>; 462 ti,otg-voltage = <5000000>; 463 ti,otg-current = <1500000>; 464 pd-charge-only = <0>; 465 regulators { 466 vbus5v0_typec: vbus5v0-typec { 467 regulator-compatible = "otg-vbus"; 468 regulator-name = "vbus5v0_typec"; 469 }; 470 }; 471 }; 472}; 473 474&i2c3 { 475 status = "okay"; 476 477 es8388: es8388@11 { 478 status = "okay"; 479 #sound-dai-cells = <0>; 480 compatible = "everest,es8388", "everest,es8323"; 481 reg = <0x11>; 482 clocks = <&mclkout_i2s0>; 483 clock-names = "mclk"; 484 assigned-clocks = <&mclkout_i2s0>; 485 assigned-clock-rates = <12288000>; 486 pinctrl-names = "default"; 487 pinctrl-0 = <&i2s0_mclk>; 488 }; 489 490 es7202: es7202@32 { 491 status = "okay"; 492 #sound-dai-cells = <0>; 493 compatible = "ES7202_PDM_ADC_1"; 494 power-supply = <&vcc_1v8_s0>; /* only 1v8 or 3v3, default is 3v3 */ 495 reg = <0x32>; 496 }; 497}; 498 499&i2c4 { 500 status = "okay"; 501 pinctrl-names = "default"; 502 pinctrl-0 = <&i2c4m3_xfer>; 503 504 elan_touch: elan_ktf@10 { 505 status = "okay"; 506 compatible = "elan,ektf"; 507 reg = <0x10>; 508 pinctrl-names = "default"; 509 pinctrl-0 = <&touch_gpio>; 510 elan,rst-gpio = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 511 elan,irq-gpio = <&gpio1 RK_PB5 IRQ_TYPE_LEVEL_LOW>; 512 chip_type = <0x01>; /* 1:HID IIC, 0: NORMAL IIC */ 513 report_type = <0x01>; /* 1:B protocol, 0:A protocol */ 514 }; 515}; 516 517&i2c5 { 518 status = "okay"; 519 pinctrl-names = "default"; 520 pinctrl-0 = <&i2c5m0_xfer>; 521 522 mpu6500_acc: mpu_acc@68 { 523 status = "okay"; 524 compatible = "mpu6500_acc"; 525 reg = <0x68>; 526 irq-gpio = <&gpio3 RK_PB4 IRQ_TYPE_EDGE_RISING>; 527 irq_enable = <0>; 528 poll_delay_ms = <30>; 529 type = <SENSOR_TYPE_ACCEL>; 530 layout = <5>; 531 }; 532 533 mpu6500_gyro: mpu_gyro@68 { 534 status = "okay"; 535 compatible = "mpu6500_gyro"; 536 reg = <0x68>; 537 poll_delay_ms = <30>; 538 type = <SENSOR_TYPE_GYROSCOPE>; 539 layout = <5>; 540 }; 541}; 542 543&i2c6 { 544 status = "disabled"; 545}; 546 547&i2c7 { 548 status = "okay"; 549 pinctrl-names = "default"; 550 pinctrl-0 = <&i2c7m2_xfer>; 551 552 aw8601: aw8601@c { 553 compatible = "awinic,aw8601"; 554 status = "okay"; 555 reg = <0x0c>; 556 rockchip,vcm-start-current = <56>; 557 rockchip,vcm-rated-current = <96>; 558 rockchip,vcm-step-mode = <4>; 559 rockchip,camera-module-index = <0>; 560 rockchip,camera-module-facing = "back"; 561 }; 562 563 ov13855: ov13855@10 { 564 compatible = "ovti,ov13855"; 565 status = "okay"; 566 reg = <0x10>; 567 clocks = <&cru CLK_MIPI_CAMARAOUT_M2>; 568 clock-names = "xvclk"; 569 power-domains = <&power RK3588_PD_VI>; 570 pinctrl-names = "default"; 571 pinctrl-0 = <&mipim1_camera2_clk>; 572 rockchip,grf = <&sys_grf>; 573 reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 574 pwdn-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; 575 rockchip,camera-module-index = <1>; 576 rockchip,camera-module-facing = "front"; 577 rockchip,camera-module-name = "CMK-OT2016-FV1"; 578 rockchip,camera-module-lens-name = "default"; 579 port { 580 ov13855_out: endpoint { 581 remote-endpoint = <&mipi_in_ucam1>; 582 data-lanes = <1 2 3 4>; 583 }; 584 }; 585 }; 586 587 ov50c40: ov50c40@36 { 588 compatible = "ovti,ov50c40"; 589 status = "okay"; 590 reg = <0x36>; 591 clocks = <&cru CLK_MIPI_CAMARAOUT_M1>; 592 clock-names = "xvclk"; 593 power-domains = <&power RK3588_PD_VI>; 594 pinctrl-names = "default"; 595 pinctrl-0 = <&mipim1_camera1_clk>; 596 rockchip,grf = <&sys_grf>; 597 reset-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>; 598 pwdn-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; 599 rockchip,camera-module-index = <0>; 600 rockchip,camera-module-facing = "back"; 601 rockchip,camera-module-name = "HZGA06"; 602 rockchip,camera-module-lens-name = "ZE0082C1"; 603 eeprom-ctrl = <&otp_eeprom>; 604 lens-focus = <&aw8601>; 605 port { 606 ov50c40_out: endpoint { 607 remote-endpoint = <&mipi_in_ov50c40>; 608 data-lanes = <1 2 3 4>; 609 }; 610 }; 611 }; 612 613 otp_eeprom: otp_eeprom@50 { 614 compatible = "rk,otp_eeprom"; 615 status = "okay"; 616 reg = <0x50>; 617 }; 618}; 619 620&csi2_dcphy0 { 621 status = "okay"; 622 623 ports { 624 #address-cells = <1>; 625 #size-cells = <0>; 626 port@0 { 627 reg = <0>; 628 #address-cells = <1>; 629 #size-cells = <0>; 630 631 mipi_in_ov50c40: endpoint@1 { 632 reg = <1>; 633 remote-endpoint = <&ov50c40_out>; 634 data-lanes = <1 2 3 4>; 635 }; 636 }; 637 port@1 { 638 reg = <1>; 639 #address-cells = <1>; 640 #size-cells = <0>; 641 642 csidcphy0_out: endpoint@0 { 643 reg = <0>; 644 remote-endpoint = <&mipi0_csi2_input>; 645 }; 646 }; 647 }; 648}; 649 650&csi2_dcphy1 { 651 status = "okay"; 652 653 ports { 654 #address-cells = <1>; 655 #size-cells = <0>; 656 port@0 { 657 reg = <0>; 658 #address-cells = <1>; 659 #size-cells = <0>; 660 661 mipi_in_ucam1: endpoint@1 { 662 reg = <1>; 663 remote-endpoint = <&ov13855_out>; 664 data-lanes = <1 2 3 4>; 665 }; 666 }; 667 port@1 { 668 reg = <1>; 669 #address-cells = <1>; 670 #size-cells = <0>; 671 672 csidcphy1_out: endpoint@0 { 673 reg = <0>; 674 remote-endpoint = <&mipi1_csi2_input>; 675 }; 676 }; 677 }; 678}; 679 680&mipi_dcphy0 { 681 status = "okay"; 682}; 683 684&mipi_dcphy1 { 685 status = "okay"; 686}; 687 688&mipi0_csi2 { 689 status = "okay"; 690 691 ports { 692 #address-cells = <1>; 693 #size-cells = <0>; 694 695 port@0 { 696 reg = <0>; 697 #address-cells = <1>; 698 #size-cells = <0>; 699 700 mipi0_csi2_input: endpoint@1 { 701 reg = <1>; 702 remote-endpoint = <&csidcphy0_out>; 703 }; 704 }; 705 706 port@1 { 707 reg = <1>; 708 #address-cells = <1>; 709 #size-cells = <0>; 710 711 mipi0_csi2_output: endpoint@0 { 712 reg = <0>; 713 remote-endpoint = <&cif_mipi_in0>; 714 }; 715 }; 716 }; 717}; 718 719&mipi1_csi2 { 720 status = "okay"; 721 722 ports { 723 #address-cells = <1>; 724 #size-cells = <0>; 725 726 port@0 { 727 reg = <0>; 728 #address-cells = <1>; 729 #size-cells = <0>; 730 731 mipi1_csi2_input: endpoint@1 { 732 reg = <1>; 733 remote-endpoint = <&csidcphy1_out>; 734 }; 735 }; 736 737 port@1 { 738 reg = <1>; 739 #address-cells = <1>; 740 #size-cells = <0>; 741 742 mipi1_csi2_output: endpoint@0 { 743 reg = <0>; 744 remote-endpoint = <&cif_mipi_in1>; 745 }; 746 }; 747 }; 748}; 749 750&i2c8 { 751 status = "okay"; 752 pinctrl-names = "default"; 753 pinctrl-0 = <&i2c8m2_xfer>; 754 755 usbc0: fusb302@22 { 756 compatible = "fcs,fusb302"; 757 reg = <0x22>; 758 interrupt-parent = <&gpio0>; 759 interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>; 760 int-n-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>; 761 pinctrl-names = "default"; 762 pinctrl-0 = <&usbc0_int>; 763 vbus-supply = <&vbus5v0_typec>; 764 status = "okay"; 765 766 ports { 767 #address-cells = <1>; 768 #size-cells = <0>; 769 770 port@0 { 771 reg = <0>; 772 usbc0_role_sw: endpoint@0 { 773 remote-endpoint = <&dwc3_0_role_switch>; 774 }; 775 }; 776 }; 777 778 usb_con: connector { 779 compatible = "usb-c-connector"; 780 label = "USB-C"; 781 data-role = "dual"; 782 power-role = "dual"; 783 try-power-role = "sink"; 784 op-sink-microwatt = <1000000>; 785 sink-pdos = 786 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) 787 PDO_FIXED(9000, 3000, PDO_FIXED_USB_COMM) 788 PDO_FIXED(12000, 3000, PDO_FIXED_USB_COMM)>; 789 source-pdos = 790 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 791 792 altmodes { 793 #address-cells = <1>; 794 #size-cells = <0>; 795 796 altmode@0 { 797 reg = <0>; 798 svid = <0xff01>; 799 vdo = <0xffffffff>; 800 }; 801 }; 802 803 ports { 804 #address-cells = <1>; 805 #size-cells = <0>; 806 807 port@0 { 808 reg = <0>; 809 usbc0_orien_sw: endpoint { 810 remote-endpoint = <&usbdp_phy0_orientation_switch>; 811 }; 812 }; 813 814 port@1 { 815 reg = <1>; 816 dp_altmode_mux: endpoint { 817 remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; 818 }; 819 }; 820 }; 821 }; 822 }; 823}; 824 825&i2s0_8ch { 826 status = "okay"; 827 rockchip,clk-trcm = <1>; 828 pinctrl-0 = <&i2s0_lrck 829 &i2s0_sclk 830 &i2s0_sdi0 831 &i2s0_sdo0>; 832}; 833 834&i2s2_2ch { 835 pinctrl-0 = <&i2s2m1_lrck &i2s2m1_sclk &i2s2m1_sdi &i2s2m1_sdo>; 836 rockchip,bclk-fs = <32>; 837 status = "disabled"; 838}; 839 840&iep { 841 status = "okay"; 842}; 843 844&iep_mmu { 845 status = "okay"; 846}; 847 848&jpegd { 849 status = "okay"; 850}; 851 852&jpegd_mmu { 853 status = "okay"; 854}; 855 856&jpege_ccu { 857 status = "okay"; 858}; 859 860&jpege0 { 861 status = "okay"; 862}; 863 864&jpege0_mmu { 865 status = "okay"; 866}; 867 868&jpege1 { 869 status = "okay"; 870}; 871 872&jpege1_mmu { 873 status = "okay"; 874}; 875 876&jpege2 { 877 status = "okay"; 878}; 879 880&jpege2_mmu { 881 status = "okay"; 882}; 883 884&jpege3 { 885 status = "okay"; 886}; 887 888&jpege3_mmu { 889 status = "okay"; 890}; 891 892&mpp_srv { 893 status = "okay"; 894}; 895 896&pcie2x1l2 { 897 reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>; 898 rockchip,skip-scan-in-resume; 899 status = "okay"; 900}; 901 902&pdm0 { 903 rockchip,path-map = <2 0 1 3>; 904 status = "okay"; 905}; 906 907&pinctrl { 908 cam { 909 mipidcphy1_pwr: mipidcphy1-pwr { 910 rockchip,pins = 911 /* camera power en */ 912 <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 913 }; 914 }; 915 916 charger { 917 charger_ok: charger_ok { 918 rockchip,pins = <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>; 919 }; 920 }; 921 922 headphone { 923 hp_det: hp-det { 924 rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 925 }; 926 }; 927 928 hym8563 { 929 rtc_int: rtc-int { 930 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; 931 }; 932 }; 933 934 sensor { 935 mpu6500_irq_gpio: mpu6500-irq-gpio { 936 rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 937 }; 938 939 mh248_irq_gpio: mh248-irq-gpio { 940 rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 941 }; 942 }; 943 944 touch { 945 touch_gpio: touch-gpio { 946 rockchip,pins = 947 <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 948 <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; 949 }; 950 }; 951 952 usb { 953 vcc5v0_host_en: vcc5v0-host-en { 954 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 955 }; 956 }; 957 958 usb-typec { 959 usbc0_int: usbc0-int { 960 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 961 }; 962 }; 963 964 wireless-bluetooth { 965 uart7_gpios: uart7-gpios { 966 rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 967 }; 968 969 bt_reset_gpio: bt-reset-gpio { 970 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 971 }; 972 973 bt_wake_gpio: bt-wake-gpio { 974 rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 975 }; 976 977 bt_irq_gpio: bt-irq-gpio { 978 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>; 979 }; 980 }; 981 982 wireless-wlan { 983 wifi_host_wake_irq: wifi-host-wake-irq { 984 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; 985 }; 986 987 wifi_poweren_gpio: wifi-poweren-gpio { 988 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 989 }; 990 }; 991}; 992 993&pwm12 { 994 pinctrl-0 = <&pwm12m1_pins>; 995 status = "okay"; 996}; 997 998&rga3_core0 { 999 status = "okay"; 1000}; 1001 1002&rga3_0_mmu { 1003 status = "okay"; 1004}; 1005 1006&rga3_core1 { 1007 status = "okay"; 1008}; 1009 1010&rga3_1_mmu { 1011 status = "okay"; 1012}; 1013 1014&rga2 { 1015 status = "okay"; 1016}; 1017 1018&rkcif { 1019 status = "okay"; 1020}; 1021 1022&rkcif_mipi_lvds { 1023 status = "okay"; 1024 1025 port { 1026 cif_mipi_in0: endpoint { 1027 remote-endpoint = <&mipi0_csi2_output>; 1028 }; 1029 }; 1030}; 1031 1032&rkcif_mipi_lvds_sditf { 1033 status = "okay"; 1034 1035 port { 1036 mipi_lvds_sditf: endpoint { 1037 remote-endpoint = <&isp1_in1>; 1038 }; 1039 }; 1040}; 1041 1042&rkcif_mipi_lvds1 { 1043 status = "okay"; 1044 1045 port { 1046 cif_mipi_in1: endpoint { 1047 remote-endpoint = <&mipi1_csi2_output>; 1048 }; 1049 }; 1050}; 1051 1052&rkcif_mipi_lvds1_sditf { 1053 status = "okay"; 1054 1055 port { 1056 mipi1_lvds_sditf: endpoint { 1057 remote-endpoint = <&isp1_in2>; 1058 }; 1059 }; 1060}; 1061 1062&rkcif_mmu { 1063 status = "okay"; 1064}; 1065 1066&rkisp_unite { 1067 status = "okay"; 1068 1069}; 1070 1071&rkisp_unite_mmu { 1072 status = "okay"; 1073}; 1074 1075&rkisp0_vir0 { 1076 status = "okay"; 1077 /* 1078 * dual isp process image case 1079 * other rkisp hw and virtual nodes should disabled 1080 */ 1081 rockchip,hw = <&rkisp_unite>; 1082 port { 1083 #address-cells = <1>; 1084 #size-cells = <0>; 1085 1086 isp1_in1: endpoint@0 { 1087 reg = <0>; 1088 remote-endpoint = <&mipi_lvds_sditf>; 1089 }; 1090 isp1_in2: endpoint@1 { 1091 reg = <1>; 1092 remote-endpoint = <&mipi1_lvds_sditf>; 1093 }; 1094 }; 1095}; 1096 1097&rknpu { 1098 rknpu-supply = <&vdd_npu_s0>; 1099 mem-supply = <&vdd_npu_mem_s0>; 1100 status = "okay"; 1101}; 1102 1103&rknpu_mmu { 1104 status = "okay"; 1105}; 1106 1107&rkvdec_ccu { 1108 status = "okay"; 1109}; 1110 1111&rkvdec0 { 1112 status = "okay"; 1113}; 1114 1115&rkvdec0_mmu { 1116 status = "okay"; 1117}; 1118 1119&rkvdec1 { 1120 status = "okay"; 1121}; 1122 1123&rkvdec1_mmu { 1124 status = "okay"; 1125}; 1126 1127&rkvenc_ccu { 1128 status = "okay"; 1129}; 1130 1131&rkvenc0 { 1132 venc-supply = <&vdd_vdenc_s0>; 1133 mem-supply = <&vdd_vdenc_mem_s0>; 1134 status = "okay"; 1135}; 1136 1137&rkvenc0_mmu { 1138 status = "okay"; 1139}; 1140 1141&rkvenc1 { 1142 venc-supply = <&vdd_vdenc_s0>; 1143 mem-supply = <&vdd_vdenc_mem_s0>; 1144 status = "okay"; 1145}; 1146 1147&rkvenc1_mmu { 1148 status = "okay"; 1149}; 1150 1151&rockchip_suspend { 1152 status = "okay"; 1153 rockchip,sleep-debug-en = <1>; 1154}; 1155 1156&route_edp0 { 1157 connect = <&vp2_out_edp0>; 1158 status = "okay"; 1159}; 1160 1161&saradc { 1162 status = "okay"; 1163 vref-supply = <&avcc_1v8_s0>; 1164}; 1165 1166&sdhci { 1167 bus-width = <8>; 1168 no-sdio; 1169 no-sd; 1170 non-removable; 1171 max-frequency = <200000000>; 1172 mmc-hs400-1_8v; 1173 mmc-hs400-enhanced-strobe; 1174 status = "okay"; 1175}; 1176 1177&sdmmc { 1178 max-frequency = <150000000>; 1179 no-sdio; 1180 no-mmc; 1181 bus-width = <4>; 1182 cap-mmc-highspeed; 1183 cap-sd-highspeed; 1184 disable-wp; 1185 sd-uhs-sdr104; 1186 vmmc-supply = <&vcc_3v3_sd_s0>; 1187 vqmmc-supply = <&vccio_sd_s0>; 1188 pinctrl-names = "default"; 1189 pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>; 1190 status = "okay"; 1191}; 1192 1193&spdif_tx2 { 1194 status = "okay"; 1195}; 1196 1197&tsadc { 1198 status = "okay"; 1199}; 1200 1201&uart7 { 1202 pinctrl-names = "default"; 1203 pinctrl-0 = <&uart7m1_xfer &uart7m1_ctsn>; 1204 status = "okay"; 1205}; 1206 1207&u2phy0 { 1208 status = "okay"; 1209}; 1210 1211&u2phy2 { 1212 status = "okay"; 1213}; 1214 1215&u2phy0_otg { 1216 rockchip,typec-vbus-det; 1217 status = "okay"; 1218}; 1219 1220&u2phy2_host { 1221 status = "okay"; 1222 phy-supply = <&vcc5v0_host>; 1223}; 1224 1225&usb_host0_ehci { 1226 status = "okay"; 1227}; 1228 1229&usb_host0_ohci { 1230 status = "okay"; 1231}; 1232 1233&usbdp_phy0 { 1234 orientation-switch; 1235 svid = <0xff01>; 1236 sbu1-dc-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; 1237 sbu2-dc-gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_HIGH>; 1238 status = "okay"; 1239 1240 port { 1241 #address-cells = <1>; 1242 #size-cells = <0>; 1243 usbdp_phy0_orientation_switch: endpoint@0 { 1244 reg = <0>; 1245 remote-endpoint = <&usbc0_orien_sw>; 1246 }; 1247 1248 usbdp_phy0_dp_altmode_mux: endpoint@1 { 1249 reg = <1>; 1250 remote-endpoint = <&dp_altmode_mux>; 1251 }; 1252 }; 1253}; 1254 1255&usbdp_phy0_dp { 1256 status = "okay"; 1257}; 1258 1259&usbdp_phy0_u3 { 1260 status = "okay"; 1261}; 1262 1263&usbdrd3_0 { 1264 status = "okay"; 1265}; 1266 1267&usbdrd_dwc3_0 { 1268 dr_mode = "otg"; 1269 status = "okay"; 1270 1271 usb-role-switch; 1272 port { 1273 #address-cells = <1>; 1274 #size-cells = <0>; 1275 dwc3_0_role_switch: endpoint@0 { 1276 reg = <0>; 1277 remote-endpoint = <&usbc0_role_sw>; 1278 }; 1279 }; 1280}; 1281 1282&usbhost3_0 { 1283 status = "disabled"; 1284}; 1285 1286&usbhost_dwc3_0 { 1287 status = "disabled"; 1288}; 1289 1290&vdpu { 1291 status = "okay"; 1292}; 1293 1294&vdpu_mmu { 1295 status = "okay"; 1296}; 1297 1298&vepu { 1299 status = "okay"; 1300}; 1301 1302&vop { 1303 status = "okay"; 1304}; 1305 1306&vop_mmu { 1307 status = "okay"; 1308}; 1309 1310&vp1 { 1311 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1312 1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; 1313 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>; 1314}; 1315 1316&vp2 { 1317 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2 | 1318 1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; 1319 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>; 1320}; 1321