1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/pinctrl/rockchip.h> 9 10&spi2 { 11 status = "okay"; 12 assigned-clocks = <&cru CLK_SPI2>; 13 assigned-clock-rates = <200000000>; 14 num-cs = <2>; 15 16 rk806master: rk806master@0 { 17 compatible = "rockchip,rk806"; 18 spi-max-frequency = <1000000>; 19 reg = <0x0>; 20 21 interrupt-parent = <&gpio0>; 22 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 23 24 pinctrl-names = "default", "pmic-power-off"; 25 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, <&rk806_dvs2_null>, <&rk806_dvs3_null>; 26 pinctrl-1 = <&rk806_dvs1_pwrdn>; 27 28 /* 2800mv-3500mv */ 29 low_voltage_threshold = <3000>; 30 /* 2700mv-3400mv */ 31 shutdown_voltage_threshold = <2700>; 32 /* 140 160 */ 33 shutdown_temperture_threshold = <160>; 34 hotdie_temperture_threshold = <115>; 35 36 /* 0: restart PMU; 37 * 1: reset all the power off reset registers, 38 * forcing the state to switch to ACTIVE mode; 39 * 2: Reset all the power off reset registers, 40 * forcing the state to switch to ACTIVE mode, 41 * and simultaneously pull down the RESETB PIN for 5mS before releasing 42 */ 43 pmic-reset-func = <1>; 44 45 /* PWRON_ON_TIME: 0:500mS; 1:20mS */ 46 pwron-on-time-20ms; 47 48 vcc1-supply = <&vcc5v0_sys>; 49 vcc2-supply = <&vcc5v0_sys>; 50 vcc3-supply = <&vcc5v0_sys>; 51 vcc4-supply = <&vcc5v0_sys>; 52 vcc5-supply = <&vcc5v0_sys>; 53 vcc6-supply = <&vcc5v0_sys>; 54 vcc7-supply = <&vcc5v0_sys>; 55 vcc8-supply = <&vcc5v0_sys>; 56 vcc9-supply = <&vcc5v0_sys>; 57 vcc10-supply = <&vcc5v0_sys>; 58 vcc11-supply = <&vcc_2v0_pldo_s3>; 59 vcc12-supply = <&vcc5v0_sys>; 60 vcc13-supply = <&vcc5v0_sys>; 61 vcc14-supply = <&vcc_1v1_nldo_s3>; 62 vcca-supply = <&vcc5v0_sys>; 63 64 pwrkey { 65 status = "okay"; 66 }; 67 68 pinctrl_rk806: pinctrl_rk806 { 69 gpio-controller; 70 #gpio-cells = <2>; 71 72 rk806_dvs1_null: rk806_dvs1_null { 73 pins = "gpio_pwrctrl2"; 74 function = "pin_fun0"; 75 }; 76 77 rk806_dvs1_slp: rk806_dvs1_slp { 78 pins = "gpio_pwrctrl1"; 79 function = "pin_fun1"; 80 }; 81 82 rk806_dvs1_pwrdn: rk806_dvs1_pwrdn { 83 pins = "gpio_pwrctrl1"; 84 function = "pin_fun2"; 85 }; 86 87 rk806_dvs1_rst: rk806_dvs1_rst { 88 pins = "gpio_pwrctrl1"; 89 function = "pin_fun3"; 90 }; 91 92 rk806_dvs2_null: rk806_dvs2_null { 93 pins = "gpio_pwrctrl2"; 94 function = "pin_fun0"; 95 }; 96 97 rk806_dvs2_slp: rk806_dvs2_slp { 98 pins = "gpio_pwrctrl2"; 99 function = "pin_fun1"; 100 }; 101 102 rk806_dvs2_pwrdn: rk806_dvs2_pwrdn { 103 pins = "gpio_pwrctrl2"; 104 function = "pin_fun2"; 105 }; 106 107 rk806_dvs2_rst: rk806_dvs2_rst { 108 pins = "gpio_pwrctrl2"; 109 function = "pin_fun3"; 110 }; 111 112 rk806_dvs2_dvs: rk806_dvs2_dvs { 113 pins = "gpio_pwrctrl2"; 114 function = "pin_fun4"; 115 }; 116 117 rk806_dvs2_gpio: rk806_dvs2_gpio { 118 pins = "gpio_pwrctrl2"; 119 function = "pin_fun5"; 120 }; 121 122 rk806_dvs3_null: rk806_dvs3_null { 123 pins = "gpio_pwrctrl3"; 124 function = "pin_fun0"; 125 }; 126 127 rk806_dvs3_slp: rk806_dvs3_slp { 128 pins = "gpio_pwrctrl3"; 129 function = "pin_fun1"; 130 }; 131 132 rk806_dvs3_pwrdn: rk806_dvs3_pwrdn { 133 pins = "gpio_pwrctrl3"; 134 function = "pin_fun2"; 135 }; 136 137 rk806_dvs3_rst: rk806_dvs3_rst { 138 pins = "gpio_pwrctrl3"; 139 function = "pin_fun3"; 140 }; 141 142 rk806_dvs3_dvs: rk806_dvs3_dvs { 143 pins = "gpio_pwrctrl3"; 144 function = "pin_fun4"; 145 }; 146 147 rk806_dvs3_gpio: rk806_dvs3_gpio { 148 pins = "gpio_pwrctrl3"; 149 function = "pin_fun5"; 150 }; 151 }; 152 153 regulators { 154 vdd_gpu_s0: DCDC_REG1 { 155 regulator-boot-on; 156 regulator-min-microvolt = <550000>; 157 regulator-max-microvolt = <950000>; 158 regulator-ramp-delay = <12500>; 159 regulator-enable-ramp-delay = <400>; 160 regulator-name = "vdd_gpu_s0"; 161 regulator-state-mem { 162 regulator-off-in-suspend; 163 }; 164 }; 165 166 vdd_npu_s0: DCDC_REG2 { 167 regulator-always-on; 168 regulator-boot-on; 169 regulator-min-microvolt = <550000>; 170 regulator-max-microvolt = <950000>; 171 regulator-ramp-delay = <12500>; 172 regulator-name = "vdd_npu_s0"; 173 regulator-state-mem { 174 regulator-off-in-suspend; 175 }; 176 }; 177 178 vdd_log_s0: DCDC_REG3 { 179 regulator-always-on; 180 regulator-boot-on; 181 regulator-min-microvolt = <675000>; 182 regulator-max-microvolt = <750000>; 183 regulator-ramp-delay = <12500>; 184 regulator-name = "vdd_log_s0"; 185 regulator-state-mem { 186 regulator-off-in-suspend; 187 regulator-suspend-microvolt = <750000>; 188 }; 189 }; 190 191 vdd_vdenc_s0: DCDC_REG4 { 192 regulator-always-on; 193 regulator-boot-on; 194 regulator-min-microvolt = <550000>; 195 regulator-max-microvolt = <950000>; 196 regulator-ramp-delay = <12500>; 197 regulator-name = "vdd_vdenc_s0"; 198 regulator-state-mem { 199 regulator-off-in-suspend; 200 }; 201 }; 202 203 vdd_gpu_mem_s0: DCDC_REG5 { 204 regulator-boot-on; 205 regulator-min-microvolt = <675000>; 206 regulator-max-microvolt = <950000>; 207 regulator-ramp-delay = <12500>; 208 regulator-enable-ramp-delay = <400>; 209 regulator-name = "vdd_gpu_mem_s0"; 210 regulator-state-mem { 211 regulator-off-in-suspend; 212 }; 213 }; 214 215 vdd_npu_mem_s0: DCDC_REG6 { 216 regulator-always-on; 217 regulator-boot-on; 218 regulator-min-microvolt = <675000>; 219 regulator-max-microvolt = <950000>; 220 regulator-ramp-delay = <12500>; 221 regulator-name = "vdd_npu_mem_s0"; 222 regulator-state-mem { 223 regulator-off-in-suspend; 224 }; 225 }; 226 227 vcc_2v0_pldo_s3: DCDC_REG7 { 228 regulator-always-on; 229 regulator-boot-on; 230 regulator-min-microvolt = <2000000>; 231 regulator-max-microvolt = <2000000>; 232 regulator-ramp-delay = <12500>; 233 regulator-name = "vdd_2v0_pldo_s3"; 234 regulator-state-mem { 235 regulator-on-in-suspend; 236 regulator-suspend-microvolt = <2000000>; 237 }; 238 }; 239 240 vdd_vdenc_mem_s0: DCDC_REG8 { 241 regulator-always-on; 242 regulator-boot-on; 243 regulator-min-microvolt = <675000>; 244 regulator-max-microvolt = <950000>; 245 regulator-ramp-delay = <12500>; 246 regulator-name = "vdd_vdenc_mem_s0"; 247 regulator-state-mem { 248 regulator-off-in-suspend; 249 }; 250 }; 251 252 vdd2_ddr_s3: DCDC_REG9 { 253 regulator-always-on; 254 regulator-boot-on; 255 regulator-name = "vdd2_ddr_s3"; 256 regulator-state-mem { 257 regulator-on-in-suspend; 258 }; 259 }; 260 261 vcc_1v1_nldo_s3: DCDC_REG10 { 262 regulator-always-on; 263 regulator-boot-on; 264 regulator-min-microvolt = <1100000>; 265 regulator-max-microvolt = <1100000>; 266 regulator-ramp-delay = <12500>; 267 regulator-name = "vcc_1v1_nldo_s3"; 268 regulator-state-mem { 269 regulator-on-in-suspend; 270 regulator-suspend-microvolt = <1100000>; 271 }; 272 }; 273 274 avcc_1v8_s0: PLDO_REG1 { 275 regulator-always-on; 276 regulator-boot-on; 277 regulator-min-microvolt = <1800000>; 278 regulator-max-microvolt = <1800000>; 279 regulator-ramp-delay = <12500>; 280 regulator-name = "avcc_1v8_s0"; 281 regulator-state-mem { 282 regulator-off-in-suspend; 283 }; 284 }; 285 286 vdd1_1v8_ddr_s3: PLDO_REG2 { 287 regulator-always-on; 288 regulator-boot-on; 289 regulator-min-microvolt = <1800000>; 290 regulator-max-microvolt = <1800000>; 291 regulator-ramp-delay = <12500>; 292 regulator-name = "vdd1_1v8_ddr_s3"; 293 regulator-state-mem { 294 regulator-on-in-suspend; 295 regulator-suspend-microvolt = <1800000>; 296 }; 297 }; 298 299 vcc_1v8_s3: PLDO_REG3 { 300 regulator-always-on; 301 regulator-boot-on; 302 regulator-min-microvolt = <1800000>; 303 regulator-max-microvolt = <1800000>; 304 regulator-ramp-delay = <12500>; 305 regulator-name = "vcc_1v8_s3"; 306 regulator-state-mem { 307 regulator-on-in-suspend; 308 regulator-suspend-microvolt = <1800000>; 309 }; 310 }; 311 312 vcc_3v3_s0: PLDO_REG4 { 313 regulator-always-on; 314 regulator-boot-on; 315 regulator-min-microvolt = <3300000>; 316 regulator-max-microvolt = <3300000>; 317 regulator-ramp-delay = <12500>; 318 regulator-name = "vcc_3v3_s0"; 319 regulator-state-mem { 320 regulator-off-in-suspend; 321 }; 322 }; 323 324 vccio_sd_s0: PLDO_REG5 { 325 regulator-always-on; 326 regulator-boot-on; 327 regulator-min-microvolt = <1800000>; 328 regulator-max-microvolt = <3300000>; 329 regulator-ramp-delay = <12500>; 330 regulator-name = "vccio_sd_s0"; 331 regulator-state-mem { 332 regulator-off-in-suspend; 333 }; 334 }; 335 336 master_pldo6_s3: PLDO_REG6 { 337 regulator-always-on; 338 regulator-boot-on; 339 regulator-min-microvolt = <1800000>; 340 regulator-max-microvolt = <1800000>; 341 regulator-name = "master_pldo6_s3"; 342 regulator-state-mem { 343 regulator-on-in-suspend; 344 regulator-suspend-microvolt = <1800000>; 345 }; 346 }; 347 348 vdd_0v75_s3: NLDO_REG1 { 349 regulator-always-on; 350 regulator-boot-on; 351 regulator-min-microvolt = <750000>; 352 regulator-max-microvolt = <750000>; 353 regulator-ramp-delay = <12500>; 354 regulator-name = "vdd_0v75_s3"; 355 regulator-state-mem { 356 regulator-on-in-suspend; 357 regulator-suspend-microvolt = <750000>; 358 }; 359 }; 360 361 vdd2l_0v9_ddr_s3: NLDO_REG2 { 362 regulator-always-on; 363 regulator-boot-on; 364 regulator-min-microvolt = <900000>; 365 regulator-max-microvolt = <900000>; 366 regulator-name = "vdd2l_0v9_ddr_s3"; 367 regulator-state-mem { 368 regulator-on-in-suspend; 369 regulator-suspend-microvolt = <900000>; 370 }; 371 }; 372 373 master_nldo3: NLDO_REG3 { 374 regulator-name = "master_nldo3"; 375 regulator-state-mem { 376 regulator-off-in-suspend; 377 }; 378 }; 379 380 avdd_0v75_s0: NLDO_REG4 { 381 regulator-always-on; 382 regulator-boot-on; 383 regulator-min-microvolt = <750000>; 384 regulator-max-microvolt = <750000>; 385 regulator-name = "avdd_0v75_s0"; 386 regulator-state-mem { 387 regulator-off-in-suspend; 388 }; 389 }; 390 391 vdd_0v85_s0: NLDO_REG5 { 392 regulator-always-on; 393 regulator-boot-on; 394 regulator-min-microvolt = <850000>; 395 regulator-max-microvolt = <850000>; 396 regulator-name = "vdd_0v85_s0"; 397 regulator-state-mem { 398 regulator-off-in-suspend; 399 }; 400 }; 401 }; 402 }; 403 404 rk806slave: rk806slave@1 { 405 compatible = "rockchip,rk806"; 406 spi-max-frequency = <1000000>; 407 reg = <0x01>; 408 409 interrupt-parent = <&gpio0>; 410 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 411 412 pinctrl-names = "default", "pmic-sleep"; 413 pinctrl-0 = <&rk806_slave_dvs1_null>, <&rk806_slave_dvs2_null>, <&rk806_slave_dvs3_null>; 414 pinctrl-1 = <&rk806_slave_dvs1_slp>, <&rk806_slave_dvs2_null>, <&rk806_slave_dvs3_null>; 415 416 /* 0: restart PMU; 417 * 1: reset all the power off reset registers, 418 * forcing the state to switch to ACTIVE mode; 419 * 2: Reset all the power off reset registers, 420 * forcing the state to switch to ACTIVE mode, 421 * and simultaneously pull down the RESETB PIN for 5mS before releasing 422 */ 423 pmic-reset-func = <1>; 424 425 vcc1-supply = <&vcc5v0_sys>; 426 vcc2-supply = <&vcc5v0_sys>; 427 vcc3-supply = <&vcc5v0_sys>; 428 vcc4-supply = <&vcc5v0_sys>; 429 vcc5-supply = <&vcc5v0_sys>; 430 vcc6-supply = <&vcc5v0_sys>; 431 vcc7-supply = <&vcc5v0_sys>; 432 vcc8-supply = <&vcc5v0_sys>; 433 vcc9-supply = <&vcc5v0_sys>; 434 vcc10-supply = <&vcc5v0_sys>; 435 vcc11-supply = <&vcc_2v0_pldo_s3>; 436 vcc12-supply = <&vcc5v0_sys>; 437 vcc13-supply = <&vcc_1v1_nldo_s3>; 438 vcc14-supply = <&vcc_2v0_pldo_s3>; 439 vcca-supply = <&vcc5v0_sys>; 440 441 pwrkey { 442 status = "disabled"; 443 }; 444 445 pinctrl_slave_rk806: pinctrl_slave_rk806 { 446 gpio-controller; 447 #gpio-cells = <2>; 448 449 rk806_slave_dvs1_null: rk806_slave_dvs1_null { 450 pins = "gpio_pwrctrl2"; 451 function = "pin_fun0"; 452 }; 453 454 rk806_slave_dvs1_slp: rk806_slave_dvs1_slp { 455 pins = "gpio_pwrctrl1"; 456 function = "pin_fun1"; 457 }; 458 459 rk806_slave_dvs1_pwrdn: rk806_slave_dvs1_pwrdn { 460 pins = "gpio_pwrctrl1"; 461 function = "pin_fun2"; 462 }; 463 464 rk806_slave_dvs1_rst: rk806_slave_dvs1_rst { 465 pins = "gpio_pwrctrl1"; 466 function = "pin_fun3"; 467 }; 468 469 rk806_slave_dvs2_null: rk806_slave_dvs2_null { 470 pins = "gpio_pwrctrl2"; 471 function = "pin_fun0"; 472 }; 473 474 rk806_slave_dvs2_slp: rk806_slave_dvs2_slp { 475 pins = "gpio_pwrctrl2"; 476 function = "pin_fun1"; 477 }; 478 479 rk806_slave_dvs2_pwrdn: rk806_slave_dvs2_pwrdn { 480 pins = "gpio_pwrctrl2"; 481 function = "pin_fun2"; 482 }; 483 484 rk806_slave_dvs2_rst: rk806_slave_dvs2_rst { 485 pins = "gpio_pwrctrl2"; 486 function = "pin_fun3"; 487 }; 488 489 rk806_slave_dvs2_dvs: rk806_slave_dvs2_dvs { 490 pins = "gpio_pwrctrl2"; 491 function = "pin_fun4"; 492 }; 493 494 rk806_slave_dvs2_gpio: rk806_slave_dvs2_gpio { 495 pins = "gpio_pwrctrl2"; 496 function = "pin_fun5"; 497 }; 498 499 rk806_slave_dvs3_null: rk806_slave_dvs3_null { 500 pins = "gpio_pwrctrl3"; 501 function = "pin_fun0"; 502 }; 503 504 rk806_slave_dvs3_slp: rk806_slave_dvs3_slp { 505 pins = "gpio_pwrctrl3"; 506 function = "pin_fun1"; 507 }; 508 509 rk806_slave_dvs3_pwrdn: rk806_slave_dvs3_pwrdn { 510 pins = "gpio_pwrctrl3"; 511 function = "pin_fun2"; 512 }; 513 514 rk806_slave_dvs3_rst: rk806_slave_dvs3_rst { 515 pins = "gpio_pwrctrl3"; 516 function = "pin_fun3"; 517 }; 518 519 rk806_slave_dvs3_dvs: rk806_slave_dvs3_dvs { 520 pins = "gpio_pwrctrl3"; 521 function = "pin_fun4"; 522 }; 523 524 rk806_slave_dvs3_gpio: rk806_slave_dvs3_gpio { 525 pins = "gpio_pwrctrl3"; 526 function = "pin_fun5"; 527 }; 528 }; 529 530 regulators { 531 vdd_cpu_big1_s0: DCDC_REG1 { 532 regulator-always-on; 533 regulator-boot-on; 534 regulator-min-microvolt = <550000>; 535 regulator-max-microvolt = <1050000>; 536 regulator-ramp-delay = <12500>; 537 regulator-name = "vdd_cpu_big1_s0"; 538 regulator-state-mem { 539 regulator-off-in-suspend; 540 }; 541 }; 542 543 vdd_cpu_big0_s0: DCDC_REG2 { 544 regulator-always-on; 545 regulator-boot-on; 546 regulator-min-microvolt = <550000>; 547 regulator-max-microvolt = <1050000>; 548 regulator-ramp-delay = <12500>; 549 regulator-name = "vdd_cpu_big0_s0"; 550 regulator-state-mem { 551 regulator-off-in-suspend; 552 }; 553 }; 554 555 vdd_cpu_lit_s0: DCDC_REG3 { 556 regulator-always-on; 557 regulator-boot-on; 558 regulator-min-microvolt = <550000>; 559 regulator-max-microvolt = <950000>; 560 regulator-ramp-delay = <12500>; 561 regulator-name = "vdd_cpu_lit_s0"; 562 regulator-state-mem { 563 regulator-off-in-suspend; 564 }; 565 }; 566 567 vcc_3v3_s3: DCDC_REG4 { 568 regulator-always-on; 569 regulator-boot-on; 570 regulator-min-microvolt = <3300000>; 571 regulator-max-microvolt = <3300000>; 572 regulator-ramp-delay = <12500>; 573 regulator-name = "vcc_3v3_s3"; 574 regulator-state-mem { 575 regulator-on-in-suspend; 576 regulator-suspend-microvolt = <3300000>; 577 }; 578 }; 579 580 vdd_cpu_big1_mem_s0: DCDC_REG5 { 581 regulator-always-on; 582 regulator-boot-on; 583 regulator-min-microvolt = <675000>; 584 regulator-max-microvolt = <1050000>; 585 regulator-ramp-delay = <12500>; 586 regulator-name = "vdd_cpu_big1_mem_s0"; 587 regulator-state-mem { 588 regulator-off-in-suspend; 589 }; 590 }; 591 592 593 vdd_cpu_big0_mem_s0: DCDC_REG6 { 594 regulator-always-on; 595 regulator-boot-on; 596 regulator-min-microvolt = <675000>; 597 regulator-max-microvolt = <1050000>; 598 regulator-ramp-delay = <12500>; 599 regulator-name = "vdd_cpu_big0_mem_s0"; 600 regulator-state-mem { 601 regulator-off-in-suspend; 602 }; 603 }; 604 605 vcc_1v8_s0: DCDC_REG7 { 606 regulator-always-on; 607 regulator-boot-on; 608 regulator-min-microvolt = <1800000>; 609 regulator-max-microvolt = <1800000>; 610 regulator-ramp-delay = <12500>; 611 regulator-name = "vcc_1v8_s0"; 612 regulator-state-mem { 613 regulator-off-in-suspend; 614 }; 615 }; 616 617 vdd_cpu_lit_mem_s0: DCDC_REG8 { 618 regulator-always-on; 619 regulator-boot-on; 620 regulator-min-microvolt = <675000>; 621 regulator-max-microvolt = <950000>; 622 regulator-ramp-delay = <12500>; 623 regulator-name = "vdd_cpu_lit_mem_s0"; 624 regulator-state-mem { 625 regulator-off-in-suspend; 626 }; 627 }; 628 629 vddq_ddr_s0: DCDC_REG9 { 630 regulator-always-on; 631 regulator-boot-on; 632 regulator-name = "vddq_ddr_s0"; 633 regulator-state-mem { 634 regulator-off-in-suspend; 635 }; 636 }; 637 638 vdd_ddr_s0: DCDC_REG10 { 639 regulator-always-on; 640 regulator-boot-on; 641 regulator-min-microvolt = <675000>; 642 regulator-max-microvolt = <900000>; 643 regulator-ramp-delay = <12500>; 644 regulator-name = "vdd_ddr_s0"; 645 regulator-state-mem { 646 regulator-off-in-suspend; 647 }; 648 }; 649 650 vcc_1v8_cam_s0: PLDO_REG1 { 651 regulator-always-on; 652 regulator-boot-on; 653 regulator-min-microvolt = <1800000>; 654 regulator-max-microvolt = <1800000>; 655 regulator-ramp-delay = <12500>; 656 regulator-name = "vcc_1v8_cam_s0"; 657 regulator-state-mem { 658 regulator-off-in-suspend; 659 }; 660 }; 661 662 avdd1v8_ddr_pll_s0: PLDO_REG2 { 663 regulator-always-on; 664 regulator-boot-on; 665 regulator-min-microvolt = <1800000>; 666 regulator-max-microvolt = <1800000>; 667 regulator-ramp-delay = <12500>; 668 regulator-name = "avdd1v8_ddr_pll_s0"; 669 regulator-state-mem { 670 regulator-off-in-suspend; 671 }; 672 }; 673 674 vdd_1v8_pll_s0: PLDO_REG3 { 675 regulator-always-on; 676 regulator-boot-on; 677 regulator-min-microvolt = <1800000>; 678 regulator-max-microvolt = <1800000>; 679 regulator-ramp-delay = <12500>; 680 regulator-name = "vdd_1v8_pll_s0"; 681 regulator-state-mem { 682 regulator-off-in-suspend; 683 }; 684 }; 685 686 vcc_3v3_sd_s0: PLDO_REG4 { 687 regulator-always-on; 688 regulator-boot-on; 689 regulator-min-microvolt = <3300000>; 690 regulator-max-microvolt = <3300000>; 691 regulator-ramp-delay = <12500>; 692 regulator-name = "vcc_3v3_sd_s0"; 693 regulator-state-mem { 694 regulator-off-in-suspend; 695 }; 696 }; 697 698 vcc_2v8_cam_s0: PLDO_REG5 { 699 regulator-always-on; 700 regulator-boot-on; 701 regulator-min-microvolt = <2800000>; 702 regulator-max-microvolt = <2800000>; 703 regulator-ramp-delay = <12500>; 704 regulator-name = "vcc_2v8_cam_s0"; 705 regulator-state-mem { 706 regulator-off-in-suspend; 707 }; 708 }; 709 710 pldo6_s3: PLDO_REG6 { 711 regulator-always-on; 712 regulator-boot-on; 713 regulator-min-microvolt = <1800000>; 714 regulator-max-microvolt = <1800000>; 715 regulator-name = "pldo6_s3"; 716 regulator-state-mem { 717 regulator-on-in-suspend; 718 regulator-suspend-microvolt = <1800000>; 719 }; 720 }; 721 722 vdd_0v75_pll_s0: NLDO_REG1 { 723 regulator-always-on; 724 regulator-boot-on; 725 regulator-min-microvolt = <750000>; 726 regulator-max-microvolt = <750000>; 727 regulator-ramp-delay = <12500>; 728 regulator-name = "vdd_0v75_pll_s0"; 729 regulator-state-mem { 730 regulator-off-in-suspend; 731 }; 732 }; 733 734 vdd_ddr_pll_s0: NLDO_REG2 { 735 regulator-always-on; 736 regulator-boot-on; 737 regulator-min-microvolt = <850000>; 738 regulator-max-microvolt = <850000>; 739 regulator-name = "vdd_ddr_pll_s0"; 740 regulator-state-mem { 741 regulator-off-in-suspend; 742 }; 743 }; 744 745 slave_nldo3: NLDO_REG3 { 746 regulator-name = "slave_nldo3"; 747 regulator-state-mem { 748 regulator-off-in-suspend; 749 }; 750 }; 751 752 avdd_1v2_cam_s0: NLDO_REG4 { 753 regulator-always-on; 754 regulator-boot-on; 755 regulator-min-microvolt = <1200000>; 756 regulator-max-microvolt = <1200000>; 757 regulator-ramp-delay = <12500>; 758 regulator-name = "avdd_1v2_cam_s0"; 759 regulator-state-mem { 760 regulator-off-in-suspend; 761 }; 762 }; 763 764 avdd_1v2_s0: NLDO_REG5 { 765 regulator-always-on; 766 regulator-boot-on; 767 regulator-min-microvolt = <1200000>; 768 regulator-max-microvolt = <1200000>; 769 regulator-ramp-delay = <12500>; 770 regulator-name = "avdd_1v2_s0"; 771 regulator-state-mem { 772 regulator-off-in-suspend; 773 }; 774 }; 775 }; 776 }; 777}; 778