1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/display/media-bus-format.h>
10#include "rk3588s-evb3-lp4x.dtsi"
11#include "rk3588-android.dtsi"
12
13/ {
14	model = "Rockchip RK3588S EVB3 LP4 V10 Board + Rockchip RK3588S EVB V10 Extboard2";
15	compatible = "rockchip,rk3588s-evb3-lp4x-v10-sii9022-bt1120-to-hdmi", "rockchip,rk3588";
16};
17
18&dsi0_in_vp3 {
19	status = "disabled";
20};
21
22&i2c4 {
23	clock-frequency = <400000>;
24	status = "okay";
25
26	sii9022: sii9022@39 {
27		compatible = "sil,sii9022";
28		reg = <0x39>;
29		pinctrl-names = "default";
30		pinctrl-0 = <&sii902x_hdmi_int>;
31		interrupt-parent = <&gpio3>;
32		interrupts = <RK_PC0 IRQ_TYPE_LEVEL_HIGH>;
33		reset-gpio = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
34		enable-gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
35		bus-format = <MEDIA_BUS_FMT_UYVY8_1X16>;
36
37		ports {
38			#address-cells = <1>;
39			#size-cells = <0>;
40
41			port@0 {
42				reg = <0>;
43
44				sii9022_in_rgb: endpoint {
45					remote-endpoint = <&rgb_out_sii9022>;
46				};
47			};
48		};
49	};
50};
51
52&pinctrl {
53	sii902x {
54		sii902x_hdmi_int: sii902x-hdmi-int {
55			rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
56		};
57	};
58};
59
60&rgb {
61	status = "okay";
62	pinctrl-names = "default";
63	pinctrl-0 = <&bt1120_pins>;
64
65	ports {
66		port@1 {
67			reg = <1>;
68			#address-cells = <1>;
69			#size-cells = <0>;
70
71			rgb_out_sii9022: endpoint@0 {
72				reg = <0>;
73				remote-endpoint = <&sii9022_in_rgb>;
74			};
75		};
76	};
77};
78
79&rgb_in_vp3 {
80	status = "okay";
81};
82
83&vop {
84	status = "okay";
85};
86