xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3588-vehicle-evb-v21.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "dt-bindings/usb/pd.h"
8*4882a593Smuzhiyun#include "rk3588m.dtsi"
9*4882a593Smuzhiyun#include "rk3588-vehicle-v20.dtsi"
10*4882a593Smuzhiyun#include "rk3588-rk806-dual.dtsi"
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	pcie20_avdd0v85: pcie20-avdd0v85 {
13*4882a593Smuzhiyun		compatible = "regulator-fixed";
14*4882a593Smuzhiyun		regulator-name = "pcie20_avdd0v85";
15*4882a593Smuzhiyun		regulator-boot-on;
16*4882a593Smuzhiyun		regulator-always-on;
17*4882a593Smuzhiyun		regulator-min-microvolt = <850000>;
18*4882a593Smuzhiyun		regulator-max-microvolt = <850000>;
19*4882a593Smuzhiyun		vin-supply = <&vdd_0v85_s0>;
20*4882a593Smuzhiyun	};
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun	pcie20_avdd1v8: pcie20-avdd1v8 {
23*4882a593Smuzhiyun		compatible = "regulator-fixed";
24*4882a593Smuzhiyun		regulator-name = "pcie20_avdd1v8";
25*4882a593Smuzhiyun		regulator-boot-on;
26*4882a593Smuzhiyun		regulator-always-on;
27*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
28*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
29*4882a593Smuzhiyun		vin-supply = <&avcc_1v8_s0>;
30*4882a593Smuzhiyun	};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun	pcie30_avdd0v75: pcie30-avdd0v75 {
33*4882a593Smuzhiyun		compatible = "regulator-fixed";
34*4882a593Smuzhiyun		regulator-name = "pcie30_avdd0v75";
35*4882a593Smuzhiyun		regulator-boot-on;
36*4882a593Smuzhiyun		regulator-always-on;
37*4882a593Smuzhiyun		regulator-min-microvolt = <750000>;
38*4882a593Smuzhiyun		regulator-max-microvolt = <750000>;
39*4882a593Smuzhiyun		vin-supply = <&avdd_0v75_s0>;
40*4882a593Smuzhiyun	};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	pcie30_avdd1v8: pcie30-avdd1v8 {
43*4882a593Smuzhiyun		compatible = "regulator-fixed";
44*4882a593Smuzhiyun		regulator-name = "pcie30_avdd1v8";
45*4882a593Smuzhiyun		regulator-boot-on;
46*4882a593Smuzhiyun		regulator-always-on;
47*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
48*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
49*4882a593Smuzhiyun		vin-supply = <&avcc_1v8_s0>;
50*4882a593Smuzhiyun	};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	vcc3v3_pcie_wifi: vcc3v3-pcie-wifi {
53*4882a593Smuzhiyun		compatible = "regulator-fixed";
54*4882a593Smuzhiyun		regulator-name = "vcc3v3_pcie_wifi";
55*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
56*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
57*4882a593Smuzhiyun		enable-active-high;
58*4882a593Smuzhiyun		//gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
59*4882a593Smuzhiyun		startup-delay-us = <5000>;
60*4882a593Smuzhiyun		vin-supply = <&vcc_3v3_s0>;
61*4882a593Smuzhiyun	};
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun	sdio_pwrseq: sdio-pwrseq {
64*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
65*4882a593Smuzhiyun		clocks = <&hym8563>;
66*4882a593Smuzhiyun		clock-names = "ext_clock";
67*4882a593Smuzhiyun		pinctrl-names = "default";
68*4882a593Smuzhiyun		pinctrl-0 = <&wifi_enable_h>;
69*4882a593Smuzhiyun		/*
70*4882a593Smuzhiyun		 * On the module itself this is one of these (depending
71*4882a593Smuzhiyun		 * on the actual card populated):
72*4882a593Smuzhiyun		 * - SDIO_RESET_L_WL_REG_ON
73*4882a593Smuzhiyun		 * - PDN (power down when low)
74*4882a593Smuzhiyun		 */
75*4882a593Smuzhiyun		post-power-on-delay-ms = <10>;
76*4882a593Smuzhiyun		reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
77*4882a593Smuzhiyun		status = "disabled";
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	fan: pwm-fan {
81*4882a593Smuzhiyun		compatible = "pwm-fan";
82*4882a593Smuzhiyun		#cooling-cells = <2>;
83*4882a593Smuzhiyun		pwms = <&pwm8 0 50000 0>;
84*4882a593Smuzhiyun		cooling-levels = <0 50 100 150 200 255>;
85*4882a593Smuzhiyun		rockchip,temp-trips = <
86*4882a593Smuzhiyun			50000	1
87*4882a593Smuzhiyun			55000	2
88*4882a593Smuzhiyun			60000	3
89*4882a593Smuzhiyun			65000	4
90*4882a593Smuzhiyun			70000	5
91*4882a593Smuzhiyun		>;
92*4882a593Smuzhiyun	};
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun	vcc5v0_host: vcc5v0-host {
95*4882a593Smuzhiyun		compatible = "regulator-fixed";
96*4882a593Smuzhiyun		regulator-name = "vcc5v0_host";
97*4882a593Smuzhiyun		regulator-boot-on;
98*4882a593Smuzhiyun		regulator-always-on;
99*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
100*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
101*4882a593Smuzhiyun		enable-active-high;
102*4882a593Smuzhiyun		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
103*4882a593Smuzhiyun		vin-supply = <&vcc5v0_usb>;
104*4882a593Smuzhiyun		pinctrl-names = "default";
105*4882a593Smuzhiyun		pinctrl-0 = <&vcc5v0_host_en>;
106*4882a593Smuzhiyun	};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun	wireless_bluetooth: wireless-bluetooth {
109*4882a593Smuzhiyun		compatible = "bluetooth-platdata";
110*4882a593Smuzhiyun		clocks = <&hym8563>;
111*4882a593Smuzhiyun		clock-names = "ext_clock";
112*4882a593Smuzhiyun		uart_rts_gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
113*4882a593Smuzhiyun		pinctrl-names = "default", "rts_gpio";
114*4882a593Smuzhiyun		pinctrl-0 = <&uart9m1_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
115*4882a593Smuzhiyun		pinctrl-1 = <&uart9_gpios>;
116*4882a593Smuzhiyun		BT,reset_gpio    = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
117*4882a593Smuzhiyun		BT,wake_gpio     = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
118*4882a593Smuzhiyun		BT,wake_host_irq = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
119*4882a593Smuzhiyun		status = "okay";
120*4882a593Smuzhiyun	};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun	wireless_wlan: wireless-wlan {
123*4882a593Smuzhiyun		compatible = "wlan-platdata";
124*4882a593Smuzhiyun		wifi_chip_type = "ap6398s";
125*4882a593Smuzhiyun		pinctrl-names = "default";
126*4882a593Smuzhiyun		pinctrl-0 = <&wifi_poweren_gpio>, <&wifi_host_wake_irq>;
127*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
128*4882a593Smuzhiyun		WIFI,poweren_gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
129*4882a593Smuzhiyun		status = "okay";
130*4882a593Smuzhiyun	};
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun	dummy_codec: dummy-codec {
133*4882a593Smuzhiyun		status = "okay";
134*4882a593Smuzhiyun		compatible = "rockchip,dummy-codec";
135*4882a593Smuzhiyun		#sound-dai-cells = <0>;
136*4882a593Smuzhiyun		pinctrl-names = "default";
137*4882a593Smuzhiyun		pinctrl-0 = <&rk3308_reset>;
138*4882a593Smuzhiyun	};
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun	car_rk3308_sound: car-rk3308-sound {
141*4882a593Smuzhiyun		status = "okay";
142*4882a593Smuzhiyun		compatible = "simple-audio-card";
143*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,car-rk3308-sound";
144*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
145*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
146*4882a593Smuzhiyun		simple-audio-card,bitclock-master = <&codec_master>;
147*4882a593Smuzhiyun		simple-audio-card,frame-master = <&codec_master>;
148*4882a593Smuzhiyun		simple-audio-card,cpu {
149*4882a593Smuzhiyun			sound-dai = <&i2s0_8ch>;
150*4882a593Smuzhiyun		};
151*4882a593Smuzhiyun		codec_master: simple-audio-card,codec {
152*4882a593Smuzhiyun			sound-dai = <&dummy_codec>;
153*4882a593Smuzhiyun		};
154*4882a593Smuzhiyun	};
155*4882a593Smuzhiyun};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun&combphy0_ps {
158*4882a593Smuzhiyun	status = "okay";
159*4882a593Smuzhiyun};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun&combphy1_ps {
162*4882a593Smuzhiyun	status = "okay";
163*4882a593Smuzhiyun};
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun&combphy2_psu {
166*4882a593Smuzhiyun	status = "okay";
167*4882a593Smuzhiyun};
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun&gmac0 {
170*4882a593Smuzhiyun	/* Use rgmii-rxid mode to disable rx delay inside Soc */
171*4882a593Smuzhiyun	phy-mode = "rgmii-rxid";
172*4882a593Smuzhiyun	clock_in_out = "output";
173*4882a593Smuzhiyun	snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
174*4882a593Smuzhiyun	snps,reset-active-low;
175*4882a593Smuzhiyun	/* Reset time is 20ms, 100ms for rtl8211f */
176*4882a593Smuzhiyun	snps,reset-delays-us = <0 20000 100000>;
177*4882a593Smuzhiyun	pinctrl-names = "default";
178*4882a593Smuzhiyun	pinctrl-0 = <&gmac0_miim
179*4882a593Smuzhiyun		     &gmac0_tx_bus2
180*4882a593Smuzhiyun		     &gmac0_rx_bus2
181*4882a593Smuzhiyun		     &gmac0_rgmii_clk
182*4882a593Smuzhiyun		     &gmac0_rgmii_bus
183*4882a593Smuzhiyun		     &phydisb>;
184*4882a593Smuzhiyun	tx_delay = <0x43>;
185*4882a593Smuzhiyun	//rx_delay = <0x3f>;
186*4882a593Smuzhiyun	phy-handle = <&rgmii_phy>;
187*4882a593Smuzhiyun	status = "okay";
188*4882a593Smuzhiyun};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun&i2c4 {
191*4882a593Smuzhiyun	status = "okay";
192*4882a593Smuzhiyun	pinctrl-0 = <&i2c4m2_xfer>;
193*4882a593Smuzhiyun	hym8563: hym8563@51 {
194*4882a593Smuzhiyun		compatible = "haoyu,hym8563";
195*4882a593Smuzhiyun		reg = <0x51>;
196*4882a593Smuzhiyun		#clock-cells = <0>;
197*4882a593Smuzhiyun		clock-frequency = <32768>;
198*4882a593Smuzhiyun		clock-output-names = "hym8563";
199*4882a593Smuzhiyun		pinctrl-names = "default";
200*4882a593Smuzhiyun		pinctrl-0 = <&hym8563_int>;
201*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
202*4882a593Smuzhiyun		interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
203*4882a593Smuzhiyun		wakeup-source;
204*4882a593Smuzhiyun	};
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun&i2s0_8ch {
209*4882a593Smuzhiyun	status = "okay";
210*4882a593Smuzhiyun	pinctrl-names = "default";
211*4882a593Smuzhiyun	pinctrl-0 = <&i2s0_lrck
212*4882a593Smuzhiyun		     &i2s0_sclk
213*4882a593Smuzhiyun		     &i2s0_sdi0
214*4882a593Smuzhiyun		     &i2s0_sdi1
215*4882a593Smuzhiyun		     &i2s0_sdo0
216*4882a593Smuzhiyun		     &i2s0_sdo1
217*4882a593Smuzhiyun		     &i2s0_sdo2
218*4882a593Smuzhiyun		     &i2s0_sdo3>;
219*4882a593Smuzhiyun};
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun&mdio0 {
222*4882a593Smuzhiyun	rgmii_phy: phy@1 {
223*4882a593Smuzhiyun		compatible = "ethernet-phy-ieee802.3-c22";
224*4882a593Smuzhiyun		reg = <0x1>;
225*4882a593Smuzhiyun	};
226*4882a593Smuzhiyun};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun&pcie2x1l0 {
229*4882a593Smuzhiyun	reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
230*4882a593Smuzhiyun	rockchip,perst-inactive-ms = <500>;
231*4882a593Smuzhiyun	rockchip,skip-scan-in-resume;
232*4882a593Smuzhiyun	vpcie3v3-supply = <&vcc3v3_pcie_wifi>;
233*4882a593Smuzhiyun	status = "okay";
234*4882a593Smuzhiyun};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun&pcie2x1l2 {
237*4882a593Smuzhiyun	reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
238*4882a593Smuzhiyun	status = "disabled";
239*4882a593Smuzhiyun};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun&pinctrl {
242*4882a593Smuzhiyun	gmac0 {
243*4882a593Smuzhiyun		phydisb: phydisb {
244*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_high>;
245*4882a593Smuzhiyun		};
246*4882a593Smuzhiyun	};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun	hym8563 {
249*4882a593Smuzhiyun		hym8563_int: hym8563-int {
250*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
251*4882a593Smuzhiyun		};
252*4882a593Smuzhiyun	};
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun	sdio-pwrseq {
255*4882a593Smuzhiyun		wifi_enable_h: wifi-enable-h {
256*4882a593Smuzhiyun			rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
257*4882a593Smuzhiyun		};
258*4882a593Smuzhiyun	};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun	usb {
261*4882a593Smuzhiyun		vcc5v0_host_en: vcc5v0-host-en {
262*4882a593Smuzhiyun			rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
263*4882a593Smuzhiyun		};
264*4882a593Smuzhiyun	};
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun	wireless-bluetooth {
268*4882a593Smuzhiyun		uart9_gpios: uart9-gpios {
269*4882a593Smuzhiyun			rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
270*4882a593Smuzhiyun		};
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun		bt_reset_gpio: bt-reset-gpio {
273*4882a593Smuzhiyun			rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
274*4882a593Smuzhiyun		};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun		bt_wake_gpio: bt-wake-gpio {
277*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
278*4882a593Smuzhiyun		};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun		bt_irq_gpio: bt-irq-gpio {
281*4882a593Smuzhiyun			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
282*4882a593Smuzhiyun		};
283*4882a593Smuzhiyun	};
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun	wireless-wlan {
286*4882a593Smuzhiyun		wifi_host_wake_irq: wifi-host-wake-irq {
287*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
288*4882a593Smuzhiyun		};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun		wifi_poweren_gpio: wifi-power-gpio {
291*4882a593Smuzhiyun			rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_down>;
292*4882a593Smuzhiyun		};
293*4882a593Smuzhiyun	};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun	rk3308 {
296*4882a593Smuzhiyun		rk3308_reset: rk3308-reset {
297*4882a593Smuzhiyun			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
298*4882a593Smuzhiyun		};
299*4882a593Smuzhiyun	};
300*4882a593Smuzhiyun};
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun&pwm0 {
303*4882a593Smuzhiyun	pinctrl-0 = <&pwm0m2_pins>;
304*4882a593Smuzhiyun	status = "okay";
305*4882a593Smuzhiyun};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun&pwm1 {
308*4882a593Smuzhiyun	pinctrl-0 = <&pwm1m2_pins>;
309*4882a593Smuzhiyun	status = "okay";
310*4882a593Smuzhiyun};
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun&pwm8 {
313*4882a593Smuzhiyun	pinctrl-0 = <&pwm8m1_pins>;
314*4882a593Smuzhiyun	status = "okay";
315*4882a593Smuzhiyun};
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun&sata0 {
318*4882a593Smuzhiyun	status = "okay";
319*4882a593Smuzhiyun};
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun&sdio {
322*4882a593Smuzhiyun	max-frequency = <150000000>;
323*4882a593Smuzhiyun	no-sd;
324*4882a593Smuzhiyun	no-mmc;
325*4882a593Smuzhiyun	bus-width = <4>;
326*4882a593Smuzhiyun	disable-wp;
327*4882a593Smuzhiyun	cap-sd-highspeed;
328*4882a593Smuzhiyun	cap-sdio-irq;
329*4882a593Smuzhiyun	keep-power-in-suspend;
330*4882a593Smuzhiyun	mmc-pwrseq = <&sdio_pwrseq>;
331*4882a593Smuzhiyun	non-removable;
332*4882a593Smuzhiyun	pinctrl-names = "default";
333*4882a593Smuzhiyun	pinctrl-0 = <&sdiom1_pins>;
334*4882a593Smuzhiyun	status = "disabled";
335*4882a593Smuzhiyun};
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun&sdmmc {
338*4882a593Smuzhiyun	status = "disabled";
339*4882a593Smuzhiyun};
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun&uart9 {
342*4882a593Smuzhiyun	status = "okay";
343*4882a593Smuzhiyun	pinctrl-names = "default";
344*4882a593Smuzhiyun	pinctrl-0 = <&uart9m1_xfer &uart9m1_ctsn>;
345*4882a593Smuzhiyun};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun&u2phy1_otg {
348*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
349*4882a593Smuzhiyun};
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun&u2phy2_host {
352*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
353*4882a593Smuzhiyun};
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun&u2phy3_host {
356*4882a593Smuzhiyun	phy-supply = <&vcc5v0_host>;
357*4882a593Smuzhiyun};
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun&usbdp_phy0 {
360*4882a593Smuzhiyun	rockchip,dp-lane-mux = <2 3>;
361*4882a593Smuzhiyun	status = "okay";
362*4882a593Smuzhiyun};
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun&usbdp_phy0_dp {
365*4882a593Smuzhiyun	status = "okay";
366*4882a593Smuzhiyun};
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun&usbdp_phy0_u3 {
369*4882a593Smuzhiyun	status = "okay";
370*4882a593Smuzhiyun};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun&usbdp_phy1 {
373*4882a593Smuzhiyun	rockchip,dp-lane-mux = <3 2 1 0>;
374*4882a593Smuzhiyun	status = "okay";
375*4882a593Smuzhiyun};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun&usbdp_phy1_dp {
378*4882a593Smuzhiyun	status = "okay";
379*4882a593Smuzhiyun};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun&usbdp_phy1_u3 {
382*4882a593Smuzhiyun	maximum-speed = "high-speed";
383*4882a593Smuzhiyun	status = "okay";
384*4882a593Smuzhiyun};
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun&usbdrd_dwc3_0 {
387*4882a593Smuzhiyun	dr_mode = "peripheral";
388*4882a593Smuzhiyun	maximum-speed = "high-speed";
389*4882a593Smuzhiyun	extcon = <&u2phy0>;
390*4882a593Smuzhiyun	status = "okay";
391*4882a593Smuzhiyun};
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun&usbdrd_dwc3_1 {
394*4882a593Smuzhiyun	dr_mode = "host";
395*4882a593Smuzhiyun	maximum-speed = "high-speed";
396*4882a593Smuzhiyun	snps,dis_u2_susphy_quirk;
397*4882a593Smuzhiyun	status = "okay";
398*4882a593Smuzhiyun};
399