xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3588-vehicle-evb-v21.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7#include "dt-bindings/usb/pd.h"
8#include "rk3588m.dtsi"
9#include "rk3588-vehicle-v20.dtsi"
10#include "rk3588-rk806-dual.dtsi"
11/ {
12	pcie20_avdd0v85: pcie20-avdd0v85 {
13		compatible = "regulator-fixed";
14		regulator-name = "pcie20_avdd0v85";
15		regulator-boot-on;
16		regulator-always-on;
17		regulator-min-microvolt = <850000>;
18		regulator-max-microvolt = <850000>;
19		vin-supply = <&vdd_0v85_s0>;
20	};
21
22	pcie20_avdd1v8: pcie20-avdd1v8 {
23		compatible = "regulator-fixed";
24		regulator-name = "pcie20_avdd1v8";
25		regulator-boot-on;
26		regulator-always-on;
27		regulator-min-microvolt = <1800000>;
28		regulator-max-microvolt = <1800000>;
29		vin-supply = <&avcc_1v8_s0>;
30	};
31
32	pcie30_avdd0v75: pcie30-avdd0v75 {
33		compatible = "regulator-fixed";
34		regulator-name = "pcie30_avdd0v75";
35		regulator-boot-on;
36		regulator-always-on;
37		regulator-min-microvolt = <750000>;
38		regulator-max-microvolt = <750000>;
39		vin-supply = <&avdd_0v75_s0>;
40	};
41
42	pcie30_avdd1v8: pcie30-avdd1v8 {
43		compatible = "regulator-fixed";
44		regulator-name = "pcie30_avdd1v8";
45		regulator-boot-on;
46		regulator-always-on;
47		regulator-min-microvolt = <1800000>;
48		regulator-max-microvolt = <1800000>;
49		vin-supply = <&avcc_1v8_s0>;
50	};
51
52	vcc3v3_pcie_wifi: vcc3v3-pcie-wifi {
53		compatible = "regulator-fixed";
54		regulator-name = "vcc3v3_pcie_wifi";
55		regulator-min-microvolt = <3300000>;
56		regulator-max-microvolt = <3300000>;
57		enable-active-high;
58		//gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
59		startup-delay-us = <5000>;
60		vin-supply = <&vcc_3v3_s0>;
61	};
62
63	sdio_pwrseq: sdio-pwrseq {
64		compatible = "mmc-pwrseq-simple";
65		clocks = <&hym8563>;
66		clock-names = "ext_clock";
67		pinctrl-names = "default";
68		pinctrl-0 = <&wifi_enable_h>;
69		/*
70		 * On the module itself this is one of these (depending
71		 * on the actual card populated):
72		 * - SDIO_RESET_L_WL_REG_ON
73		 * - PDN (power down when low)
74		 */
75		post-power-on-delay-ms = <10>;
76		reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>;
77		status = "disabled";
78	};
79
80	fan: pwm-fan {
81		compatible = "pwm-fan";
82		#cooling-cells = <2>;
83		pwms = <&pwm8 0 50000 0>;
84		cooling-levels = <0 50 100 150 200 255>;
85		rockchip,temp-trips = <
86			50000	1
87			55000	2
88			60000	3
89			65000	4
90			70000	5
91		>;
92	};
93
94	vcc5v0_host: vcc5v0-host {
95		compatible = "regulator-fixed";
96		regulator-name = "vcc5v0_host";
97		regulator-boot-on;
98		regulator-always-on;
99		regulator-min-microvolt = <5000000>;
100		regulator-max-microvolt = <5000000>;
101		enable-active-high;
102		gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
103		vin-supply = <&vcc5v0_usb>;
104		pinctrl-names = "default";
105		pinctrl-0 = <&vcc5v0_host_en>;
106	};
107
108	wireless_bluetooth: wireless-bluetooth {
109		compatible = "bluetooth-platdata";
110		clocks = <&hym8563>;
111		clock-names = "ext_clock";
112		uart_rts_gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
113		pinctrl-names = "default", "rts_gpio";
114		pinctrl-0 = <&uart9m1_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
115		pinctrl-1 = <&uart9_gpios>;
116		BT,reset_gpio    = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
117		BT,wake_gpio     = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
118		BT,wake_host_irq = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
119		status = "okay";
120	};
121
122	wireless_wlan: wireless-wlan {
123		compatible = "wlan-platdata";
124		wifi_chip_type = "ap6398s";
125		pinctrl-names = "default";
126		pinctrl-0 = <&wifi_poweren_gpio>, <&wifi_host_wake_irq>;
127		WIFI,host_wake_irq = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
128		WIFI,poweren_gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
129		status = "okay";
130	};
131
132	dummy_codec: dummy-codec {
133		status = "okay";
134		compatible = "rockchip,dummy-codec";
135		#sound-dai-cells = <0>;
136		pinctrl-names = "default";
137		pinctrl-0 = <&rk3308_reset>;
138	};
139
140	car_rk3308_sound: car-rk3308-sound {
141		status = "okay";
142		compatible = "simple-audio-card";
143		simple-audio-card,name = "rockchip,car-rk3308-sound";
144		simple-audio-card,format = "i2s";
145		simple-audio-card,mclk-fs = <256>;
146		simple-audio-card,bitclock-master = <&codec_master>;
147		simple-audio-card,frame-master = <&codec_master>;
148		simple-audio-card,cpu {
149			sound-dai = <&i2s0_8ch>;
150		};
151		codec_master: simple-audio-card,codec {
152			sound-dai = <&dummy_codec>;
153		};
154	};
155};
156
157&combphy0_ps {
158	status = "okay";
159};
160
161&combphy1_ps {
162	status = "okay";
163};
164
165&combphy2_psu {
166	status = "okay";
167};
168
169&gmac0 {
170	/* Use rgmii-rxid mode to disable rx delay inside Soc */
171	phy-mode = "rgmii-rxid";
172	clock_in_out = "output";
173	snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
174	snps,reset-active-low;
175	/* Reset time is 20ms, 100ms for rtl8211f */
176	snps,reset-delays-us = <0 20000 100000>;
177	pinctrl-names = "default";
178	pinctrl-0 = <&gmac0_miim
179		     &gmac0_tx_bus2
180		     &gmac0_rx_bus2
181		     &gmac0_rgmii_clk
182		     &gmac0_rgmii_bus
183		     &phydisb>;
184	tx_delay = <0x43>;
185	//rx_delay = <0x3f>;
186	phy-handle = <&rgmii_phy>;
187	status = "okay";
188};
189
190&i2c4 {
191	status = "okay";
192	pinctrl-0 = <&i2c4m2_xfer>;
193	hym8563: hym8563@51 {
194		compatible = "haoyu,hym8563";
195		reg = <0x51>;
196		#clock-cells = <0>;
197		clock-frequency = <32768>;
198		clock-output-names = "hym8563";
199		pinctrl-names = "default";
200		pinctrl-0 = <&hym8563_int>;
201		interrupt-parent = <&gpio0>;
202		interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
203		wakeup-source;
204	};
205
206};
207
208&i2s0_8ch {
209	status = "okay";
210	pinctrl-names = "default";
211	pinctrl-0 = <&i2s0_lrck
212		     &i2s0_sclk
213		     &i2s0_sdi0
214		     &i2s0_sdi1
215		     &i2s0_sdo0
216		     &i2s0_sdo1
217		     &i2s0_sdo2
218		     &i2s0_sdo3>;
219};
220
221&mdio0 {
222	rgmii_phy: phy@1 {
223		compatible = "ethernet-phy-ieee802.3-c22";
224		reg = <0x1>;
225	};
226};
227
228&pcie2x1l0 {
229	reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
230	rockchip,perst-inactive-ms = <500>;
231	rockchip,skip-scan-in-resume;
232	vpcie3v3-supply = <&vcc3v3_pcie_wifi>;
233	status = "okay";
234};
235
236&pcie2x1l2 {
237	reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
238	status = "disabled";
239};
240
241&pinctrl {
242	gmac0 {
243		phydisb: phydisb {
244			rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_high>;
245		};
246	};
247
248	hym8563 {
249		hym8563_int: hym8563-int {
250			rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
251		};
252	};
253
254	sdio-pwrseq {
255		wifi_enable_h: wifi-enable-h {
256			rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>;
257		};
258	};
259
260	usb {
261		vcc5v0_host_en: vcc5v0-host-en {
262			rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
263		};
264	};
265
266
267	wireless-bluetooth {
268		uart9_gpios: uart9-gpios {
269			rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
270		};
271
272		bt_reset_gpio: bt-reset-gpio {
273			rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
274		};
275
276		bt_wake_gpio: bt-wake-gpio {
277			rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
278		};
279
280		bt_irq_gpio: bt-irq-gpio {
281			rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
282		};
283	};
284
285	wireless-wlan {
286		wifi_host_wake_irq: wifi-host-wake-irq {
287			rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>;
288		};
289
290		wifi_poweren_gpio: wifi-power-gpio {
291			rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_down>;
292		};
293	};
294
295	rk3308 {
296		rk3308_reset: rk3308-reset {
297			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
298		};
299	};
300};
301
302&pwm0 {
303	pinctrl-0 = <&pwm0m2_pins>;
304	status = "okay";
305};
306
307&pwm1 {
308	pinctrl-0 = <&pwm1m2_pins>;
309	status = "okay";
310};
311
312&pwm8 {
313	pinctrl-0 = <&pwm8m1_pins>;
314	status = "okay";
315};
316
317&sata0 {
318	status = "okay";
319};
320
321&sdio {
322	max-frequency = <150000000>;
323	no-sd;
324	no-mmc;
325	bus-width = <4>;
326	disable-wp;
327	cap-sd-highspeed;
328	cap-sdio-irq;
329	keep-power-in-suspend;
330	mmc-pwrseq = <&sdio_pwrseq>;
331	non-removable;
332	pinctrl-names = "default";
333	pinctrl-0 = <&sdiom1_pins>;
334	status = "disabled";
335};
336
337&sdmmc {
338	status = "disabled";
339};
340
341&uart9 {
342	status = "okay";
343	pinctrl-names = "default";
344	pinctrl-0 = <&uart9m1_xfer &uart9m1_ctsn>;
345};
346
347&u2phy1_otg {
348	phy-supply = <&vcc5v0_host>;
349};
350
351&u2phy2_host {
352	phy-supply = <&vcc5v0_host>;
353};
354
355&u2phy3_host {
356	phy-supply = <&vcc5v0_host>;
357};
358
359&usbdp_phy0 {
360	rockchip,dp-lane-mux = <2 3>;
361	status = "okay";
362};
363
364&usbdp_phy0_dp {
365	status = "okay";
366};
367
368&usbdp_phy0_u3 {
369	status = "okay";
370};
371
372&usbdp_phy1 {
373	rockchip,dp-lane-mux = <3 2 1 0>;
374	status = "okay";
375};
376
377&usbdp_phy1_dp {
378	status = "okay";
379};
380
381&usbdp_phy1_u3 {
382	maximum-speed = "high-speed";
383	status = "okay";
384};
385
386&usbdrd_dwc3_0 {
387	dr_mode = "peripheral";
388	maximum-speed = "high-speed";
389	extcon = <&u2phy0>;
390	status = "okay";
391};
392
393&usbdrd_dwc3_1 {
394	dr_mode = "host";
395	maximum-speed = "high-speed";
396	snps,dis_u2_susphy_quirk;
397	status = "okay";
398};
399