1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun/dts-v1/; 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun#include "rk3568.dtsi" 10*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "Rockchip RK3568 IOTEST DDR3 V10 Board"; 14*4882a593Smuzhiyun compatible = "rockchip,rk3568-iotest-ddr3-v10", "rockchip,rk3568"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun chosen: chosen { 17*4882a593Smuzhiyun bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait"; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun fiq-debugger { 21*4882a593Smuzhiyun compatible = "rockchip,fiq-debugger"; 22*4882a593Smuzhiyun rockchip,serial-id = <2>; 23*4882a593Smuzhiyun rockchip,wake-irq = <0>; 24*4882a593Smuzhiyun /* If enable uart uses irq instead of fiq */ 25*4882a593Smuzhiyun rockchip,irq-mode-enable = <1>; 26*4882a593Smuzhiyun rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 27*4882a593Smuzhiyun interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>; 28*4882a593Smuzhiyun pinctrl-names = "default"; 29*4882a593Smuzhiyun pinctrl-0 = <&uart2m0_xfer>; 30*4882a593Smuzhiyun status = "okay"; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun test-power { 34*4882a593Smuzhiyun status = "okay"; 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun}; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun&rkvdec { 39*4882a593Smuzhiyun /delete-property/ vdec-supply; 40*4882a593Smuzhiyun}; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun&sdhci { 43*4882a593Smuzhiyun bus-width = <8>; 44*4882a593Smuzhiyun no-sdio; 45*4882a593Smuzhiyun no-sd; 46*4882a593Smuzhiyun non-removable; 47*4882a593Smuzhiyun max-frequency = <200000000>; 48*4882a593Smuzhiyun status = "okay"; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&u2phy0_otg { 52*4882a593Smuzhiyun status = "okay"; 53*4882a593Smuzhiyun}; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun&usb2phy0 { 56*4882a593Smuzhiyun status = "okay"; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun&usbdrd_dwc3 { 60*4882a593Smuzhiyun dr_mode = "otg"; 61*4882a593Smuzhiyun phys = <&u2phy0_otg>; 62*4882a593Smuzhiyun phy-names = "usb2-phy"; 63*4882a593Smuzhiyun extcon = <&usb2phy0>; 64*4882a593Smuzhiyun maximum-speed = "high-speed"; 65*4882a593Smuzhiyun snps,dis_u2_susphy_quirk; 66*4882a593Smuzhiyun status = "okay"; 67*4882a593Smuzhiyun}; 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun&usbdrd30 { 70*4882a593Smuzhiyun status = "okay"; 71*4882a593Smuzhiyun}; 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun/delete-node/ &display_subsystem; 74