1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include "rk3568.dtsi" 10#include <dt-bindings/gpio/gpio.h> 11 12/ { 13 model = "Rockchip RK3568 IOTEST DDR3 V10 Board"; 14 compatible = "rockchip,rk3568-iotest-ddr3-v10", "rockchip,rk3568"; 15 16 chosen: chosen { 17 bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait"; 18 }; 19 20 fiq-debugger { 21 compatible = "rockchip,fiq-debugger"; 22 rockchip,serial-id = <2>; 23 rockchip,wake-irq = <0>; 24 /* If enable uart uses irq instead of fiq */ 25 rockchip,irq-mode-enable = <1>; 26 rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ 27 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&uart2m0_xfer>; 30 status = "okay"; 31 }; 32 33 test-power { 34 status = "okay"; 35 }; 36}; 37 38&rkvdec { 39 /delete-property/ vdec-supply; 40}; 41 42&sdhci { 43 bus-width = <8>; 44 no-sdio; 45 no-sd; 46 non-removable; 47 max-frequency = <200000000>; 48 status = "okay"; 49}; 50 51&u2phy0_otg { 52 status = "okay"; 53}; 54 55&usb2phy0 { 56 status = "okay"; 57}; 58 59&usbdrd_dwc3 { 60 dr_mode = "otg"; 61 phys = <&u2phy0_otg>; 62 phy-names = "usb2-phy"; 63 extcon = <&usb2phy0>; 64 maximum-speed = "high-speed"; 65 snps,dis_u2_susphy_quirk; 66 status = "okay"; 67}; 68 69&usbdrd30 { 70 status = "okay"; 71}; 72 73/delete-node/ &display_subsystem; 74