1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/input/rk-input.h> 12#include <dt-bindings/sensor-dev.h> 13#include <dt-bindings/display/drm_mipi_dsi.h> 14#include "rk3566.dtsi" 15#include "rk3568-android.dtsi" 16 17/ { 18 model = "Rockchip RK3566 RK817 TABLET LP4X Board"; 19 compatible = "rockchip,rk3566-rk817-tablet", "rockchip,rk3566"; 20 21 adc_keys: adc-keys { 22 compatible = "adc-keys"; 23 io-channels = <&saradc 0>; 24 io-channel-names = "buttons"; 25 keyup-threshold-microvolt = <1800000>; 26 poll-interval = <100>; 27 28 vol-up-key { 29 label = "volume up"; 30 linux,code = <KEY_VOLUMEUP>; 31 press-threshold-microvolt = <1750>; 32 }; 33 34 vol-down-key { 35 label = "volume down"; 36 linux,code = <KEY_VOLUMEDOWN>; 37 press-threshold-microvolt = <297500>; 38 }; 39 }; 40 41 backlight: backlight { 42 compatible = "pwm-backlight"; 43 pwms = <&pwm4 0 25000 0>; 44 brightness-levels = < 45 0 20 20 21 21 22 22 23 46 23 24 24 25 25 26 26 27 47 27 28 28 29 29 30 30 31 48 31 32 32 33 33 34 34 35 49 35 36 36 37 37 38 38 39 50 40 41 42 43 44 45 46 47 51 48 49 50 50 51 52 53 54 52 55 55 56 57 58 59 60 61 53 62 63 64 64 65 65 66 67 54 68 69 70 71 71 72 73 74 55 75 76 77 78 79 79 80 81 56 82 83 84 85 86 86 87 88 57 89 90 91 92 93 94 94 95 58 96 97 98 99 100 101 101 102 59 103 104 105 106 107 107 108 109 60 110 111 112 113 114 115 115 116 61 117 118 119 120 121 122 123 123 62 124 125 126 127 128 129 130 130 63 131 132 133 134 135 136 136 137 64 138 139 140 141 142 143 143 144 65 145 146 147 147 148 149 150 151 66 152 153 154 155 156 156 157 158 67 159 157 158 159 160 161 162 162 68 163 164 165 166 167 168 169 169 69 170 171 172 173 174 175 175 176 70 177 178 179 180 181 182 182 183 71 184 185 186 187 188 189 190 190 72 191 192 193 194 195 196 197 197 73 198 199 200 201 202 203 204 204 74 205 206 207 208 209 209 210 211 75 212 213 213 214 214 215 215 216 76 216 217 217 218 218 219 219 220 77 >; 78 default-brightness-level = <200>; 79 }; 80 81 charge-animation { 82 compatible = "rockchip,uboot-charge"; 83 rockchip,uboot-charge-on = <1>; 84 rockchip,android-charge-on = <0>; 85 rockchip,uboot-low-power-voltage = <3350>; 86 rockchip,screen-on-voltage = <3400>; 87 status = "okay"; 88 }; 89 90 flash_rgb13h: flash-rgb13h { 91 status = "okay"; 92 compatible = "led,rgb13h"; 93 label = "gpio-flash"; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&flash_led_gpios>; 96 led-max-microamp = <20000>; 97 flash-max-microamp = <20000>; 98 flash-max-timeout-us = <1000000>; 99 enable-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; 100 rockchip,camera-module-index = <0>; 101 rockchip,camera-module-facing = "back"; 102 }; 103 104 hdmi_sound: hdmi-sound { 105 compatible = "simple-audio-card"; 106 simple-audio-card,format = "i2s"; 107 simple-audio-card,mclk-fs = <128>; 108 simple-audio-card,name = "rockchip,hdmi"; 109 status = "okay"; 110 111 simple-audio-card,cpu { 112 sound-dai = <&i2s0_8ch>; 113 }; 114 simple-audio-card,codec { 115 sound-dai = <&hdmi>; 116 }; 117 }; 118 119 vccsys: vccsys { 120 compatible = "regulator-fixed"; 121 regulator-name = "vcc3v8_sys"; 122 regulator-always-on; 123 regulator-boot-on; 124 regulator-min-microvolt = <3800000>; 125 regulator-max-microvolt = <3800000>; 126 }; 127 128 vcc_camera: vcc-camera-regulator { 129 compatible = "regulator-fixed"; 130 gpio = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; 131 pinctrl-names = "default"; 132 pinctrl-0 = <&camera_rst>; 133 regulator-name = "vcc_camera"; 134 enable-active-high; 135 regulator-always-on; 136 regulator-boot-on; 137 }; 138 139 rk817-sound { 140 compatible = "rockchip,multicodecs-card"; 141 rockchip,card-name = "rockchip-rk817"; 142 hp-det-gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; 143 io-channels = <&saradc 2>; 144 io-channel-names = "adc-detect"; 145 keyup-threshold-microvolt = <1800000>; 146 poll-interval = <100>; 147 rockchip,format = "i2s"; 148 rockchip,mclk-fs = <256>; 149 rockchip,cpu = <&i2s1_8ch>; 150 rockchip,codec = <&rk817_codec>; 151 pinctrl-names = "default"; 152 pinctrl-0 = <&hp_det>; 153 play-pause-key { 154 label = "playpause"; 155 linux,code = <KEY_PLAYPAUSE>; 156 press-threshold-microvolt = <2000>; 157 }; 158 }; 159 160 sdio_pwrseq: sdio-pwrseq { 161 compatible = "mmc-pwrseq-simple"; 162 clocks = <&rk817 1>; 163 clock-names = "ext_clock"; 164 pinctrl-names = "default"; 165 pinctrl-0 = <&wifi_enable_h>; 166 167 /* 168 * On the module itself this is one of these (depending 169 * on the actual card populated): 170 * - SDIO_RESET_L_WL_REG_ON 171 * - PDN (power down when low) 172 */ 173 post-power-on-delay-ms = <200>; 174 reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; 175 }; 176 177 vcc_sd: vcc-sd { 178 compatible = "regulator-gpio"; 179 enable-active-low; 180 enable-gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; 181 regulator-min-microvolt = <3300000>; 182 regulator-max-microvolt = <3300000>; 183 pinctrl-names = "default"; 184 pinctrl-0 = <&vcc_sd_h>; 185 regulator-name = "vcc_sd"; 186 states = <3300000 0x0 187 3300000 0x1>; 188 }; 189 190 wireless-wlan { 191 compatible = "wlan-platdata"; 192 rockchip,grf = <&grf>; 193 wifi_chip_type = "ap6255"; 194 pinctrl-names = "default"; 195 pinctrl-0 = <&wifi_host_wake_irq>; 196 WIFI,host_wake_irq = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 197 WIFI,poweren_gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; 198 status = "okay"; 199 }; 200 201 wireless-bluetooth { 202 compatible = "bluetooth-platdata"; 203 clocks = <&rk817 1>; 204 clock-names = "ext_clock"; 205 //wifi-bt-power-toggle; 206 uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; 207 pinctrl-names = "default", "rts_gpio"; 208 pinctrl-0 = <&uart1m0_rtsn>; 209 pinctrl-1 = <&uart1_gpios>; 210 BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 211 BT,wake_gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 212 BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 213 status = "okay"; 214 }; 215}; 216 217&bus_npu { 218 bus-supply = <&vdd_logic>; 219 pvtm-supply = <&vdd_cpu>; 220 status = "okay"; 221}; 222 223&cpu0 { 224 cpu-supply = <&vdd_cpu>; 225}; 226 227&csi2_dphy_hw { 228 status = "okay"; 229}; 230 231&csi2_dphy0 { 232 status = "okay"; 233 234 ports { 235 #address-cells = <1>; 236 #size-cells = <0>; 237 port@0 { 238 reg = <0>; 239 #address-cells = <1>; 240 #size-cells = <0>; 241 242 mipi_in_ucam0: endpoint@0 { 243 reg = <0>; 244 remote-endpoint = <&gc2385_out>; 245 data-lanes = <1>; 246 }; 247 mipi_in_ucam1: endpoint@1 { 248 reg = <1>; 249 remote-endpoint = <&ov8858_out>; 250 data-lanes = <1 2 3 4>; 251 }; 252 }; 253 port@1 { 254 reg = <1>; 255 #address-cells = <1>; 256 #size-cells = <0>; 257 258 csidphy0_out: endpoint@0 { 259 reg = <0>; 260 remote-endpoint = <&isp0_in>; 261 }; 262 }; 263 }; 264}; 265 266&dfi { 267 status = "okay"; 268}; 269 270&dmc { 271 center-supply = <&vdd_logic>; 272 status = "okay"; 273}; 274 275&dsi0 { 276 status = "okay"; 277 rockchip,lane-rate = <1000>; 278 panel@0 { 279 compatible = "aoly,sl008pa21y1285-b00", "simple-panel-dsi"; 280 reg = <0>; 281 282 backlight = <&backlight>; 283 //power-supply=<&vcc_3v3>; 284 enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 285 reset-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; 286 287 pinctrl-names = "default"; 288 pinctrl-0 = <&lcd_enable_gpio>, <&lcd_rst_gpio>; 289 290 prepare-delay-ms = <120>; 291 reset-delay-ms = <120>; 292 init-delay-ms = <120>; 293 stbyb-delay-ms = <120>; 294 enable-delay-ms = <120>; 295 disable-delay-ms = <120>; 296 unprepare-delay-ms = <120>; 297 298 width-mm = <229>; 299 height-mm = <143>; 300 301 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 302 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 303 dsi,format = <MIPI_DSI_FMT_RGB888>; 304 dsi,lanes = <4>; 305 306 panel-init-sequence = [ 307 23 00 02 B0 01 308 23 00 02 C3 0F 309 23 00 02 C4 00 310 23 00 02 C5 00 311 23 00 02 C6 00 312 23 00 02 C7 00 313 23 00 02 C8 0D 314 23 00 02 C9 12 315 23 00 02 CA 11 316 23 00 02 CD 1D 317 23 00 02 CE 1B 318 23 00 02 CF 0B 319 23 00 02 D0 09 320 23 00 02 D1 07 321 23 00 02 D2 05 322 23 00 02 D3 01 323 23 00 02 D7 10 324 23 00 02 D8 00 325 23 00 02 D9 00 326 23 00 02 DA 00 327 23 00 02 DB 00 328 23 00 02 DC 0E 329 23 00 02 DD 12 330 23 00 02 DE 11 331 23 00 02 E1 1E 332 23 00 02 E2 1C 333 23 00 02 E3 0C 334 23 00 02 E4 0A 335 23 00 02 E5 08 336 23 00 02 E6 06 337 23 00 02 E7 02 338 23 00 02 B0 03 339 23 00 02 BE 03 340 23 00 02 CC 44 341 23 00 02 C8 07 342 23 00 02 C9 05 343 23 00 02 CA 42 344 23 00 02 CD 3E 345 23 00 02 CF 60 346 23 00 02 D2 04 347 23 00 02 D3 04 348 23 00 02 D4 01 349 23 00 02 D5 00 350 23 00 02 D6 03 351 23 00 02 D7 04 352 23 00 02 D9 01 353 23 00 02 DB 01 354 23 00 02 E4 F0 355 23 00 02 E5 0A 356 23 00 02 B0 00 357 23 00 02 BA 8F// NEW ADD 358 23 00 02 BD 63 359 23 00 02 C2 08 360 23 00 02 C4 10 361 23 00 02 B0 02 362 23 00 02 C0 00 363 23 00 02 C1 0A 364 23 00 02 C2 20 365 23 00 02 C3 24 366 23 00 02 C4 23 367 23 00 02 C5 29 368 23 00 02 C6 23 369 23 00 02 C7 1C 370 23 00 02 C8 19 371 23 00 02 C9 17 372 23 00 02 CA 17 373 23 00 02 CB 18 374 23 00 02 CC 1A 375 23 00 02 CD 1E 376 23 00 02 CE 20 377 23 00 02 CF 23 378 23 00 02 D0 07 379 23 00 02 D1 00 380 23 00 02 D2 00 381 23 00 02 D3 0A 382 23 00 02 D4 13 383 23 00 02 D5 1C 384 23 00 02 D6 1A 385 23 00 02 D7 13 386 23 00 02 D8 17 387 23 00 02 D9 1C 388 23 00 02 DA 19 389 23 00 02 DB 17 390 23 00 02 DC 17 391 23 00 02 DD 18 392 23 00 02 DE 1A 393 23 00 02 DF 1E 394 23 00 02 E0 20 395 23 00 02 E1 23 396 23 00 02 E2 07 397 398 05 78 01 11 399 05 32 01 29 400 ]; 401 402 panel-exit-sequence = [ 403 05 dc 01 28 404 05 78 01 10 405 ]; 406 407 display-timings { 408 native-mode = <&timing0>; 409 410 timing0: timing0 { 411 clock-frequency = <160000000>; 412 hactive = <1200>; 413 vactive = <1920>; 414 415 hsync-len = <1>;//19 416 hback-porch = <60>;//40 417 hfront-porch = <80>;//123 418 419 vsync-len = <1>; 420 vback-porch = <25>; 421 vfront-porch = <35>; 422 423 hsync-active = <0>; 424 vsync-active = <0>; 425 de-active = <0>; 426 pixelclk-active = <1>; 427 }; 428 }; 429 430 ports { 431 #address-cells = <1>; 432 #size-cells = <0>; 433 434 port@0 { 435 reg = <0>; 436 panel_in_dsi: endpoint { 437 remote-endpoint = <&dsi_out_panel>; 438 }; 439 }; 440 }; 441 }; 442 443 ports { 444 #address-cells = <1>; 445 #size-cells = <0>; 446 447 port@1 { 448 reg = <1>; 449 dsi_out_panel: endpoint { 450 remote-endpoint = <&panel_in_dsi>; 451 }; 452 }; 453 }; 454 455}; 456 457&dsi0_in_vp0 { 458 status = "disabled"; 459}; 460 461&dsi0_in_vp1 { 462 status = "okay"; 463}; 464 465&gpu { 466 mali-supply = <&vdd_gpu>; 467 status = "okay"; 468}; 469 470&hdmi { 471 status = "okay"; 472}; 473 474&hdmi_in_vp0 { 475 status = "okay"; 476}; 477 478&hdmi_in_vp1 { 479 status = "disabled"; 480}; 481 482&hdmi_sound { 483 status = "okay"; 484}; 485 486&i2c0 { 487 status = "okay"; 488 489 vdd_cpu: tcs4525@1c { 490 compatible = "tcs,tcs4525"; 491 reg = <0x1c>; 492 vin-supply = <&vccsys>; 493 regulator-compatible = "fan53555-reg"; 494 regulator-name = "vdd_cpu"; 495 regulator-min-microvolt = <712500>; 496 regulator-max-microvolt = <1390000>; 497 regulator-init-microvolt = <900000>; 498 regulator-ramp-delay = <2300>; 499 fcs,suspend-voltage-selector = <1>; 500 regulator-boot-on; 501 regulator-always-on; 502 regulator-state-mem { 503 regulator-off-in-suspend; 504 }; 505 }; 506 507 rk817: pmic@20 { 508 compatible = "rockchip,rk817"; 509 reg = <0x20>; 510 interrupt-parent = <&gpio0>; 511 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 512 513 pinctrl-names = "default", "pmic-sleep", 514 "pmic-power-off", "pmic-reset"; 515 pinctrl-0 = <&pmic_int>; 516 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 517 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 518 pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; 519 rockchip,system-power-controller; 520 wakeup-source; 521 #clock-cells = <1>; 522 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 523 //fb-inner-reg-idxs = <2>; 524 /* 1: rst regs (default in codes), 0: rst the pmic */ 525 pmic-reset-func = <0>; 526 /* not save the PMIC_POWER_EN register in uboot */ 527 not-save-power-en = <1>; 528 529 vcc1-supply = <&vccsys>; 530 vcc2-supply = <&vccsys>; 531 vcc3-supply = <&vccsys>; 532 vcc4-supply = <&vccsys>; 533 vcc5-supply = <&vccsys>; 534 vcc6-supply = <&vccsys>; 535 vcc7-supply = <&vccsys>; 536 vcc8-supply = <&vccsys>; 537 vcc9-supply = <&dcdc_boost>; 538 539 pwrkey { 540 status = "okay"; 541 }; 542 543 pinctrl_rk8xx: pinctrl_rk8xx { 544 gpio-controller; 545 #gpio-cells = <2>; 546 547 rk817_slppin_null: rk817_slppin_null { 548 pins = "gpio_slp"; 549 function = "pin_fun0"; 550 }; 551 552 rk817_slppin_slp: rk817_slppin_slp { 553 pins = "gpio_slp"; 554 function = "pin_fun1"; 555 }; 556 557 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 558 pins = "gpio_slp"; 559 function = "pin_fun2"; 560 }; 561 562 rk817_slppin_rst: rk817_slppin_rst { 563 pins = "gpio_slp"; 564 function = "pin_fun3"; 565 }; 566 }; 567 568 regulators { 569 vdd_logic: DCDC_REG1 { 570 regulator-always-on; 571 regulator-boot-on; 572 regulator-min-microvolt = <500000>; 573 regulator-max-microvolt = <1350000>; 574 regulator-init-microvolt = <900000>; 575 regulator-ramp-delay = <6001>; 576 regulator-initial-mode = <0x2>; 577 regulator-name = "vdd_logic"; 578 regulator-state-mem { 579 regulator-off-in-suspend; 580 regulator-suspend-microvolt = <900000>; 581 }; 582 }; 583 584 vdd_gpu: DCDC_REG2 { 585 regulator-always-on; 586 regulator-boot-on; 587 regulator-min-microvolt = <500000>; 588 regulator-max-microvolt = <1350000>; 589 regulator-init-microvolt = <900000>; 590 regulator-ramp-delay = <6001>; 591 regulator-initial-mode = <0x2>; 592 regulator-name = "vdd_gpu"; 593 regulator-state-mem { 594 regulator-off-in-suspend; 595 }; 596 }; 597 598 vcc_ddr: DCDC_REG3 { 599 regulator-always-on; 600 regulator-boot-on; 601 regulator-initial-mode = <0x2>; 602 regulator-name = "vcc_ddr"; 603 regulator-state-mem { 604 regulator-on-in-suspend; 605 }; 606 }; 607 608 vcc_3v3: DCDC_REG4 { 609 regulator-always-on; 610 regulator-boot-on; 611 regulator-min-microvolt = <3300000>; 612 regulator-max-microvolt = <3300000>; 613 regulator-initial-mode = <0x2>; 614 regulator-name = "vcc_3v3"; 615 regulator-state-mem { 616 regulator-on-in-suspend; 617 regulator-suspend-microvolt = <3300000>; 618 }; 619 }; 620 621 vcca1v8_pmu: LDO_REG1 { 622 regulator-always-on; 623 regulator-boot-on; 624 regulator-min-microvolt = <1800000>; 625 regulator-max-microvolt = <1800000>; 626 regulator-name = "vcca1v8_pmu"; 627 regulator-state-mem { 628 regulator-on-in-suspend; 629 regulator-suspend-microvolt = <1800000>; 630 }; 631 }; 632 633 vdda_0v9: LDO_REG2 { 634 regulator-always-on; 635 regulator-boot-on; 636 regulator-min-microvolt = <900000>; 637 regulator-max-microvolt = <900000>; 638 regulator-name = "vdda_0v9"; 639 regulator-state-mem { 640 regulator-off-in-suspend; 641 }; 642 }; 643 644 vdda0v9_pmu: LDO_REG3 { 645 regulator-always-on; 646 regulator-boot-on; 647 regulator-min-microvolt = <900000>; 648 regulator-max-microvolt = <900000>; 649 regulator-name = "vdda0v9_pmu"; 650 regulator-state-mem { 651 regulator-on-in-suspend; 652 regulator-suspend-microvolt = <900000>; 653 }; 654 }; 655 656 vccio_acodec: LDO_REG4 { 657 regulator-always-on; 658 regulator-boot-on; 659 regulator-min-microvolt = <3300000>; 660 regulator-max-microvolt = <3300000>; 661 regulator-name = "vccio_acodec"; 662 regulator-state-mem { 663 regulator-off-in-suspend; 664 }; 665 }; 666 667 vccio_sd: LDO_REG5 { 668 regulator-always-on; 669 regulator-boot-on; 670 regulator-min-microvolt = <1800000>; 671 regulator-max-microvolt = <3300000>; 672 regulator-name = "vccio_sd"; 673 regulator-state-mem { 674 regulator-off-in-suspend; 675 }; 676 }; 677 678 vcc3v3_pmu: LDO_REG6 { 679 regulator-always-on; 680 regulator-boot-on; 681 regulator-min-microvolt = <3300000>; 682 regulator-max-microvolt = <3300000>; 683 regulator-name = "vcc3v3_pmu"; 684 regulator-state-mem { 685 regulator-on-in-suspend; 686 regulator-suspend-microvolt = <3000000>; 687 }; 688 }; 689 690 vcc_1v8: LDO_REG7 { 691 regulator-always-on; 692 regulator-boot-on; 693 regulator-min-microvolt = <1800000>; 694 regulator-max-microvolt = <1800000>; 695 regulator-name = "vcc_1v8"; 696 regulator-state-mem { 697 regulator-off-in-suspend; 698 }; 699 }; 700 701 vcc1v8_dvp: LDO_REG8 { 702 regulator-always-on; 703 regulator-boot-on; 704 regulator-min-microvolt = <1800000>; 705 regulator-max-microvolt = <1800000>; 706 regulator-name = "vcc1v8_dvp"; 707 regulator-state-mem { 708 regulator-off-in-suspend; 709 }; 710 }; 711 712 vcc2v8_dvp: LDO_REG9 { 713 regulator-always-on; 714 regulator-boot-on; 715 regulator-min-microvolt = <2800000>; 716 regulator-max-microvolt = <2800000>; 717 regulator-name = "vcc2v8_dvp"; 718 regulator-state-mem { 719 regulator-off-in-suspend; 720 }; 721 }; 722 723 dcdc_boost: BOOST { 724 regulator-always-on; 725 regulator-boot-on; 726 regulator-min-microvolt = <5000000>; 727 regulator-max-microvolt = <5000000>; 728 regulator-name = "boost"; 729 regulator-state-mem { 730 regulator-off-in-suspend; 731 }; 732 }; 733 734 otg_switch: OTG_SWITCH { 735 regulator-name = "otg_switch"; 736 regulator-state-mem { 737 regulator-off-in-suspend; 738 }; 739 }; 740 }; 741 742 battery { 743 compatible = "rk817,battery"; 744 ocv_table = <3400 3513 3578 3687 3734 3752 3763 745 3766 3771 3784 3804 3836 3885 3925 746 3962 4005 4063 4114 4169 4227 4303>; 747 design_capacity = <5000>; 748 design_qmax = <5500>; 749 bat_res = <100>; 750 sleep_enter_current = <150>; 751 sleep_exit_current = <180>; 752 sleep_filter_current = <100>; 753 power_off_thresd = <3350>; 754 zero_algorithm_vol = <3850>; 755 max_soc_offset = <60>; 756 monitor_sec = <5>; 757 sample_res = <10>; 758 virtual_power = <0>; 759 }; 760 761 charger { 762 compatible = "rk817,charger"; 763 min_input_voltage = <4500>; 764 max_input_current = <1500>; 765 max_chrg_current = <2000>; 766 max_chrg_voltage = <4300>; 767 chrg_term_mode = <0>; 768 chrg_finish_cur = <300>; 769 virtual_power = <0>; 770 dc_det_adc = <0>; 771 extcon = <&usb2phy0>; 772 }; 773 774 rk817_codec: codec { 775 #sound-dai-cells = <0>; 776 compatible = "rockchip,rk817-codec"; 777 clocks = <&cru I2S1_MCLKOUT>; 778 clock-names = "mclk"; 779 assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; 780 assigned-clock-rates = <12288000>; 781 assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; 782 pinctrl-names = "default"; 783 pinctrl-0 = <&i2s1m0_mclk>; 784 hp-volume = <20>; 785 spk-volume = <3>; 786 out-l2spk-r2hp; 787 spk-ctl-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 788 status = "okay"; 789 }; 790 }; 791}; 792 793&i2c2 { 794 status = "okay"; 795 pinctrl-0 = <&i2c2m1_xfer>; 796 797 dw9714: dw9714@c { 798 compatible = "dongwoon,dw9714"; 799 status = "okay"; 800 reg = <0x0c>; 801 rockchip,camera-module-index = <0>; 802 rockchip,vcm-start-current = <10>; 803 rockchip,vcm-rated-current = <85>; 804 rockchip,vcm-step-mode = <5>; 805 rockchip,camera-module-facing = "back"; 806 }; 807 808 gc2385: gc2385@37 { 809 compatible = "galaxycore,gc2385"; 810 status = "okay"; 811 reg = <0x37>; 812 clocks = <&cru CLK_CIF_OUT>; 813 clock-names = "xvclk"; 814 power-domains = <&power RK3568_PD_VI>; 815 pinctrl-names = "rockchip,camera_default"; 816 pinctrl-0 = <&cif_clk>; 817 818 //reset pin control by hardware,used this pin switch to mipi input 819 //1->2LANE(LANE 0&1) FRONT camera, 0->4LANE REAR camera 820 reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; 821 pwdn-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; 822 rockchip,camera-module-index = <1>; 823 rockchip,camera-module-facing = "front"; 824 rockchip,camera-module-name = "HS5885-BNSM1018-V01"; 825 rockchip,camera-module-lens-name = "default"; 826 port { 827 gc2385_out: endpoint { 828 remote-endpoint = <&mipi_in_ucam0>; 829 data-lanes = <1>; 830 }; 831 }; 832 }; 833 834 ov8858: ov8858@36 { 835 status = "okay"; 836 compatible = "ovti,ov8858"; 837 reg = <0x36>; 838 clocks = <&cru CLK_CAM0_OUT>; 839 clock-names = "xvclk"; 840 power-domains = <&power RK3568_PD_VI>; 841 pinctrl-names = "rockchip,camera_default", "rockchip,camera_sleep"; 842 pinctrl-0 = <&cam_clkout0>; 843 pinctrl-1 = <&cam_sleep>; 844 //reset pin control by hardware,used this pin switch to mipi input 845 //1->2LANE(LANE 0&1) FRONT camera, 0->4LANE REAR camera 846 reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; 847 pwdn-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; 848 rockchip,camera-module-index = <0>; 849 rockchip,camera-module-facing = "back"; 850 rockchip,camera-module-name = "HS5885-BNSM1018-V01"; 851 rockchip,camera-module-lens-name = "default"; 852 flash-leds = <&flash_rgb13h>; 853 lens-focus = <&dw9714>; 854 port { 855 ov8858_out: endpoint { 856 remote-endpoint = <&mipi_in_ucam1>; 857 data-lanes = <1 2 3 4>; 858 }; 859 }; 860 }; 861}; 862 863&i2c3 { 864 status = "okay"; 865 pinctrl-names = "default"; 866 pinctrl-0 = <&i2c3m1_xfer>; 867 clock-frequency = <400000>; 868 i2c-scl-rising-time-ns = <138>; 869 i2c-scl-falling-time-ns = <4>; 870 871 ts@40 { 872 compatible = "gslX680-pad"; 873 reg = <0x40>; 874 touch-gpio = <&gpio3 RK_PB0 IRQ_TYPE_LEVEL_HIGH>; 875 reset-gpio = <&gpio3 RK_PB1 IRQ_TYPE_LEVEL_HIGH>; 876 pinctrl-names = "default"; 877 pinctrl-0 = <&tp_gpio>; 878 screen_max_x = <1200>; 879 screen_max_y = <1920>; 880 revert_x = <0>; 881 revert_y = <1>; 882 revert_xy = <0>; 883 chip_id = <1>; 884 status = "okay"; 885 }; 886}; 887 888&i2c5 { 889 status = "okay"; 890 clock-frequency = <400000>; 891 i2c-scl-rising-time-ns = <144>; 892 i2c-scl-falling-time-ns = <4>; 893 894 sensor@18 { 895 compatible = "gs_sc7a20"; 896 reg = <0x18>; 897 type = <SENSOR_TYPE_ACCEL>; 898 irq_enable = <0>; 899 pinctrl-names = "default"; 900 pinctrl-0 = <&sensor_gpio>; 901 irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_RISING>; 902 poll_delay_ms = <10>; 903 layout = <1>; 904 }; 905}; 906 907&i2s0_8ch { 908 status = "okay"; 909}; 910 911&i2s1_8ch { 912 status = "okay"; 913 rockchip,clk-trcm = <1>; 914 pinctrl-names = "default"; 915 pinctrl-0 = <&i2s1m0_sclktx 916 &i2s1m0_lrcktx 917 &i2s1m0_sdi0 918 &i2s1m0_sdo0>; 919}; 920 921&iep { 922 status = "okay"; 923}; 924 925&iep_mmu { 926 status = "okay"; 927}; 928 929&jpegd { 930 status = "okay"; 931}; 932 933&jpegd_mmu { 934 status = "okay"; 935}; 936 937&video_phy0 { 938 status = "okay"; 939}; 940 941&mpp_srv { 942 status = "okay"; 943}; 944 945&nandc0 { 946 status = "okay"; 947}; 948 949&pinctrl { 950 cam { 951 cam_clkout0: cam-clkout0 { 952 rockchip,pins = 953 /* cam_clkout0 */ 954 <4 RK_PA7 1 &pcfg_pull_none>; 955 }; 956 957 cam_sleep: cam-sleep { 958 rockchip,pins = 959 /* cam_sleep */ 960 <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; 961 }; 962 963 camera_rst: camera-rst { 964 rockchip,pins = 965 /* front camera reset */ 966 <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, 967 /* back camra reset */ 968 <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 969 }; 970 971 flash_led_gpios: flash-led { 972 rockchip,pins = 973 /* flash led enable */ 974 <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 975 }; 976 }; 977 978 tp { 979 tp_gpio: tp-gpio { 980 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, 981 <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 982 }; 983 }; 984 985 headphone { 986 hp_det: hp-det { 987 rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; 988 }; 989 }; 990 991 lcd { 992 lcd_rst_gpio: lcd-rst-gpio { 993 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 994 }; 995 996 lcd_enable_gpio: lcd-enable-gpio { 997 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 998 }; 999 1000 }; 1001 1002 pmic { 1003 pmic_int: pmic_int { 1004 rockchip,pins = 1005 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 1006 }; 1007 1008 soc_slppin_gpio: soc_slppin_gpio { 1009 rockchip,pins = 1010 <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; 1011 }; 1012 1013 soc_slppin_slp: soc_slppin_slp { 1014 rockchip,pins = 1015 <0 RK_PA2 1 &pcfg_pull_none>; 1016 }; 1017 1018 soc_slppin_rst: soc_slppin_rst { 1019 rockchip,pins = 1020 <0 RK_PA2 2 &pcfg_pull_none>; 1021 }; 1022 }; 1023 1024 sensor { 1025 sensor_gpio: sensor-gpio { 1026 rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 1027 }; 1028 }; 1029 1030 sdio-pwrseq { 1031 wifi_enable_h: wifi-enable-h { 1032 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 1033 }; 1034 }; 1035 1036 vcc_sd { 1037 vcc_sd_h: vcc-sd-h { 1038 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 1039 }; 1040 }; 1041 1042 wireless-wlan { 1043 wifi_host_wake_irq: wifi-host-wake-irq { 1044 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_down>; 1045 }; 1046 }; 1047 1048 wireless-bluetooth { 1049 uart1_gpios: uart1-gpios { 1050 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 1051 }; 1052 }; 1053}; 1054 1055&pmu_io_domains { 1056 status = "okay"; 1057 pmuio1-supply = <&vcc3v3_pmu>; 1058 pmuio2-supply = <&vcc_3v3>; 1059 vccio1-supply = <&vccio_acodec>; 1060 vccio3-supply = <&vccio_sd>; 1061 vccio4-supply = <&vcc_3v3>; 1062 vccio5-supply = <&vcc_3v3>; 1063 vccio6-supply = <&vcc_3v3>; 1064 vccio7-supply = <&vcc_3v3>; 1065}; 1066 1067&pwm4 { 1068 status = "okay"; 1069}; 1070 1071&rk_rga { 1072 status = "okay"; 1073}; 1074 1075&rkisp { 1076 status = "okay"; 1077}; 1078 1079&rkisp_mmu { 1080 status = "okay"; 1081}; 1082 1083&rkisp_vir0 { 1084 status = "okay"; 1085 1086 port { 1087 #address-cells = <1>; 1088 #size-cells = <0>; 1089 1090 isp0_in: endpoint@0 { 1091 reg = <0>; 1092 remote-endpoint = <&csidphy0_out>; 1093 }; 1094 }; 1095}; 1096 1097&rkvdec { 1098 status = "okay"; 1099}; 1100 1101&rkvdec_mmu { 1102 status = "okay"; 1103}; 1104 1105&rkvenc { 1106 status = "okay"; 1107}; 1108 1109&rkvenc_mmu { 1110 status = "okay"; 1111}; 1112 1113&route_dsi0 { 1114 status = "okay"; 1115 connect = <&vp1_out_dsi0>; 1116}; 1117 1118&route_hdmi { 1119 status = "okay"; 1120 connect = <&vp0_out_hdmi>; 1121}; 1122 1123&saradc { 1124 status = "okay"; 1125 vref-supply = <&vcc_1v8>; 1126}; 1127 1128&sdhci { 1129 bus-width = <8>; 1130 no-sdio; 1131 no-sd; 1132 non-removable; 1133 max-frequency = <200000000>; 1134 status = "okay"; 1135}; 1136 1137&sdmmc0 { 1138 max-frequency = <150000000>; 1139 no-sdio; 1140 no-mmc; 1141 bus-width = <4>; 1142 cap-mmc-highspeed; 1143 cap-sd-highspeed; 1144 disable-wp; 1145 sd-uhs-sdr104; 1146 vmmc-supply = <&vcc_sd>; 1147 vqmmc-supply = <&vccio_sd>; 1148 pinctrl-names = "default"; 1149 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 1150 status = "okay"; 1151}; 1152 1153&sdmmc1 { 1154 max-frequency = <150000000>; 1155 no-sd; 1156 no-mmc; 1157 bus-width = <4>; 1158 disable-wp; 1159 cap-sd-highspeed; 1160 cap-sdio-irq; 1161 keep-power-in-suspend; 1162 mmc-pwrseq = <&sdio_pwrseq>; 1163 non-removable; 1164 pinctrl-names = "default"; 1165 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 1166 sd-uhs-sdr104; 1167 rockchip,default-sample-phase = <90>; 1168 status = "okay"; 1169}; 1170 1171&tsadc { 1172 status = "okay"; 1173}; 1174 1175&uart1 { 1176 status = "okay"; 1177 pinctrl-names = "default"; 1178 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; 1179}; 1180 1181&u2phy0_otg { 1182 status = "okay"; 1183}; 1184 1185&usb2phy0 { 1186 status = "okay"; 1187}; 1188 1189&usbdrd_dwc3 { 1190 status = "okay"; 1191}; 1192 1193&usbdrd30 { 1194 status = "okay"; 1195}; 1196 1197&vdpu { 1198 status = "okay"; 1199}; 1200 1201&vdpu_mmu { 1202 status = "okay"; 1203}; 1204 1205&vepu { 1206 status = "okay"; 1207}; 1208 1209&vepu_mmu { 1210 status = "okay"; 1211}; 1212 1213&vop { 1214 status = "okay"; 1215 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 1216 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 1217}; 1218 1219&vop_mmu { 1220 status = "okay"; 1221}; 1222