1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/input/rk-input.h> 12#include <dt-bindings/sensor-dev.h> 13#include <dt-bindings/display/drm_mipi_dsi.h> 14#include "rk3566.dtsi" 15#include "rk3568-android.dtsi" 16 17/ { 18 model = "Rockchip RK3566 RK817 TABLET RKG11 LP4 Board"; 19 compatible = "rockchip,rk3566-rk817-tablet-rkg11", "rockchip,rk3566"; 20 21 adc_keys: adc-keys { 22 compatible = "adc-keys"; 23 io-channels = <&saradc 0>; 24 io-channel-names = "buttons"; 25 keyup-threshold-microvolt = <1800000>; 26 poll-interval = <100>; 27 28 vol-up-key { 29 label = "volume up"; 30 linux,code = <KEY_VOLUMEUP>; 31 press-threshold-microvolt = <1750>; 32 }; 33 34 vol-down-key { 35 label = "volume down"; 36 linux,code = <KEY_VOLUMEDOWN>; 37 press-threshold-microvolt = <297500>; 38 }; 39 }; 40 41 backlight: backlight { 42 compatible = "pwm-backlight"; 43 pwms = <&pwm4 0 25000 0>; 44 brightness-levels = < 45 0 20 20 21 21 22 22 23 46 23 24 24 25 25 26 26 27 47 27 28 28 29 29 30 30 31 48 31 32 32 33 33 34 34 35 49 35 36 36 37 37 38 38 39 50 40 41 42 43 44 45 46 47 51 48 49 50 51 52 53 54 55 52 56 57 58 59 60 61 62 63 53 64 65 66 67 68 69 70 71 54 72 73 74 75 76 77 78 79 55 80 81 82 83 84 85 86 87 56 88 89 90 91 92 93 94 95 57 96 97 98 99 100 101 102 103 58 104 105 106 107 108 109 110 111 59 112 113 114 115 116 117 118 119 60 120 121 122 123 124 125 126 127 61 128 129 130 131 132 133 134 135 62 136 137 138 139 140 141 142 143 63 144 145 146 147 148 149 150 151 64 152 153 154 155 156 157 158 159 65 160 161 162 163 164 165 166 167 66 168 169 170 171 172 173 174 175 67 176 177 178 179 180 181 182 183 68 184 185 186 187 188 189 190 191 69 192 193 194 195 196 197 198 199 70 200 201 202 203 204 205 206 207 71 208 209 210 211 212 213 214 215 72 216 217 218 219 220 221 222 223 73 224 225 226 227 228 229 230 231 74 232 233 234 235 236 237 238 239 75 240 241 242 243 244 245 246 247 76 248 249 250 251 252 253 254 255 77 >; 78 default-brightness-level = <200>; 79 }; 80 81 charge-animation { 82 compatible = "rockchip,uboot-charge"; 83 rockchip,uboot-charge-on = <1>; 84 rockchip,android-charge-on = <0>; 85 rockchip,uboot-low-power-voltage = <3350>; 86 rockchip,screen-on-voltage = <3400>; 87 status = "okay"; 88 }; 89 90 es7210_sound: es7210-sound { 91 status = "okay"; 92 compatible = "simple-audio-card"; 93 simple-audio-card,format = "i2s"; 94 simple-audio-card,mclk-fs = <256>; 95 simple-audio-card,name = "rockchip,es7210"; 96 97 simple-audio-card,cpu { 98 sound-dai = <&i2s1_8ch>; 99 }; 100 simple-audio-card,codec { 101 sound-dai = <&es7210>; 102 }; 103 }; 104 105 vccsys: vccsys { 106 compatible = "regulator-fixed"; 107 regulator-name = "vcc3v8_sys"; 108 regulator-always-on; 109 regulator-boot-on; 110 regulator-min-microvolt = <3800000>; 111 regulator-max-microvolt = <3800000>; 112 }; 113 114 vcc3v3_lcd0_n: vcc3v3-lcd0-n { 115 compatible = "regulator-fixed"; 116 regulator-name = "vcc3v3_lcd0_n"; 117 gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 118 enable-active-high; 119 regulator-boot-on; 120 regulator-state-mem { 121 regulator-off-in-suspend; 122 }; 123 }; 124 125 rk817-sound { 126 compatible = "simple-audio-card"; 127 simple-audio-card,format = "i2s"; 128 simple-audio-card,name = "rockchip,rk817-codec"; 129 simple-audio-card,mclk-fs = <256>; 130 131 simple-audio-card,cpu { 132 sound-dai = <&i2s3_2ch>; 133 }; 134 simple-audio-card,codec { 135 sound-dai = <&rk817_codec>; 136 }; 137 }; 138 139 rk_headset: rk-headset { 140 compatible = "rockchip_headset"; 141 headset_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; 142 pinctrl-names = "default"; 143 pinctrl-0 = <&hp_det>; 144 io-channels = <&saradc 2>; 145 }; 146 147 sdio_pwrseq: sdio-pwrseq { 148 compatible = "mmc-pwrseq-simple"; 149 clocks = <&rk817 1>; 150 clock-names = "ext_clock"; 151 pinctrl-names = "default"; 152 pinctrl-0 = <&wifi_enable_h>; 153 154 /* 155 * On the module itself this is one of these (depending 156 * on the actual card populated): 157 * - SDIO_RESET_L_WL_REG_ON 158 * - PDN (power down when low) 159 */ 160 post-power-on-delay-ms = <200>; 161 reset-gpios = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>, 162 <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; 163 }; 164 165 wireless-wlan { 166 compatible = "wlan-platdata"; 167 rockchip,grf = <&grf>; 168 wifi_chip_type = "rtl8821cs"; 169 pinctrl-names = "default"; 170 pinctrl-0 = <&wifi_host_wake_irq>; 171 WIFI,vbat_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 172 WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; 173 WIFI,poweren_gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; 174 status = "okay"; 175 }; 176 177 wireless-bluetooth { 178 compatible = "bluetooth-platdata"; 179 clocks = <&rk817 1>; 180 clock-names = "ext_clock"; 181 //wifi-bt-power-toggle; 182 uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; 183 pinctrl-names = "default", "rts_gpio"; 184 pinctrl-0 = <&uart1m0_rtsn>; 185 pinctrl-1 = <&uart1_gpios>; 186 BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 187 BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 188 BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 189 status = "okay"; 190 }; 191 192 hall_sensor: hall-mh248 { 193 compatible = "hall-mh248"; 194 pinctrl-names = "default"; 195 pinctrl-0 = <&mh248_irq_gpio>; 196 irq-gpio = <&gpio0 RK_PC6 IRQ_TYPE_EDGE_BOTH>; 197 hall-active = <1>; 198 status = "okay"; 199 }; 200 201 vibrator { 202 compatible = "rk-vibrator-gpio"; 203 vibrator-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>; 204 status = "okay"; 205 }; 206 207 reserved-memory { 208 #address-cells = <2>; 209 #size-cells = <2>; 210 ranges; 211 212 rknpu_reserved: rknpu { 213 compatible = "shared-dma-pool"; 214 inactive; 215 reusable; 216 size = <0x0 0x20000000>; 217 alignment = <0x0 0x1000>; 218 }; 219 }; 220}; 221 222&cpu0 { 223 cpu-supply = <&vdd_cpu>; 224}; 225 226&csi2_dphy_hw { 227 status = "okay"; 228}; 229 230&csi2_dphy0 { 231 status = "okay"; 232 233 ports { 234 #address-cells = <1>; 235 #size-cells = <0>; 236 port@0 { 237 reg = <0>; 238 #address-cells = <1>; 239 #size-cells = <0>; 240 241 mipi_in_ucam0: endpoint@0 { 242 reg = <0>; 243 remote-endpoint = <&gc5035_out>; 244 data-lanes = <1 2>; 245 }; 246 mipi_in_ucam1: endpoint@1 { 247 reg = <1>; 248 remote-endpoint = <&ov8858_out>; 249 data-lanes = <1 2 3 4>; 250 }; 251 }; 252 port@1 { 253 reg = <1>; 254 #address-cells = <1>; 255 #size-cells = <0>; 256 257 csidphy0_out: endpoint@0 { 258 reg = <0>; 259 remote-endpoint = <&isp0_in>; 260 }; 261 }; 262 }; 263}; 264 265&dfi { 266 status = "okay"; 267}; 268 269&dmc { 270 center-supply = <&vdd_logic>; 271 status = "okay"; 272}; 273 274&dsi0 { 275 status = "okay"; 276 rockchip,dual-channel = <&dsi1>; 277 panel@0 { 278 status = "okay"; 279 compatible = "simple-panel-dsi"; 280 reg = <0>; 281 backlight = <&backlight>; 282 power-supply = <&vcc3v3_lcd0_n>; 283 //vsp-supply = <&outp>; 284 //vsn-supply = <&outn>; 285 //enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 286 reset-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; 287 pinctrl-names = "default"; 288 pinctrl-0 = <&lcd_enable_gpio>, <&lcd_rst_gpio>, <&lcd_panel_vsp>, <&lcd_panel_vsn>; 289 290 prepare-delay-ms = <60>; 291 unprepare-delay-ms = <60>; 292 enable-delay-ms = <60>; 293 disable-delay-ms = <60>; 294 init-delay-ms = <60>; 295 reset-delay-ms = <60>; 296 297 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 298 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 299 dsi,format = <MIPI_DSI_FMT_RGB888>; 300 dsi,lanes = <8>; 301 panel-init-sequence = [ 302 05 20 01 11 303 05 96 01 29 304 ]; 305 306 panel-exit-sequence = [ 307 05 05 01 28 308 05 78 01 10 309 ]; 310 311 display-timings { 312 native-mode = <&timing0>; 313 timing0: timing0 { 314 clock-frequency = <255000000>; 315 hactive = <1600>; 316 vactive = <2176>; 317 hsync-len = <14>; //20, 50 318 hback-porch = <25>; //50, 56 319 hfront-porch = <25>;//50, 30 320 vsync-len = <8>; 321 vback-porch = <73>; 322 vfront-porch = <250>; 323 hsync-active = <0>; 324 vsync-active = <0>; 325 de-active = <0>; 326 pixelclk-active = <1>; 327 }; 328 }; 329 330 ports { 331 #address-cells = <1>; 332 #size-cells = <0>; 333 334 port@0 { 335 reg = <0>; 336 panel_in_dsi: endpoint { 337 remote-endpoint = <&dsi_out_panel>; 338 }; 339 }; 340 }; 341 }; 342 343 ports { 344 #address-cells = <1>; 345 #size-cells = <0>; 346 347 port@1 { 348 reg = <1>; 349 dsi_out_panel: endpoint { 350 remote-endpoint = <&panel_in_dsi>; 351 }; 352 }; 353 }; 354 355}; 356 357&dsi1 { 358 status = "okay"; 359}; 360 361&dsi0_in_vp0 { 362 status = "okay"; 363}; 364 365&dsi0_in_vp1 { 366 status = "disabled"; 367}; 368 369&gpu { 370 mali-supply = <&vdd_gpu>; 371 status = "okay"; 372}; 373 374 375&i2c0 { 376 status = "okay"; 377 378 vdd_cpu: tcs4525@1c { 379 compatible = "tcs,tcs4525"; 380 reg = <0x1c>; 381 vin-supply = <&vccsys>; 382 regulator-compatible = "fan53555-reg"; 383 regulator-name = "vdd_cpu"; 384 regulator-min-microvolt = <712500>; 385 regulator-max-microvolt = <1390000>; 386 regulator-init-microvolt = <900000>; 387 regulator-ramp-delay = <2300>; 388 fcs,suspend-voltage-selector = <1>; 389 regulator-boot-on; 390 regulator-always-on; 391 regulator-state-mem { 392 regulator-off-in-suspend; 393 }; 394 }; 395 396 rk817: pmic@20 { 397 compatible = "rockchip,rk817"; 398 reg = <0x20>; 399 interrupt-parent = <&gpio0>; 400 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 401 402 pinctrl-names = "default", "pmic-sleep", 403 "pmic-power-off", "pmic-reset"; 404 pinctrl-0 = <&pmic_int>; 405 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 406 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 407 pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; 408 rockchip,system-power-controller; 409 wakeup-source; 410 #clock-cells = <1>; 411 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 412 //fb-inner-reg-idxs = <2>; 413 /* 1: rst regs (default in codes), 0: rst the pmic */ 414 pmic-reset-func = <0>; 415 416 vcc1-supply = <&vccsys>; 417 vcc2-supply = <&vccsys>; 418 vcc3-supply = <&vccsys>; 419 vcc4-supply = <&vccsys>; 420 vcc5-supply = <&vccsys>; 421 vcc6-supply = <&vccsys>; 422 vcc7-supply = <&vccsys>; 423 vcc8-supply = <&vccsys>; 424 vcc9-supply = <&dcdc_boost>; 425 426 pwrkey { 427 status = "okay"; 428 }; 429 430 pinctrl_rk8xx: pinctrl_rk8xx { 431 gpio-controller; 432 #gpio-cells = <2>; 433 434 rk817_slppin_null: rk817_slppin_null { 435 pins = "gpio_slp"; 436 function = "pin_fun0"; 437 }; 438 439 rk817_slppin_slp: rk817_slppin_slp { 440 pins = "gpio_slp"; 441 function = "pin_fun1"; 442 }; 443 444 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 445 pins = "gpio_slp"; 446 function = "pin_fun2"; 447 }; 448 449 rk817_slppin_rst: rk817_slppin_rst { 450 pins = "gpio_slp"; 451 function = "pin_fun3"; 452 }; 453 }; 454 455 regulators { 456 vdd_logic: DCDC_REG1 { 457 regulator-always-on; 458 regulator-boot-on; 459 regulator-min-microvolt = <500000>; 460 regulator-max-microvolt = <1350000>; 461 regulator-init-microvolt = <900000>; 462 regulator-ramp-delay = <6001>; 463 regulator-initial-mode = <0x2>; 464 regulator-name = "vdd_logic"; 465 regulator-state-mem { 466 regulator-off-in-suspend; 467 regulator-suspend-microvolt = <900000>; 468 }; 469 }; 470 471 vdd_gpu: DCDC_REG2 { 472 regulator-always-on; 473 regulator-boot-on; 474 regulator-min-microvolt = <500000>; 475 regulator-max-microvolt = <1350000>; 476 regulator-init-microvolt = <900000>; 477 regulator-ramp-delay = <6001>; 478 regulator-initial-mode = <0x2>; 479 regulator-name = "vdd_gpu"; 480 regulator-state-mem { 481 regulator-off-in-suspend; 482 }; 483 }; 484 485 vcc_ddr: DCDC_REG3 { 486 regulator-always-on; 487 regulator-boot-on; 488 regulator-initial-mode = <0x2>; 489 regulator-name = "vcc_ddr"; 490 regulator-state-mem { 491 regulator-on-in-suspend; 492 }; 493 }; 494 495 vcc_3v3: DCDC_REG4 { 496 regulator-always-on; 497 regulator-boot-on; 498 regulator-min-microvolt = <3300000>; 499 regulator-max-microvolt = <3300000>; 500 regulator-initial-mode = <0x2>; 501 regulator-name = "vcc_3v3"; 502 regulator-state-mem { 503 regulator-off-in-suspend; 504 }; 505 }; 506 507 vcca1v8_pmu: LDO_REG1 { 508 regulator-always-on; 509 regulator-boot-on; 510 regulator-min-microvolt = <1800000>; 511 regulator-max-microvolt = <1800000>; 512 regulator-name = "vcca1v8_pmu"; 513 regulator-state-mem { 514 regulator-on-in-suspend; 515 regulator-suspend-microvolt = <1800000>; 516 }; 517 }; 518 519 vdda_0v9: LDO_REG2 { 520 regulator-always-on; 521 regulator-boot-on; 522 regulator-min-microvolt = <900000>; 523 regulator-max-microvolt = <900000>; 524 regulator-name = "vdda_0v9"; 525 regulator-state-mem { 526 regulator-off-in-suspend; 527 }; 528 }; 529 530 vdda0v9_pmu: LDO_REG3 { 531 regulator-always-on; 532 regulator-boot-on; 533 regulator-min-microvolt = <900000>; 534 regulator-max-microvolt = <900000>; 535 regulator-name = "vdda0v9_pmu"; 536 regulator-state-mem { 537 regulator-on-in-suspend; 538 regulator-suspend-microvolt = <900000>; 539 }; 540 }; 541 542 vccio_acodec: LDO_REG4 { 543 regulator-always-on; 544 regulator-boot-on; 545 regulator-min-microvolt = <3300000>; 546 regulator-max-microvolt = <3300000>; 547 regulator-name = "vccio_acodec"; 548 regulator-state-mem { 549 regulator-off-in-suspend; 550 }; 551 }; 552 553 vccio_sd: LDO_REG5 { 554 regulator-always-on; 555 regulator-boot-on; 556 regulator-min-microvolt = <1800000>; 557 regulator-max-microvolt = <3300000>; 558 regulator-name = "vccio_sd"; 559 regulator-state-mem { 560 regulator-off-in-suspend; 561 }; 562 }; 563 564 vcc3v3_pmu: LDO_REG6 { 565 regulator-always-on; 566 regulator-boot-on; 567 regulator-min-microvolt = <3300000>; 568 regulator-max-microvolt = <3300000>; 569 regulator-name = "vcc3v3_pmu"; 570 regulator-state-mem { 571 regulator-on-in-suspend; 572 regulator-suspend-microvolt = <3300000>; 573 }; 574 }; 575 576 vcc_1v8: LDO_REG7 { 577 regulator-always-on; 578 regulator-boot-on; 579 regulator-min-microvolt = <1800000>; 580 regulator-max-microvolt = <1800000>; 581 regulator-name = "vcc_1v8"; 582 regulator-state-mem { 583 regulator-off-in-suspend; 584 }; 585 }; 586 587 vcc1v8_dvp: LDO_REG8 { 588 regulator-always-on; 589 regulator-boot-on; 590 regulator-min-microvolt = <1800000>; 591 regulator-max-microvolt = <1800000>; 592 regulator-name = "vcc1v8_dvp"; 593 regulator-state-mem { 594 regulator-off-in-suspend; 595 }; 596 }; 597 598 vcc2v8_dvp: LDO_REG9 { 599 regulator-always-on; 600 regulator-boot-on; 601 regulator-min-microvolt = <2800000>; 602 regulator-max-microvolt = <2800000>; 603 regulator-name = "vcc2v8_dvp"; 604 regulator-state-mem { 605 regulator-off-in-suspend; 606 }; 607 }; 608 609 dcdc_boost: BOOST { 610 regulator-always-on; 611 regulator-boot-on; 612 regulator-min-microvolt = <4700000>; 613 regulator-max-microvolt = <5400000>; 614 regulator-name = "boost"; 615 regulator-state-mem { 616 regulator-off-in-suspend; 617 }; 618 }; 619 620 otg_switch: OTG_SWITCH { 621 regulator-name = "otg_switch"; 622 regulator-state-mem { 623 regulator-off-in-suspend; 624 }; 625 }; 626 }; 627 628 battery { 629 compatible = "rk817,battery"; 630 ocv_table = <3510 3679 3691 3714 3738 3759 3776 631 3795 3811 3834 3852 3881 3942 3976 632 4012 4075 4114 4177 4232 4277 4351>; 633 design_capacity = <7916>; 634 design_qmax = <8708>; 635 bat_res = <110>; 636 sleep_enter_current = <150>; 637 sleep_exit_current = <180>; 638 sleep_filter_current = <100>; 639 power_off_thresd = <3450>; 640 zero_algorithm_vol = <3850>; 641 max_soc_offset = <60>; 642 monitor_sec = <5>; 643 sample_res = <10>; 644 virtual_power = <0>; 645 }; 646 647 charger { 648 compatible = "rk817,charger"; 649 min_input_voltage = <4500>; 650 max_input_current = <1500>; 651 max_chrg_current = <2000>; 652 max_chrg_voltage = <4300>; 653 chrg_term_mode = <0>; 654 chrg_finish_cur = <300>; 655 virtual_power = <0>; 656 dc_det_adc = <0>; 657 extcon = <&usb2phy0>; 658 }; 659 660 rk817_codec: codec { 661 #sound-dai-cells = <0>; 662 compatible = "rockchip,rk817-codec"; 663 clocks = <&cru I2S3_MCLKOUT>; 664 clock-names = "mclk"; 665 assigned-clocks = <&cru I2S3_MCLKOUT>, <&cru I2S3_MCLK_IOE>; 666 assigned-clock-rates = <12288000>; 667 assigned-clock-parents = <&cru I2S3_MCLKOUT_TX>, <&cru I2S3_MCLKOUT>; 668 pinctrl-names = "default"; 669 pinctrl-0 = <&i2s3m1_mclk>; 670 hp-volume = <20>; 671 spk-volume = <3>; 672 mic-in-differential; 673 use-ext-amplifier; 674 //out-l2spk-r2hp; 675 spk-ctl-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 676 status = "okay"; 677 }; 678 }; 679}; 680 681&i2c1 { 682 status = "okay"; 683 684 dio5632@3e { 685 compatible = "DIO5632"; 686 reg = <0x3e>; 687 status = "disabled"; 688 689 outp: outp@3e { 690 regulator-name = "LCD_VSP"; 691 vin-supply = <&vccsys>; 692 enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 693 }; 694 695 outn: outn@3e { 696 regulator-name = "LCD_VSN"; 697 vin-supply = <&vccsys>; 698 enable-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; 699 }; 700 }; 701 702 es7210: es7210@43 { 703 #sound-dai-cells = <0>; 704 compatible = "ES7210_MicArray_0"; 705 reg = <0x43>; 706 clocks = <&cru I2S1_MCLKOUT_RX>; 707 clock-names = "mclk"; 708 assigned-clocks = <&cru I2S1_MCLKOUT_RX>; 709 assigned-clock-parents = <&cru CLK_I2S1_8CH_RX>; 710 pinctrl-names = "default"; 711 pinctrl-0 = <&i2s1m0_mclk>; 712 }; 713}; 714 715&i2c2 { 716 status = "okay"; 717 pinctrl-names = "default"; 718 pinctrl-0 = <&i2c2m1_xfer>; 719 720 gc5035: gc5035@37 { 721 compatible = "galaxycore,gc5035"; 722 status = "okay"; 723 reg = <0x37>; 724 clocks = <&cru CLK_CIF_OUT>; 725 clock-names = "xvclk"; 726 power-domains = <&power RK3568_PD_VI>; 727 pinctrl-names = "default"; 728 pinctrl-0 = <&cif_clk>; 729 730 //reset pin control by hardware,used this pin switch to mipi input 731 //0->FRONT camera, 1->REAR camera 732 reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; 733 pwdn-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; 734 rockchip,camera-module-index = <0>; 735 rockchip,camera-module-facing = "front"; 736 rockchip,camera-module-name = "XHG-RKX11F-V5"; 737 rockchip,camera-module-lens-name = "HR232H65"; 738 port { 739 gc5035_out: endpoint { 740 remote-endpoint = <&mipi_in_ucam0>; 741 data-lanes = <1 2>; 742 }; 743 }; 744 }; 745 746 ov8858: ov8858@36 { 747 status = "okay"; 748 compatible = "ovti,ov8858"; 749 reg = <0x36>; 750 clocks = <&cru CLK_CAM0_OUT>; 751 clock-names = "xvclk"; 752 power-domains = <&power RK3568_PD_VI>; 753 pinctrl-names = "rockchip,camera_default", "rockchip,camera_sleep"; 754 pinctrl-0 = <&cam_clkout0>; 755 pinctrl-1 = <&cam_sleep>; 756 //reset pin control by hardware,used this pin switch to mipi input 757 //0->FRONT camera, 1->REAR camera 758 reset-gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>; 759 pwdn-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; 760 rockchip,camera-module-index = <1>; 761 rockchip,camera-module-facing = "back"; 762 rockchip,camera-module-name = "XHG-RKX11B-V10"; 763 rockchip,camera-module-lens-name = "default"; 764 port { 765 ov8858_out: endpoint { 766 remote-endpoint = <&mipi_in_ucam1>; 767 data-lanes = <1 2 3 4>; 768 }; 769 }; 770 }; 771}; 772 773&i2c3 { 774 status = "okay"; 775 pinctrl-names = "default"; 776 pinctrl-0 = <&i2c3m1_xfer>; 777 778 focaltech: focaltech@38 { 779 status = "okay"; 780 compatible = "focaltech,fts"; 781 reg = <0x38>; 782 power-supply = <&vcc3v3_lcd0_n>; 783 pinctrl-names = "default"; 784 pinctrl-0 = <&tp_gpio>; 785 focaltech,irq-gpio = <&gpio3 RK_PB0 IRQ_TYPE_LEVEL_LOW>; 786 focaltech,reset-gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; 787 focaltech,have-key = <0>; 788 focaltech,key-number = <3>; 789 focaltech,keys = <256 1068 64 64 128 1068 64 64 192 1068 64 64>; 790 focaltech,key-x-coord = <1600>; 791 focaltech,key-y-coord = <2176>; 792 focaltech,max-touch-number = <5>; 793 }; 794}; 795 796&i2c5 { 797 status = "okay"; 798 799 sensor@18 { 800 compatible = "gs_sc7a20"; 801 reg = <0x18>; 802 type = <SENSOR_TYPE_ACCEL>; 803 irq_enable = <0>; 804 pinctrl-names = "default"; 805 pinctrl-0 = <&sensor_gpio>; 806 irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_LEVEL_LOW>; 807 poll_delay_ms = <10>; 808 layout = <7>; 809 status = "disabled"; 810 }; 811 812 ls_em3071x@24 { 813 compatible = "ls_em3071x"; 814 reg = <0x24>; 815 type = <SENSOR_TYPE_LIGHT>; 816 irq_enable = <0>; 817 poll_delay_ms = <100>; 818 status = "okay"; 819 }; 820 821 ps_em3071x@24 { 822 compatible = "ps_em3071x"; 823 reg = <0x24>; 824 type = <SENSOR_TYPE_PROXIMITY>; 825 pinctrl-names = "default"; 826 pinctrl-0 = <&em3071x_irq_gpio>; 827 irq-gpio = <&gpio3 RK_PA6 IRQ_TYPE_LEVEL_LOW>; 828 irq_enable = <1>; 829 ps_threshold_high = <25>; 830 ps_threshold_low = <15>; 831 poll_delay_ms = <100>; 832 status = "okay"; 833 }; 834 835 icm20607_acc@68 { 836 compatible = "icm2060x_acc"; 837 reg = <0x68>; 838 irq_enable = <0>; 839 poll_delay_ms = <30>; 840 type = <SENSOR_TYPE_ACCEL>; 841 layout = <1>; 842 status = "okay"; 843 }; 844 845 icm20607_gyro@68 { 846 compatible = "icm2060x_gyro"; 847 reg = <0x68>; 848 irq_enable = <0>; 849 poll_delay_ms = <30>; 850 type = <SENSOR_TYPE_GYROSCOPE>; 851 layout = <1>; 852 status = "okay"; 853 }; 854 855 ak09918_compass: ak09918_compass@c { 856 compatible = "ak09918"; 857 reg = <0x0c>; 858 type = <SENSOR_TYPE_COMPASS>; 859 irq_enable = <0>; 860 poll_delay_ms = <30>; 861 layout = <1>; 862 status = "okay"; 863 }; 864}; 865 866&i2s1_8ch { 867 status = "okay"; 868 #sound-dai-cells = <0>; 869 rockchip,clk-trcm = <2>; 870 pinctrl-names = "default"; 871 pinctrl-0 = <&i2s1m0_sclkrx 872 &i2s1m0_lrckrx 873 &i2s1m0_sdi0 874 &i2s1m0_sdi1 875 &i2s1m0_sdi2 876 &i2s1m0_sdi3>; 877}; 878 879&i2s3_2ch { 880 status = "okay"; 881 rockchip,clk-trcm = <1>; 882 pinctrl-names = "default"; 883 pinctrl-0 = <&i2s3m1_sclk 884 &i2s3m1_lrck 885 &i2s3m1_sdi 886 &i2s3m1_sdo>; 887}; 888 889&jpegd { 890 status = "okay"; 891}; 892 893&jpegd_mmu { 894 status = "okay"; 895}; 896 897&video_phy0 { 898 status = "okay"; 899}; 900 901&video_phy1 { 902 status = "okay"; 903}; 904 905&mpp_srv { 906 status = "okay"; 907}; 908 909&nandc0 { 910 status = "okay"; 911}; 912 913&pinctrl { 914 cam { 915 cam_clkout0: cam-clkout0 { 916 rockchip,pins = 917 /* cam_clkout0 */ 918 <4 RK_PA7 1 &pcfg_pull_none>; 919 }; 920 921 cam_sleep: cam-sleep { 922 rockchip,pins = 923 /* cam_sleep */ 924 <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; 925 }; 926 927 camera_rst: camera-rst { 928 rockchip,pins = 929 /* front camera reset */ 930 <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, 931 /* back camra reset */ 932 <4 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 933 }; 934 935 flash_led_gpios: flash-led { 936 rockchip,pins = 937 /* flash led enable */ 938 <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 939 }; 940 }; 941 942 tp { 943 tp_gpio: tp-gpio { 944 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, 945 <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 946 }; 947 }; 948 949 headphone { 950 hp_det: hp-det { 951 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; 952 }; 953 }; 954 955 lcd { 956 lcd_rst_gpio: lcd-rst-gpio { 957 rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 958 }; 959 960 lcd_enable_gpio: lcd-enable-gpio { 961 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 962 }; 963 964 lcd_panel_vsp: lcd-panel-vsp { 965 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; 966 }; 967 968 lcd_panel_vsn: lcd-panel-vsn { 969 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; 970 }; 971 }; 972 973 pmic { 974 pmic_int: pmic_int { 975 rockchip,pins = 976 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 977 }; 978 979 soc_slppin_gpio: soc_slppin_gpio { 980 rockchip,pins = 981 <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; 982 }; 983 984 soc_slppin_slp: soc_slppin_slp { 985 rockchip,pins = 986 <0 RK_PA2 1 &pcfg_pull_none>; 987 }; 988 989 soc_slppin_rst: soc_slppin_rst { 990 rockchip,pins = 991 <0 RK_PA2 2 &pcfg_pull_none>; 992 }; 993 }; 994 995 sensor { 996 sensor_gpio:sensor-gpio { 997 rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 998 }; 999 1000 em3071x_irq_gpio: em3071x-irq-gpio { 1001 rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 1002 }; 1003 1004 mh248_irq_gpio: mh248-irq-gpio { 1005 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 1006 }; 1007 }; 1008 1009 sdio-pwrseq { 1010 wifi_enable_h: wifi-enable-h { 1011 rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, 1012 <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 1013 }; 1014 }; 1015 1016 wireless-wlan { 1017 wifi_host_wake_irq: wifi-host-wake-irq { 1018 rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; 1019 }; 1020 }; 1021 1022 wireless-bluetooth { 1023 uart1_gpios: uart1-gpios { 1024 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 1025 }; 1026 }; 1027}; 1028 1029&pmu_io_domains { 1030 status = "okay"; 1031 pmuio1-supply = <&vcc3v3_pmu>; 1032 pmuio2-supply = <&vcc3v3_pmu>; 1033 vccio1-supply = <&vccio_acodec>; 1034 vccio3-supply = <&vccio_sd>; 1035 vccio4-supply = <&vcca1v8_pmu>; 1036 vccio5-supply = <&vcc_1v8>; 1037 vccio6-supply = <&vcc1v8_dvp>; 1038 vccio7-supply = <&vccio_acodec>; 1039}; 1040 1041&pwm4 { 1042 status = "okay"; 1043}; 1044 1045&rkisp { 1046 status = "okay"; 1047}; 1048 1049&rkisp_mmu { 1050 status = "okay"; 1051}; 1052 1053&rkisp_vir0 { 1054 status = "okay"; 1055 1056 port { 1057 #address-cells = <1>; 1058 #size-cells = <0>; 1059 1060 isp0_in: endpoint@0 { 1061 reg = <0>; 1062 remote-endpoint = <&csidphy0_out>; 1063 }; 1064 }; 1065}; 1066 1067&rknpu { 1068 memory-region = <&rknpu_reserved>; 1069 rknpu-supply = <&vdd_gpu>; 1070 status = "okay"; 1071}; 1072 1073&rknpu_mmu { 1074 status = "disabled"; 1075}; 1076 1077&rk_rga { 1078 status = "okay"; 1079}; 1080 1081&rkvdec { 1082 status = "okay"; 1083}; 1084 1085&rkvdec_mmu { 1086 status = "okay"; 1087}; 1088 1089&rkvenc { 1090 status = "okay"; 1091}; 1092 1093&rkvenc_mmu { 1094 status = "okay"; 1095}; 1096 1097&route_dsi0 { 1098 status = "okay"; 1099}; 1100 1101&saradc { 1102 status = "okay"; 1103 vref-supply = <&vcc_1v8>; 1104}; 1105 1106&sdhci { 1107 bus-width = <8>; 1108 no-sdio; 1109 no-sd; 1110 non-removable; 1111 max-frequency = <200000000>; 1112 status = "okay"; 1113}; 1114 1115&sdmmc1 { 1116 max-frequency = <150000000>; 1117 no-sd; 1118 no-mmc; 1119 bus-width = <4>; 1120 disable-wp; 1121 cap-sd-highspeed; 1122 cap-sdio-irq; 1123 keep-power-in-suspend; 1124 mmc-pwrseq = <&sdio_pwrseq>; 1125 non-removable; 1126 pinctrl-names = "default"; 1127 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 1128 sd-uhs-sdr104; 1129 rockchip,default-sample-phase = <90>; 1130 status = "okay"; 1131}; 1132 1133&tsadc { 1134 status = "okay"; 1135}; 1136 1137&uart1 { 1138 status = "okay"; 1139 pinctrl-names = "default"; 1140 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; 1141}; 1142 1143&u2phy0_otg { 1144 status = "okay"; 1145}; 1146 1147&usb2phy0 { 1148 status = "okay"; 1149}; 1150 1151&usbdrd_dwc3 { 1152 status = "okay"; 1153}; 1154 1155&usbdrd30 { 1156 status = "okay"; 1157}; 1158 1159&vdpu { 1160 status = "okay"; 1161}; 1162 1163&vdpu_mmu { 1164 status = "okay"; 1165}; 1166 1167&vepu { 1168 status = "okay"; 1169}; 1170 1171&vepu_mmu { 1172 status = "okay"; 1173}; 1174 1175&vop { 1176 status = "okay"; 1177}; 1178 1179&vop_mmu { 1180 status = "okay"; 1181}; 1182