1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/input/rk-input.h> 12#include <dt-bindings/sensor-dev.h> 13#include <dt-bindings/display/drm_mipi_dsi.h> 14#include "rk3566.dtsi" 15#include "rk3568-android.dtsi" 16#include "rk3566-eink.dtsi" 17 18/ { 19 model = "Rockchip RK3566 RK817 EINK W6 LP4X Board"; 20 compatible = "rockchip,rk3566-rk817-eink-W6", "rockchip,rk3566"; 21 22 charge-animation { 23 compatible = "rockchip,uboot-charge"; 24 rockchip,uboot-charge-on = <1>; 25 rockchip,android-charge-on = <0>; 26 rockchip,uboot-low-power-voltage = <3350>; 27 rockchip,screen-on-voltage = <3400>; 28 rockchip,auto-wakeup-interval = <60>; 29 status = "okay"; 30 }; 31 32 adc_keys: adc-keys { 33 status = "disabled"; 34 compatible = "adc-keys"; 35 io-channels = <&saradc 0>; 36 io-channel-names = "buttons"; 37 keyup-threshold-microvolt = <1800000>; 38 poll-interval = <100>; 39 40 vol-up-key { 41 label = "volume up"; 42 linux,code = <KEY_VOLUMEUP>; 43 press-threshold-microvolt = <1750>; 44 }; 45 }; 46 47 hdmi_sound: hdmi-sound { 48 compatible = "simple-audio-card"; 49 simple-audio-card,format = "i2s"; 50 simple-audio-card,mclk-fs = <128>; 51 simple-audio-card,name = "rockchip,hdmi"; 52 status = "disabled"; 53 54 simple-audio-card,cpu { 55 sound-dai = <&i2s0_8ch>; 56 }; 57 simple-audio-card,codec { 58 sound-dai = <&hdmi>; 59 }; 60 }; 61 62 leds: gpio-leds { 63 compatible = "gpio-leds"; 64 pinctrl-names = "default"; 65 pinctrl-0 =<&leds_gpio>; 66 67 led@1 { 68 gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; 69 linux,default-trigger = "battery-full"; 70 label = "battery_full"; 71 retain-state-suspended; 72 }; 73 74 led@2 { 75 gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 76 linux,default-trigger = "battery-charging"; 77 label = "battery_charging"; 78 retain-state-suspended; 79 }; 80 }; 81 82 vccsys: vccsys { 83 compatible = "regulator-fixed"; 84 regulator-name = "vcc3v8_sys"; 85 regulator-always-on; 86 regulator-boot-on; 87 regulator-min-microvolt = <3800000>; 88 regulator-max-microvolt = <3800000>; 89 }; 90 91 vcc_camera: vcc-camera-regulator { 92 compatible = "regulator-fixed"; 93 gpio = <&gpio4 RK_PC3 GPIO_ACTIVE_HIGH>; 94 pinctrl-names = "default"; 95 pinctrl-0 = <&camera_rst>; 96 regulator-name = "vcc_camera"; 97 enable-active-high; 98 regulator-always-on; 99 regulator-boot-on; 100 }; 101 102 vcc_tp: vcc-tp-regulator { 103 compatible = "regulator-fixed"; 104 enable-active-high; 105 gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; 106 pinctrl-names = "default"; 107 pinctrl-0 = <&vcc_tp_en>; 108 regulator-name = "vcc_tp"; 109 }; 110 111 dummy_codec: dummy-codec { 112 compatible = "rockchip,dummy-codec"; 113 #sound-dai-cells = <0>; 114 }; 115 116 mic_sound: mic-sound { 117 compatible = "simple-audio-card"; 118 simple-audio-card,name = "rockchip,rk-mic-sound"; 119 simple-audio-card,cpu { 120 sound-dai = <&i2s1_8ch>; 121 }; 122 simple-audio-card,codec { 123 sound-dai = <&dummy_codec>; 124 }; 125 }; 126 127 sdio_pwrseq: sdio-pwrseq { 128 compatible = "mmc-pwrseq-simple"; 129 clocks = <&rk817 1>; 130 clock-names = "ext_clock"; 131 pinctrl-names = "default"; 132 pinctrl-0 = <&wifi_enable_h>; 133 134 /* 135 * On the module itself this is one of these (depending 136 * on the actual card populated): 137 * - SDIO_RESET_L_WL_REG_ON 138 * - PDN (power down when low) 139 */ 140 post-power-on-delay-ms = <200>; 141 reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_LOW>; 142 }; 143 144 wireless-wlan { 145 compatible = "wlan-platdata"; 146 rockchip,grf = <&grf>; 147 wifi_chip_type = "ap6255"; 148 pinctrl-names = "default"; 149 pinctrl-0 = <&wifi_vbat &wifi_host_wake_irq>; 150 WIFI,vbat_gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; 151 WIFI,host_wake_irq = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 152 status = "okay"; 153 }; 154 155 wireless-bluetooth { 156 compatible = "bluetooth-platdata"; 157 clocks = <&rk817 1>; 158 clock-names = "ext_clock"; 159 wifi-bt-power-toggle; 160 uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; 161 pinctrl-names = "default", "rts_gpio"; 162 pinctrl-0 = <&uart1m0_rtsn>; 163 pinctrl-1 = <&uart1_gpios>; 164 BT,reset_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 165 BT,wake_gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; 166 BT,wake_host_irq = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; 167 status = "okay"; 168 }; 169}; 170 171&ebc { 172 /* clock rate 1000M/n, (n=1~32) */ 173 assigned-clocks = <&cru CPLL_333M>, <&cru DCLK_EBC>; 174 assigned-clock-rates = <85000000>, <85000000>; 175 status = "okay"; 176}; 177 178&ebc_dev { 179 pmic = <&tps65185>; 180 status = "okay"; 181 182 /* ED060XCD */ 183 panel,width = <1024>; 184 panel,height = <758>; 185 panel,vir_width = <1024>; 186 panel,vir_height = <758>; 187 panel,sdck = <20000000>; 188 panel,lsl = <6>; 189 panel,lbl = <6>; 190 panel,ldl = <256>; 191 panel,lel = <38>; 192 panel,gdck-sta = <4>; 193 panel,lgonl = <262>; 194 panel,fsl = <2>; 195 panel,fbl = <4>; 196 panel,fdl = <758>; 197 panel,fel = <5>; 198 panel,mirror = <0>; 199 panel,panel_16bit = <0>; 200 panel,panel_color = <0>; 201 panel,width-mm = <90>; 202 panel,height-mm = <122>; 203}; 204 205&cpu0 { 206 cpu-supply = <&vdd_cpu>; 207}; 208 209&csi2_dphy_hw { 210 status = "okay"; 211}; 212 213&csi2_dphy0 { 214 status = "okay"; 215 216 ports { 217 #address-cells = <1>; 218 #size-cells = <0>; 219 port@0 { 220 reg = <0>; 221 #address-cells = <1>; 222 #size-cells = <0>; 223 224 mipi_in_ucam0: endpoint@0 { 225 reg = <0>; 226 remote-endpoint = <&ov5648_out>; 227 data-lanes = <1 2>; 228 }; 229 }; 230 port@1 { 231 reg = <1>; 232 #address-cells = <1>; 233 #size-cells = <0>; 234 235 csidphy0_out: endpoint@0 { 236 reg = <0>; 237 remote-endpoint = <&isp0_in>; 238 }; 239 }; 240 }; 241}; 242 243&gpu { 244 mali-supply = <&vdd_gpu>; 245 status = "okay"; 246}; 247 248&hdmi { 249 status = "disabled"; 250}; 251 252&hdmi_in_vp0 { 253 status = "disabled"; 254}; 255 256&hdmi_in_vp1 { 257 status = "disabled"; 258}; 259 260&hdmi_sound { 261 status = "disabled"; 262}; 263 264&i2c0 { 265 status = "okay"; 266 267 vdd_cpu: tcs4525@1c { 268 compatible = "tcs,tcs4525"; 269 reg = <0x1c>; 270 vin-supply = <&vccsys>; 271 regulator-compatible = "fan53555-reg"; 272 regulator-name = "vdd_cpu"; 273 regulator-min-microvolt = <712500>; 274 regulator-max-microvolt = <1390000>; 275 regulator-init-microvolt = <900000>; 276 regulator-ramp-delay = <2300>; 277 fcs,suspend-voltage-selector = <0>; 278 regulator-boot-on; 279 regulator-always-on; 280 regulator-initial-mode = <0x2>; 281 regulator-state-mem { 282 regulator-on-in-suspend; 283 regulator-suspend-microvolt = <1100000>; 284 regulator-changeable-in-suspend; 285 }; 286 }; 287 288 rk817: pmic@20 { 289 compatible = "rockchip,rk817"; 290 reg = <0x20>; 291 interrupt-parent = <&gpio0>; 292 interrupts = <3 IRQ_TYPE_LEVEL_LOW>; 293 pinctrl-names = "default"; 294// pinctrl-names = "default", "pmic-sleep", 295// "pmic-power-off", "pmic-reset"; 296 pinctrl-0 = <&pmic_int>; 297// pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 298// pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 299// pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; 300 rockchip,system-power-controller; 301 wakeup-source; 302 #clock-cells = <1>; 303 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 304 //fb-inner-reg-idxs = <2>; 305 /* 1: rst regs (default in codes), 0: rst the pmic */ 306 pmic-reset-func = <0>; 307 /* not save the PMIC_POWER_EN register in uboot */ 308 not-save-power-en = <1>; 309 vcc1-supply = <&vccsys>; 310 vcc2-supply = <&vccsys>; 311 vcc3-supply = <&vccsys>; 312 vcc4-supply = <&vccsys>; 313 vcc5-supply = <&vccsys>; 314 vcc6-supply = <&vccsys>; 315 vcc7-supply = <&vccsys>; 316 vcc8-supply = <&vccsys>; 317 vcc9-supply = <&dcdc_boost>; 318 319 pwrkey { 320 status = "okay"; 321 }; 322 323 pinctrl_rk8xx: pinctrl_rk8xx { 324 gpio-controller; 325 #gpio-cells = <2>; 326 327 rk817_slppin_null: rk817_slppin_null { 328 pins = "gpio_slp"; 329 function = "pin_fun0"; 330 }; 331 332 rk817_slppin_slp: rk817_slppin_slp { 333 pins = "gpio_slp"; 334 function = "pin_fun1"; 335 }; 336 337 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 338 pins = "gpio_slp"; 339 function = "pin_fun2"; 340 }; 341 342 rk817_slppin_rst: rk817_slppin_rst { 343 pins = "gpio_slp"; 344 function = "pin_fun3"; 345 }; 346 }; 347 348 regulators { 349 vdd_logic: DCDC_REG1 { 350 regulator-always-on; 351 regulator-boot-on; 352 regulator-min-microvolt = <500000>; 353 regulator-max-microvolt = <1350000>; 354 regulator-init-microvolt = <900000>; 355 regulator-ramp-delay = <6001>; 356 regulator-initial-mode = <0x2>; 357 regulator-name = "vdd_logic"; 358 regulator-state-mem { 359 regulator-off-in-suspend; 360 regulator-suspend-microvolt = <900000>; 361 regulator-changeable-in-suspend; 362 }; 363 }; 364 365 vdd_gpu: DCDC_REG2 { 366 regulator-always-on; 367 regulator-boot-on; 368 regulator-min-microvolt = <500000>; 369 regulator-max-microvolt = <1350000>; 370 regulator-init-microvolt = <900000>; 371 regulator-ramp-delay = <6001>; 372 regulator-initial-mode = <0x2>; 373 regulator-name = "vdd_gpu"; 374 regulator-state-mem { 375 regulator-off-in-suspend; 376 regulator-changeable-in-suspend; 377 }; 378 }; 379 380 vcc_ddr: DCDC_REG3 { 381 regulator-always-on; 382 regulator-boot-on; 383 regulator-initial-mode = <0x2>; 384 regulator-name = "vcc_ddr"; 385 regulator-state-mem { 386 regulator-on-in-suspend; 387 }; 388 }; 389 390 vcc_3v3: DCDC_REG4 { 391 regulator-always-on; 392 regulator-boot-on; 393 regulator-min-microvolt = <3300000>; 394 regulator-max-microvolt = <3300000>; 395 regulator-initial-mode = <0x2>; 396 regulator-name = "vcc_3v3"; 397 regulator-state-mem { 398 regulator-off-in-suspend; 399 regulator-changeable-in-suspend; 400 }; 401 }; 402 403 vcca1v8_pmu: LDO_REG1 { 404 regulator-always-on; 405 regulator-boot-on; 406 regulator-min-microvolt = <1800000>; 407 regulator-max-microvolt = <1800000>; 408 regulator-name = "vcca1v8_pmu"; 409 regulator-state-mem { 410 regulator-on-in-suspend; 411 regulator-suspend-microvolt = <1800000>; 412 regulator-changeable-in-suspend; 413 }; 414 }; 415 416 vdda_0v9: LDO_REG2 { 417 regulator-always-on; 418 regulator-boot-on; 419 regulator-min-microvolt = <900000>; 420 regulator-max-microvolt = <900000>; 421 regulator-name = "vdda_0v9"; 422 regulator-state-mem { 423 regulator-off-in-suspend; 424 regulator-changeable-in-suspend; 425 }; 426 }; 427 428 vdda0v9_pmu: LDO_REG3 { 429 regulator-always-on; 430 regulator-boot-on; 431 regulator-min-microvolt = <900000>; 432 regulator-max-microvolt = <900000>; 433 regulator-name = "vdda0v9_pmu"; 434 regulator-state-mem { 435 regulator-on-in-suspend; 436 regulator-suspend-microvolt = <900000>; 437 regulator-changeable-in-suspend; 438 }; 439 }; 440 441 vccio_acodec: LDO_REG4 { 442 regulator-always-on; 443 regulator-boot-on; 444 regulator-min-microvolt = <3300000>; 445 regulator-max-microvolt = <3300000>; 446 regulator-name = "vccio_acodec"; 447 regulator-state-mem { 448 regulator-off-in-suspend; 449 regulator-changeable-in-suspend; 450 }; 451 }; 452 453 vccio_sd: LDO_REG5 { 454 regulator-min-microvolt = <1800000>; 455 regulator-max-microvolt = <3300000>; 456 regulator-name = "vccio_sd"; 457 regulator-state-mem { 458 regulator-off-in-suspend; 459 regulator-changeable-in-suspend; 460 }; 461 }; 462 463 vcc3v3_pmu: LDO_REG6 { 464 regulator-always-on; 465 regulator-boot-on; 466 regulator-min-microvolt = <3300000>; 467 regulator-max-microvolt = <3300000>; 468 regulator-name = "vcc3v3_pmu"; 469 regulator-state-mem { 470 regulator-on-in-suspend; 471 regulator-suspend-microvolt = <3000000>; 472 regulator-changeable-in-suspend; 473 }; 474 }; 475 476 vcc_1v8: LDO_REG7 { 477 regulator-always-on; 478 regulator-boot-on; 479 regulator-min-microvolt = <1800000>; 480 regulator-max-microvolt = <1800000>; 481 regulator-name = "vcc_1v8"; 482 regulator-state-mem { 483 regulator-off-in-suspend; 484 regulator-changeable-in-suspend; 485 }; 486 }; 487 488 vcc1v8_dvp: LDO_REG8 { 489 regulator-min-microvolt = <1800000>; 490 regulator-max-microvolt = <1800000>; 491 regulator-name = "vcc1v8_dvp"; 492 regulator-state-mem { 493 regulator-off-in-suspend; 494 regulator-changeable-in-suspend; 495 }; 496 }; 497 498 sleep_sta_ctl: LDO_REG9 { 499 regulator-name = "sleep_sta_ctl"; 500 regulator-state-mem { 501 regulator-on-in-suspend; 502 regulator-suspend-microvolt = <3300000>; 503 regulator-changeable-in-suspend; 504 }; 505 }; 506 507 dcdc_boost: BOOST { 508 regulator-always-on; 509 regulator-boot-on; 510 regulator-min-microvolt = <4700000>; 511 regulator-max-microvolt = <5400000>; 512 regulator-name = "boost"; 513 regulator-state-mem { 514 regulator-off-in-suspend; 515 regulator-changeable-in-suspend; 516 }; 517 }; 518 519 otg_switch: OTG_SWITCH { 520 regulator-name = "otg_switch"; 521 regulator-state-mem { 522 regulator-off-in-suspend; 523 regulator-changeable-in-suspend; 524 }; 525 }; 526 }; 527 528 battery { 529 compatible = "rk817,battery"; 530 ocv_table = <3400 3513 3578 3687 3734 3752 3763 531 3766 3771 3784 3804 3836 3885 3925 532 3962 4005 4063 4114 4169 4227 4303>; 533 design_capacity = <2250>; 534 design_qmax = <2750>; 535 bat_res = <100>; 536 sleep_enter_current = <150>; 537 sleep_exit_current = <180>; 538 sleep_filter_current = <100>; 539 power_off_thresd = <3450>; 540 zero_algorithm_vol = <3850>; 541 max_soc_offset = <60>; 542 monitor_sec = <5>; 543 sample_res = <10>; 544 virtual_power = <0>; 545 low_power_sleep = <1>; 546 }; 547 548 charger { 549 compatible = "rk817,charger"; 550 min_input_voltage = <4500>; 551 max_input_current = <1500>; 552 max_chrg_current = <2000>; 553 max_chrg_voltage = <4300>; 554 chrg_term_mode = <0>; 555 chrg_finish_cur = <300>; 556 virtual_power = <0>; 557 dc_det_adc = <0>; 558 extcon = <&usb2phy0>; 559 gate_function_disable = <1>; 560 }; 561 }; 562}; 563 564&i2c1 { 565 status = "okay"; 566 567 ov5648: ov5648@36 { 568 status = "okay"; 569 compatible = "ovti,ov5648"; 570 reg = <0x36>; 571 clocks = <&cru CLK_CAM0_OUT>; 572 clock-names = "xvclk"; 573 /* avdd-supply = <&vcc2v8_dvp>; */ 574 dovdd-supply = <&vcc1v8_dvp>; 575 /* dvdd-supply = <&vcc1v8_dvp>; */ 576 577 power-domains = <&power RK3568_PD_VI>; 578 pinctrl-names = "default"; 579 pinctrl-0 = <&cam_clkout0>; 580 //reset pin control by hardware,used this pin switch to mipi input 581 //1->2LANE(LANE 0&1) FRONT camera, 0->4LANE REAR camera 582 //reset-gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; 583 pwdn-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; 584 rockchip,camera-module-index = <0>; 585 rockchip,camera-module-facing = "back"; 586 rockchip,camera-module-name = "HS5885-BNSM1018-V01"; 587 rockchip,camera-module-lens-name = "default"; 588 port { 589 ov5648_out: endpoint { 590 remote-endpoint = <&mipi_in_ucam0>; 591 data-lanes = <1 2>; 592 }; 593 }; 594 }; 595}; 596 597&i2c3 { 598 status = "okay"; 599 pinctrl-names = "default"; 600 pinctrl-0 = <&i2c3m1_xfer>; 601 602 tps65185: tps65185@68 { 603 compatible = "ti,tps65185"; 604 reg = <0x68>; 605 pinctrl-names = "default"; 606 pinctrl-0 = <&tps65185_gpio>; 607 int-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; 608 wakeup-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; 609 vcomctl-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; 610 powerup-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; 611 poweren-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 612 }; 613 614}; 615 616&i2c5 { 617 status = "okay"; 618 619 sensor@4c { 620 status = "okay"; 621 compatible = "gs_mma7660"; 622 reg = <0x4c>; 623 type = <SENSOR_TYPE_ACCEL>; 624 irq_enable = <0>; 625 poll_delay_ms = <30>; 626 layout = <6>; 627 reprobe_en = <1>; 628 }; 629 630 gt9xx: gt9xx@14 { 631 compatible = "goodix,gt9xx"; 632 reg = <0x14>; 633 pinctrl-names = "default"; 634 pinctrl-0 = <&tp_gpio>; 635 touch-gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 636 reset-gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 637 touchscreen-size-x = <1024>; 638 touchscreen-size-y = <758>; 639 max-x = <1024>; 640 max-y = <758>; 641 tp-size = <9111>; 642 tp-supply = <&vcc_tp>; 643 wakeup-source; 644 touchscreen-key-map = <158>; //KEY_HOMEPAGE=172,KEY_BACK=158,KEY_MENU=139 645 goodix,driver-send-cfg = <0>; 646 goodix,cfg-group0 =[ 647 42 00 03 00 04 0A 45 03 22 1F 28 0F 64 3C 03 0F 00 00 00 00 11 00 648 08 00 00 00 00 8B 29 0E 71 6F B2 04 00 00 00 39 02 10 00 21 00 00 649 00 03 64 32 00 00 00 3C 78 94 D5 02 07 00 00 04 C8 40 00 B1 4A 00 650 9E 55 00 8E 61 00 7F 70 00 7F 70 00 00 00 F0 90 3C FF FF 07 00 00 651 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 652 00 00 1C 1A 18 16 14 12 10 0E 0C 0A 08 06 04 02 FF FF FF FF FF FF 653 FF FF FF FF FF FF FF FF FF FF 00 02 04 06 08 0A 0C 0F 10 12 13 16 654 18 1C 1D 1E 1F 20 21 22 FF FF FF FF FF FF FF FF FF FF FF FF FF FF 655 FF FF FF FF FF FF FF FF F6 01 656 ]; 657 }; 658 659 ft5436: focaltech@38 { 660 status = "okay"; 661 compatible = "focaltech,ft5436"; 662 reg = <0x38>; 663 pinctrl-names = "default"; 664 pinctrl-0 = <&tp_gpio>; 665 vdd-supply = <&vcc_tp>; 666 focaltech,reset-gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 667 focaltech,irq-gpio = <&gpio0 RK_PA6 IRQ_TYPE_EDGE_FALLING>; 668 focaltech,max-touch-number = <5>; 669 focaltech,display-coords = <0 0 1024 758>; 670 focaltech,have-key = <1>; 671 focaltech,key-number = <1>; 672 673 focaltech,key-x-coords = <300>; 674 focaltech,key-y-coords = <1200>; 675 wakeup-source; 676 }; 677}; 678 679&i2s0_8ch { 680 status = "disabled"; 681}; 682 683&i2s1_8ch { 684 status = "okay"; 685 rockchip,clk-trcm = <1>; 686 pinctrl-names = "default"; 687 pinctrl-0 = <&i2s1m0_sclktx 688 &i2s1m0_lrcktx 689 &i2s1m0_sdi0 690 &i2s1m0_sdo0>; 691}; 692 693&jpegd { 694 status = "okay"; 695}; 696 697&jpegd_mmu { 698 status = "okay"; 699}; 700 701&video_phy0 { 702 status = "disabled"; 703}; 704 705&mpp_srv { 706 status = "okay"; 707}; 708 709&nandc0 { 710 status = "disabled"; 711}; 712 713&pinctrl { 714 cam { 715 cam_clkout0: cam-clkout0 { 716 rockchip,pins = 717 /* cam_clkout0 */ 718 <4 RK_PA7 1 &pcfg_pull_none>; 719 }; 720 721 camera_rst: camera-rst { 722 rockchip,pins = 723 <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 724 }; 725 }; 726 727 leds { 728 leds_gpio: leds-gpio { 729 rockchip,pins = 730 <3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, 731 <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; 732 }; 733 }; 734 735 tps_pmic { 736 tps65185_gpio: tps65185-gpio { 737 rockchip,pins = 738 <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, 739 <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 740 <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 741 <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>, 742 <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_high>; 743 }; 744 }; 745 746 tp { 747 tp_gpio: tp-gpio { 748 rockchip,pins = 749 <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 750 <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; 751 }; 752 }; 753 754 pmic { 755 pmic_int: pmic_int { 756 rockchip,pins = 757 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 758 }; 759 760 soc_slppin_gpio: soc_slppin_gpio { 761 rockchip,pins = 762 <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; 763 }; 764 765 soc_slppin_slp: soc_slppin_slp { 766 rockchip,pins = 767 <0 RK_PA2 1 &pcfg_pull_none>; 768 }; 769 770 soc_slppin_rst: soc_slppin_rst { 771 rockchip,pins = 772 <0 RK_PA2 2 &pcfg_pull_none>; 773 }; 774 }; 775 776 sdio-pwrseq { 777 wifi_enable_h: wifi-enable-h { 778 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 779 }; 780 }; 781 782 vcc-tp { 783 vcc_tp_en: vcc-tp-en { 784 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; 785 }; 786 }; 787 788 wireless-wlan { 789 wifi_vbat: wifi-vbat { 790 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 791 }; 792 793 wifi_host_wake_irq: wifi-host-wake-irq { 794 rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>; 795 }; 796 }; 797 798 wireless-bluetooth { 799 uart1_gpios: uart1-gpios { 800 rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 801 }; 802 }; 803}; 804 805&pmu_io_domains { 806 status = "okay"; 807 pmuio1-supply = <&vcc3v3_pmu>; 808 pmuio2-supply = <&vcca1v8_pmu>; 809 vccio1-supply = <&vccio_acodec>; 810 vccio3-supply = <&vcc_3v3>; 811 vccio4-supply = <&vcca1v8_pmu>; 812 vccio5-supply = <&vcc_3v3>; 813 vccio6-supply = <&vcc_3v3>; 814 vccio7-supply = <&vcc1v8_dvp>; 815}; 816 817&pwm4 { 818 status = "disabled"; 819}; 820 821&rk_rga { 822 status = "okay"; 823}; 824 825&rkisp { 826 status = "okay"; 827}; 828 829&rkisp_mmu { 830 status = "okay"; 831}; 832 833&rkisp_vir0 { 834 status = "okay"; 835 836 port { 837 #address-cells = <1>; 838 #size-cells = <0>; 839 840 isp0_in: endpoint@0 { 841 reg = <0>; 842 remote-endpoint = <&csidphy0_out>; 843 }; 844 }; 845}; 846 847&rkvdec { 848 status = "okay"; 849}; 850 851&rkvdec_mmu { 852 status = "okay"; 853}; 854 855&rkvenc { 856 status = "okay"; 857}; 858 859&rkvenc_mmu { 860 status = "okay"; 861}; 862 863&rockchip_suspend { 864 status = "okay"; 865 866 rockchip,regulator-off-in-mem-lite = 867 <&vdd_cpu>, <&vdd_logic>, <&vdd_gpu>, <&vcc_3v3>, <&vdda_0v9>, <&vcc_1v8>, 868 <&vccio_acodec>, <&vccio_sd>, <&vcc1v8_dvp>, <&dcdc_boost>, <&otg_switch>, 869 <&sleep_sta_ctl>; 870 rockchip,regulator-on-in-mem-lite = 871 <&vcc_ddr>, <&vdda0v9_pmu>, <&vcca1v8_pmu>, <&vcc3v3_pmu>; 872 873 rockchip,regulator-off-in-mem = 874 <&vdd_cpu>, <&vdd_logic>, <&vdd_gpu>, <&vcc_3v3>, <&vdda_0v9>, <&vcc_1v8>, 875 <&vccio_acodec>, <&vccio_sd>, <&vcc1v8_dvp>, <&dcdc_boost>, <&otg_switch>, 876 <&sleep_sta_ctl>; 877 rockchip,regulator-on-in-mem = 878 <&vcc_ddr>, <&vdda0v9_pmu>, <&vcca1v8_pmu>, <&vcc3v3_pmu>; 879 880 rockchip,regulator-off-in-mem-ultra = 881 <&vdd_logic>, <&vdd_gpu>, <&vcc_ddr>, <&vcc_3v3>, <&vdda_0v9>, <&vcc_1v8>, 882 <&vdda0v9_pmu>, <&vcca1v8_pmu>, <&vcc3v3_pmu>, <&vccio_acodec>, <&vccio_sd>, 883 <&vcc1v8_dvp>, <&dcdc_boost>, <&otg_switch>; 884 rockchip,regulator-on-in-mem-ultra = <&vdd_cpu>, <&sleep_sta_ctl>; 885}; 886 887&saradc { 888 status = "disabled"; 889 vref-supply = <&vcc_1v8>; 890}; 891 892&sdhci { 893 bus-width = <8>; 894 no-sdio; 895 no-sd; 896 non-removable; 897 keep-power-in-suspend; 898 max-frequency = <200000000>; 899 status = "okay"; 900}; 901 902&sdmmc1 { 903 max-frequency = <150000000>; 904 no-sd; 905 no-mmc; 906 bus-width = <4>; 907 disable-wp; 908 cap-sd-highspeed; 909 cap-sdio-irq; 910 keep-power-in-suspend; 911 mmc-pwrseq = <&sdio_pwrseq>; 912 non-removable; 913 pinctrl-names = "default"; 914 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 915 sd-uhs-sdr104; 916 rockchip,default-sample-phase = <90>; 917 status = "okay"; 918}; 919 920&tsadc { 921 status = "okay"; 922}; 923 924&uart1 { 925 status = "okay"; 926 pinctrl-names = "default"; 927 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; 928}; 929 930&u2phy0_otg { 931 status = "okay"; 932}; 933 934&usb2phy0 { 935 status = "okay"; 936}; 937 938&usbdrd_dwc3 { 939 status = "okay"; 940}; 941 942&usbdrd30 { 943 status = "okay"; 944}; 945 946&vdpu { 947 status = "okay"; 948}; 949 950&vdpu_mmu { 951 status = "okay"; 952}; 953 954&vepu { 955 status = "okay"; 956}; 957 958&vepu_mmu { 959 status = "okay"; 960}; 961 962&vop { 963 status = "okay"; 964}; 965 966&vop_mmu { 967 status = "okay"; 968}; 969