xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3566-evb5-lp4x-v10.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/pinctrl/rockchip.h>
10#include "rk3566.dtsi"
11#include "rk3566-evb.dtsi"
12
13/ {
14	model = "Rockchip RK3566 EVB5 LP4X V10 Board";
15	compatible = "rockchip,rk3566-evb5-lp4x-v10", "rockchip,rk3566";
16
17	vcc3v3_pcie: gpio-regulator {
18		compatible = "regulator-fixed";
19		regulator-name = "vcc3v3_pcie";
20		regulator-min-microvolt = <3300000>;
21		regulator-max-microvolt = <3300000>;
22		enable-active-high;
23		gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
24		startup-delay-us = <5000>;
25		vin-supply = <&dc_12v>;
26	};
27
28	rk_headset: rk-headset {
29		compatible = "rockchip_headset";
30		headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>;
31		pinctrl-names = "default";
32		pinctrl-0 = <&hp_det>;
33	};
34
35	vcc3v3_vga: vcc3v3-vga {
36		compatible = "regulator-fixed";
37		regulator-name = "vcc3v3_vga";
38		regulator-always-on;
39		regulator-boot-on;
40		gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
41		enable-active-high;
42		vin-supply = <&vcc3v3_sys>;
43	};
44};
45
46&audiopwmout_diff {
47	status = "disabled";
48};
49
50&bt_sound {
51	status = "disabled";
52	simple-audio-card,cpu {
53		sound-dai = <&i2s2_2ch>;
54	};
55};
56
57&combphy1_usq {
58	status = "okay";
59};
60
61&combphy2_psq {
62	status = "disabled";
63};
64
65&dig_acodec {
66	status = "disabled";
67	rockchip,pwm-output-mode;
68	pinctrl-names = "default";
69	pinctrl-0 = <&audiopwm_loutp
70		&audiopwm_loutn
71		&audiopwm_routp
72		&audiopwm_routn
73	>;
74};
75
76/*
77 * video_phy0 needs to be enabled
78 * when dsi0 is enabled
79 */
80&dsi0 {
81	status = "okay";
82	connect = <&vp1_out_dsi0>;
83};
84
85&dsi0_in_vp0 {
86	status = "disabled";
87};
88
89&dsi0_in_vp1 {
90	status = "okay";
91};
92
93&dsi0_panel {
94	power-supply = <&vcc3v3_lcd0_n>;
95	reset-gpios = <&gpio4 RK_PC5 GPIO_ACTIVE_LOW>;
96	pinctrl-names = "default";
97	pinctrl-0 = <&lcd0_rst_gpio>;
98};
99
100/*
101 * video_phy1 needs to be enabled
102 * when dsi1 is enabled
103 */
104&dsi1 {
105	status = "disabled";
106};
107
108&dsi1_in_vp0 {
109	status = "disabled";
110};
111
112&dsi1_in_vp1 {
113	status = "disabled";
114};
115
116&dsi1_panel {
117	power-supply = <&vcc3v3_lcd1_n>;
118	reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
119	pinctrl-names = "default";
120	pinctrl-0 = <&lcd1_rst_gpio>;
121};
122
123&edp {
124	hpd-gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
125	status = "disabled";
126};
127
128&edp_phy {
129	status = "disabled";
130};
131
132&edp_in_vp0 {
133	status = "disabled";
134};
135
136&edp_in_vp1 {
137	status = "disabled";
138};
139
140&gmac1 {
141	phy-mode = "rgmii";
142	clock_in_out = "output";
143
144	snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
145	snps,reset-active-low;
146	/* Reset time is 20ms, 100ms for rtl8211f */
147	snps,reset-delays-us = <0 20000 100000>;
148
149	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
150	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
151	assigned-clock-rates = <0>, <125000000>;
152
153	pinctrl-names = "default";
154	pinctrl-0 = <&gmac1m0_miim
155		     &gmac1m0_tx_bus2_level3
156		     &gmac1m0_rx_bus2
157		     &gmac1m0_rgmii_clk_level2
158		     &gmac1m0_rgmii_bus_level3>;
159
160	tx_delay = <0x41>;
161	rx_delay = <0x2e>;
162
163	phy-handle = <&rgmii_phy1>;
164	status = "disabled";
165};
166
167/*
168 * power-supply should switche to vcc3v3_lcd1_n
169 * when mipi panel is connected to dsi1.
170 */
171&gt1x {
172	power-supply = <&vcc3v3_lcd0_n>;
173};
174
175&i2c5 {
176	status = "disabled";
177};
178
179&i2s2_2ch {
180	pinctrl-0 = <&i2s2m0_sclktx &i2s2m0_lrcktx &i2s2m0_sdi &i2s2m0_sdo>;
181	rockchip,bclk-fs = <32>;
182	status = "disabled";
183};
184
185&i2s3_2ch {
186	status = "disabled";
187};
188
189&mdio1 {
190	rgmii_phy1: phy@0 {
191		compatible = "ethernet-phy-ieee802.3-c22";
192		reg = <0x0>;
193	};
194};
195
196&video_phy0 {
197	status = "okay";
198};
199
200&video_phy1 {
201	status = "disabled";
202};
203
204&pcie2x1 {
205	reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
206	vpcie3v3-supply = <&vcc3v3_pcie>;
207	status = "disabled";
208};
209
210&pdm {
211	status = "disabled";
212	pinctrl-names = "default";
213	pinctrl-0 = <&pdmm1_clk1
214		     &pdmm1_sdi1
215		     &pdmm1_sdi2
216		     &pdmm1_sdi3>;
217};
218
219&pdmics {
220	status = "disabled";
221};
222
223&pdm_mic_array {
224	status = "disabled";
225};
226
227&route_dsi0 {
228	status = "okay";
229};
230
231&sdmmc2 {
232	status = "disabled";
233};
234
235&uart1 {
236	status = "okay";
237	pinctrl-names = "default";
238	pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
239};
240
241&uart3 {
242	status = "disabled";
243};
244
245&uart4 {
246	status = "disabled";
247};
248
249&uart7 {
250	status = "disabled";
251};
252
253&usb_host0_ehci {
254	status = "okay";
255};
256
257&usb_host0_ohci {
258	status = "disabled";
259};
260
261&usb_host1_ehci {
262	status = "okay";
263};
264
265&usb_host1_ohci {
266	status = "disabled";
267};
268
269&vcc3v3_lcd0_n {
270	gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
271	enable-active-high;
272};
273
274&vcc3v3_lcd1_n {
275	gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
276	enable-active-high;
277};
278
279&wireless_bluetooth {
280	uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
281	pinctrl-names = "default", "rts_gpio";
282	pinctrl-0 = <&uart1m1_rtsn>;
283	pinctrl-1 = <&uart1_gpios>;
284	BT,reset_gpio    = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
285	BT,wake_gpio     = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
286	BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
287	status = "disabled";
288};
289
290&wireless_wlan {
291	pinctrl-names = "default";
292	pinctrl-0 = <&wifi_host_wake_irq>;
293	status = "disabled";
294};
295
296&work_led {
297	status = "disabled";
298};
299
300&pinctrl {
301	headphone {
302		hp_det: hp-det {
303			rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
304		};
305	};
306
307	lcd0 {
308		lcd0_rst_gpio: lcd0-rst-gpio {
309			rockchip,pins = <4 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
310		};
311	};
312
313	lcd1 {
314		lcd1_rst_gpio: lcd1-rst-gpio {
315			rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
316		};
317	};
318
319	wireless-wlan {
320		wifi_host_wake_irq: wifi-host-wake-irq {
321			rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
322		};
323	};
324
325	wireless-bluetooth {
326		uart1_gpios: uart1-gpios {
327			rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
328		};
329	};
330};
331