1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7#include <dt-bindings/display/media-bus-format.h>
8#include "rk3562-evb1-lp4x-v10.dtsi"
9#include "rk3562-android.dtsi"
10#include "rk3562-rk817.dtsi"
11
12
13/ {
14	model = "Rockchip RK3562 EVB1 LP4X V10 Board + RK EVB VOP3 RGB24BIT DISPLAY Ext Board";
15	compatible = "rockchip,rk3562-evb1-lp4x-v10-rgb-FX070-DHM11BOE-A", "rockchip,rk3562";
16
17	panel: panel {
18		compatible = "simple-panel";
19		bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
20		backlight = <&backlight>;
21		enable-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
22		enable-delay-ms = <20>;
23		reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
24		reset-value = <0>;
25		reset-delay-ms = <10>;
26		status = "okay";
27
28		display-timings {
29			native-mode = <&fx070_dhm11boe_timing>;
30
31			fx070_dhm11boe_timing: timing0 {
32				clock-frequency = <50000000>;
33				hactive = <1024>;
34				vactive = <600>;
35				hback-porch = <140>;
36				hfront-porch = <160>;
37				vback-porch = <20>;
38				vfront-porch = <20>;
39				hsync-len = <20>;
40				vsync-len = <2>; //value range <2~22>
41				hsync-active = <0>;
42				vsync-active = <0>;
43				de-active = <0>;
44				pixelclk-active = <0>;
45			};
46		};
47
48		port {
49			panel_in_rgb: endpoint {
50				remote-endpoint = <&rgb_out_panel>;
51			};
52		};
53	};
54};
55
56&backlight {
57	pwms = <&pwm9 0 25000 0>;
58	status = "okay";
59};
60
61&csi2_dphy0 {
62	status = "disabled";
63};
64
65&dsi {
66	status = "disabled";
67};
68
69/*
70 * The pins of gmac0/pcie2x1/pdm_codec and rgb are multiplexed
71 */
72&gmac0 {
73	status = "disabled";
74};
75
76&pcie2x1 {
77	status = "disabled";
78};
79
80&pdm_codec {
81	status = "disabled";
82};
83
84&pwm9 {
85	pinctrl-names = "active";
86	pinctrl-0 = <&pwm9m0_pins>;
87	status = "okay";
88};
89
90&rgb {
91	status = "okay";
92	pinctrl-0 = <&rgb666_pins>;
93
94	ports {
95		port@1 {
96			reg = <1>;
97
98			rgb_out_panel: endpoint {
99				remote-endpoint = <&panel_in_rgb>;
100			};
101		};
102	};
103};
104
105&rgb_in_vp0 {
106	status = "okay";
107};
108
109&route_rgb {
110	status = "okay";
111	connect = <&vp0_out_rgb>;
112};
113
114/*
115 * The pins of sai0/vcc_mipicsi0 and rgb are multiplexed
116 */
117&sai0 {
118	status = "disabled";
119};
120
121&vcc_mipicsi0 {
122	status = "disabled";
123};
124
125&video_phy {
126	status = "disabled";
127};
128