xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3562-evb1-lp4x-v10-lvds.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7#include <dt-bindings/display/media-bus-format.h>
8#include "rk3562-evb1-lp4x-v10.dtsi"
9#include "rk3562-android.dtsi"
10#include "rk3562-rk817.dtsi"
11
12
13/ {
14	panel-lvds {
15		compatible = "simple-panel";
16		status = "okay";
17		backlight = <&backlight>;
18		reset-delay-ms = <20>;
19		enable-delay-ms = <20>;
20		prepare-delay-ms = <20>;
21		unprepare-delay-ms = <20>;
22		disable-delay-ms = <20>;
23		bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_SPWG>;
24		width-mm = <164>;
25		height-mm = <100>;
26
27		power-supply = <&vcc3v3_lcd_n>;
28		reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
29		pinctrl-names = "default";
30		pinctrl-0 = <&lcd_rst_gpio>;
31
32		display-timings {
33			native-mode = <&timing0>;
34
35			timing0: timing0 {
36				clock-frequency = <27000000>;
37				hactive = <1024>;
38				vactive = <600>;
39				hback-porch = <160>;
40				hfront-porch = <160>;
41				vback-porch = <20>;
42				vfront-porch = <15>;
43				hsync-len = <6>;
44				vsync-len = <5>;
45				hsync-active = <0>;
46				vsync-active = <0>;
47				de-active = <0>;
48				pixelclk-active = <0>;
49			};
50		};
51
52		ports {
53			#address-cells = <1>;
54			#size-cells = <0>;
55
56			port@0 {
57				reg = <0>;
58				panel_in_lvds: endpoint {
59					remote-endpoint = <&lvds_out_panel>;
60				};
61			};
62		};
63	};
64
65};
66
67&backlight {
68	pwms = <&pwm5 0 25000 0>;
69	status = "okay";
70};
71
72&dsi {
73	status = "disabled";
74};
75
76&lvds {
77	status = "okay";
78
79	ports {
80		port@1 {
81			reg = <1>;
82
83			lvds_out_panel: endpoint {
84				remote-endpoint = <&panel_in_lvds>;
85			};
86		};
87	};
88};
89
90&lvds_in_vp0 {
91	status = "okay";
92};
93
94&pinctrl {
95	lcd {
96		lcd_rst_gpio: lcd-rst-gpio {
97			rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
98		};
99	};
100};
101
102&pwm5 {
103	pinctrl-names = "active";
104	pinctrl-0 = <&pwm5m0_pins>;
105	status = "okay";
106};
107
108&vcc3v3_lcd_n {
109	gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
110	enable-active-high;
111	status = "okay";
112};
113
114&video_phy {
115	status = "okay";
116};
117