1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7/dts-v1/; 8 9#include "rk3399-excavator-sapphire.dtsi" 10#include "rk3399-linux.dtsi" 11#include <dt-bindings/input/input.h> 12 13/ { 14 model = "Rockchip RK3399 Excavator Board (Linux Opensource)"; 15 compatible = "rockchip,rk3399-excavator-linux", "rockchip,rk3399"; 16 17 backlight: backlight { 18 compatible = "pwm-backlight"; 19 brightness-levels = < 20 0 1 2 3 4 5 6 7 21 8 9 10 11 12 13 14 15 22 16 17 18 19 20 21 22 23 23 24 25 26 27 28 29 30 31 24 32 33 34 35 36 37 38 39 25 40 41 42 43 44 45 46 47 26 48 49 50 51 52 53 54 55 27 56 57 58 59 60 61 62 63 28 64 65 66 67 68 69 70 71 29 72 73 74 75 76 77 78 79 30 80 81 82 83 84 85 86 87 31 88 89 90 91 92 93 94 95 32 96 97 98 99 100 101 102 103 33 104 105 106 107 108 109 110 111 34 112 113 114 115 116 117 118 119 35 120 121 122 123 124 125 126 127 36 128 129 130 131 132 133 134 135 37 136 137 138 139 140 141 142 143 38 144 145 146 147 148 149 150 151 39 152 153 154 155 156 157 158 159 40 160 161 162 163 164 165 166 167 41 168 169 170 171 172 173 174 175 42 176 177 178 179 180 181 182 183 43 184 185 186 187 188 189 190 191 44 192 193 194 195 196 197 198 199 45 200 201 202 203 204 205 206 207 46 208 209 210 211 212 213 214 215 47 216 217 218 219 220 221 222 223 48 224 225 226 227 228 229 230 231 49 232 233 234 235 236 237 238 239 50 240 241 242 243 244 245 246 247 51 248 249 250 251 252 253 254 255>; 52 default-brightness-level = <200>; 53 pwms = <&pwm0 0 25000 0>; 54 enable-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>; 55 }; 56 57 vcc_lcd: vcc-lcd { 58 compatible = "regulator-fixed"; 59 regulator-name = "vcc_lcd"; 60 gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>; 61 startup-delay-us = <20000>; 62 enable-active-high; 63 regulator-min-microvolt = <3300000>; 64 regulator-max-microvolt = <3300000>; 65 regulator-boot-on; 66 vin-supply = <&vcc_sys>; 67 }; 68 69 panel: panel { 70 compatible = "simple-panel"; 71 backlight = <&backlight>; 72 power-supply = <&vcc_lcd>; 73 enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; 74 prepare-delay-ms = <20>; 75 enable-delay-ms = <20>; 76 77 display-timings { 78 native-mode = <&timing0>; 79 80 timing0: timing0 { 81 clock-frequency = <200000000>; 82 hactive = <1536>; 83 vactive = <2048>; 84 hfront-porch = <12>; 85 hsync-len = <16>; 86 hback-porch = <48>; 87 vfront-porch = <8>; 88 vsync-len = <4>; 89 vback-porch = <8>; 90 hsync-active = <0>; 91 vsync-active = <0>; 92 de-active = <0>; 93 pixelclk-active = <0>; 94 }; 95 }; 96 97 ports { 98 panel_in: endpoint { 99 remote-endpoint = <&edp_out>; 100 }; 101 }; 102 }; 103 104 hdmi_sound: hdmi-sound { 105 status = "okay"; 106 }; 107 108 gpio-keys { 109 compatible = "gpio-keys"; 110 #address-cells = <1>; 111 #size-cells = <0>; 112 autorepeat; 113 114 pinctrl-names = "default"; 115 pinctrl-0 = <&pwrbtn>; 116 117 button@0 { 118 gpios = <&gpio0 5 GPIO_ACTIVE_LOW>; 119 linux,code = <KEY_POWER>; 120 label = "GPIO Key Power"; 121 linux,input-type = <1>; 122 gpio-key,wakeup = <1>; 123 debounce-interval = <100>; 124 }; 125 }; 126 127 vccadc_ref: vccadc-ref { 128 compatible = "regulator-fixed"; 129 regulator-name = "vcc1v8_sys"; 130 regulator-always-on; 131 regulator-boot-on; 132 regulator-min-microvolt = <1800000>; 133 regulator-max-microvolt = <1800000>; 134 }; 135 136 ext_cam_clk: external-camera-clock { 137 compatible = "fixed-clock"; 138 clock-frequency = <27000000>; 139 clock-output-names = "CLK_CAMERA_27MHZ"; 140 #clock-cells = <0>; 141 }; 142 143 adc-keys { 144 compatible = "adc-keys"; 145 io-channels = <&saradc 1>; 146 io-channel-names = "buttons"; 147 poll-interval = <100>; 148 keyup-threshold-microvolt = <1800000>; 149 150 button-up { 151 label = "Volume Up"; 152 linux,code = <KEY_VOLUMEUP>; 153 press-threshold-microvolt = <100000>; 154 }; 155 156 button-down { 157 label = "Volume Down"; 158 linux,code = <KEY_VOLUMEDOWN>; 159 press-threshold-microvolt = <300000>; 160 }; 161 162 back { 163 label = "Back"; 164 linux,code = <KEY_BACK>; 165 press-threshold-microvolt = <985000>; 166 }; 167 168 menu { 169 label = "Menu"; 170 linux,code = <KEY_MENU>; 171 press-threshold-microvolt = <1314000>; 172 }; 173 }; 174}; 175 176&rkisp1_0 { 177 status = "okay"; 178 179 port { 180 #address-cells = <1>; 181 #size-cells = <0>; 182 183 isp0_mipi_in: endpoint@0 { 184 reg = <0>; 185 remote-endpoint = <&dphy_rx0_out>; 186 }; 187 }; 188}; 189 190&mipi_dphy_rx0 { 191 status = "okay"; 192 193 ports { 194 #address-cells = <1>; 195 #size-cells = <0>; 196 197 port@0 { 198 reg = <0>; 199 #address-cells = <1>; 200 #size-cells = <0>; 201 202 mipi_in_ucam0: endpoint@1 { 203 reg = <1>; 204 remote-endpoint = <&ucam_out0>; 205 data-lanes = <1 2>; 206 }; 207 }; 208 209 port@1 { 210 reg = <1>; 211 #address-cells = <1>; 212 #size-cells = <0>; 213 214 dphy_rx0_out: endpoint@0 { 215 reg = <0>; 216 remote-endpoint = <&isp0_mipi_in>; 217 }; 218 }; 219 }; 220}; 221 222&isp0_mmu { 223 status = "okay"; 224}; 225 226&rkisp1_1 { 227 status = "okay"; 228 229 port { 230 #address-cells = <1>; 231 #size-cells = <0>; 232 233 isp1_mipi_in: endpoint@0 { 234 reg = <0>; 235 remote-endpoint = <&dphy_tx1rx1_out>; 236 }; 237 }; 238}; 239 240&mipi_dphy_tx1rx1 { 241 status = "okay"; 242 243 ports { 244 #address-cells = <1>; 245 #size-cells = <0>; 246 247 port@0 { 248 reg = <0>; 249 #address-cells = <1>; 250 #size-cells = <0>; 251 252 mipi_in_ucam1: endpoint@1 { 253 reg = <1>; 254 /* Unlinked camera */ 255 //remote-endpoint = <&ucam_out1>; 256 data-lanes = <1 2>; 257 }; 258 }; 259 260 port@1 { 261 reg = <1>; 262 #address-cells = <1>; 263 #size-cells = <0>; 264 265 dphy_tx1rx1_out: endpoint@0 { 266 reg = <0>; 267 remote-endpoint = <&isp1_mipi_in>; 268 }; 269 }; 270 }; 271}; 272 273&isp1_mmu { 274 status = "okay"; 275}; 276 277&saradc { 278 vref-supply = <&vccadc_ref>; 279}; 280 281&display_subsystem { 282 status = "okay"; 283}; 284 285&route_edp { 286 status = "okay"; 287}; 288 289&edp { 290 status = "okay"; 291 force-hpd; 292 293 ports { 294 port@1 { 295 reg = <1>; 296 297 edp_out: endpoint { 298 remote-endpoint = <&panel_in>; 299 }; 300 }; 301 }; 302}; 303 304&edp_in_vopb { 305 status = "disabled"; 306}; 307 308&hdmi { 309 pinctrl-names = "default"; 310 pinctrl-0 = <&hdmi_i2c_xfer>, <&hdmi_cec>; 311 #address-cells = <1>; 312 #size-cells = <0>; 313 #sound-dai-cells = <0>; 314 status = "okay"; 315}; 316 317&hdmi_in_vopl { 318 status = "disabled"; 319}; 320 321&i2c1 { 322 status = "okay"; 323 324 gsl3673: gsl3673@40 { 325 compatible = "GSL,GSL3673"; 326 reg = <0x40>; 327 screen_max_x = <1536>; 328 screen_max_y = <2048>; 329 irq_gpio_number = <&gpio1 20 IRQ_TYPE_LEVEL_LOW>; 330 rst_gpio_number = <&gpio4 22 GPIO_ACTIVE_HIGH>; 331 }; 332 333 tc358749x: tc358749x@f { 334 compatible = "toshiba,tc358749"; 335 reg = <0xf>; 336 clocks = <&ext_cam_clk>; 337 clock-names = "refclk"; 338 reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; 339 interrupt-parent = <&gpio2>; 340 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 341 pinctrl-names = "default"; 342 pinctrl-0 = <&hdmiin_gpios>; 343 status = "disabled"; 344 port { 345 hdmiin_out0: endpoint { 346 /* Unlinked mipi dphy rx0 */ 347 //remote-endpoint = <&mipi_in_ucam0>; 348 data-lanes = <1 2 3 4>; 349 clock-noncontinuous; 350 link-frequencies = 351 /bits/ 64 <297000000>; 352 }; 353 }; 354 }; 355 356 vm149c: vm149c@0c { 357 compatible = "silicon touch,vm149c"; 358 status = "okay"; 359 reg = <0x0c>; 360 rockchip,camera-module-index = <0>; 361 rockchip,camera-module-facing = "back"; 362 }; 363 364 ov13850: ov13850@10 { 365 compatible = "ovti,ov13850"; 366 status = "okay"; 367 reg = <0x10>; 368 clocks = <&cru SCLK_CIF_OUT>; 369 clock-names = "xvclk"; 370 371 /* conflict with csi-ctl-gpios */ 372 reset-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>; 373 pwdn-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 374 pinctrl-names = "rockchip,camera_default"; 375 pinctrl-0 = <&cif_clkout>; 376 377 lens-focus = <&vm149c>; 378 379 port { 380 ucam_out0: endpoint { 381 remote-endpoint = <&mipi_in_ucam0>; 382 data-lanes = <1 2>; 383 }; 384 }; 385 }; 386}; 387 388&i2c4 { 389 status = "okay"; 390}; 391 392&pcie_phy { 393 status = "okay"; 394}; 395 396&pcie0 { 397 status = "okay"; 398}; 399 400&vopb { 401 status = "okay"; 402 assigned-clocks = <&cru DCLK_VOP0_DIV>; 403 assigned-clock-parents = <&cru PLL_CPLL>; 404}; 405 406&vopb_mmu { 407 status = "okay"; 408}; 409 410&vopl { 411 status = "okay"; 412 assigned-clocks = <&cru DCLK_VOP1_DIV>; 413 assigned-clock-parents = <&cru PLL_VPLL>; 414}; 415 416&vopl_mmu { 417 status = "okay"; 418}; 419 420&pinctrl { 421 buttons { 422 pwrbtn: pwrbtn { 423 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; 424 }; 425 }; 426 427 lcd-panel { 428 lcd_panel_reset: lcd-panel-reset { 429 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>; 430 }; 431 }; 432 433 hdmiin { 434 hdmiin_gpios: hdmiin-gpios { 435 rockchip,pins = 436 <2 RK_PA5 RK_FUNC_GPIO &pcfg_output_high>, 437 <2 RK_PA6 RK_FUNC_GPIO &pcfg_output_high>, 438 <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, 439 <2 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>, 440 <2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>, 441 <2 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>, 442 <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 443 }; 444 }; 445}; 446