1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include "rk3399-evb.dtsi" 8#include "rk3399-early-opp.dtsi" 9 10/ { 11 compatible = "rockchip,rk3399-evb-rev2", "rockchip,rk3399"; 12 13 vcc5v0_sys: vcc5v0-sys { 14 compatible = "regulator-fixed"; 15 regulator-name = "vcc5v0_sys"; 16 regulator-always-on; 17 regulator-boot-on; 18 regulator-min-microvolt = <5000000>; 19 regulator-max-microvolt = <5000000>; 20 }; 21 22 vdd_center: vdd-center { 23 compatible = "pwm-regulator"; 24 rockchip,pwm_id = <3>; 25 rockchip,pwm_voltage = <900000>; 26 pwms = <&pwm3 0 25000 1>; 27 regulator-name = "vdd_center"; 28 regulator-min-microvolt = <800000>; 29 regulator-max-microvolt = <1400000>; 30 regulator-always-on; 31 regulator-boot-on; 32 }; 33 34 xin32k: xin32k { 35 compatible = "fixed-clock"; 36 clock-frequency = <32768>; 37 clock-output-names = "xin32k"; 38 #clock-cells = <0>; 39 }; 40}; 41 42&cpu_l0 { 43 dynamic-power-coefficient = <121>; 44}; 45 46&cpu_b0 { 47 dynamic-power-coefficient = <1068>; 48}; 49 50&soc_thermal { 51 sustainable-power = <1600>; /* milliwatts */ 52 53 cooling-maps { 54 map0 { 55 trip = <&target>; 56 cooling-device = 57 <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 58 contribution = <10240>; 59 }; 60 map1 { 61 trip = <&target>; 62 cooling-device = 63 <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 64 contribution = <1024>; 65 }; 66 map2 { 67 trip = <&target>; 68 cooling-device = 69 <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 70 contribution = <10240>; 71 }; 72 }; 73}; 74 75&gpu_power_model { 76 dynamic-power = <1780>; 77}; 78 79&i2c0 { 80 fusb1: fusb30x@22 { 81 compatible = "fairchild,fusb302"; 82 reg = <0x22>; 83 pinctrl-names = "default"; 84 pinctrl-0 = <&fusb1_int>; 85 vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 86 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; 87 status = "okay"; 88 }; 89 90 vdd_cpu_b: syr827@40 { 91 compatible = "silergy,syr827"; 92 reg = <0x40>; 93 vin-supply = <&vcc5v0_sys>; 94 regulator-compatible = "fan53555-reg"; 95 regulator-name = "vdd_cpu_b"; 96 regulator-min-microvolt = <712500>; 97 regulator-max-microvolt = <1500000>; 98 regulator-ramp-delay = <1000>; 99 fcs,suspend-voltage-selector = <1>; 100 regulator-always-on; 101 regulator-boot-on; 102 regulator-initial-state = <3>; 103 regulator-state-mem { 104 regulator-off-in-suspend; 105 }; 106 }; 107 108 lp8752: lp8752@60 { 109 compatible = "ti,lp8752"; 110 reg = <0x60>; 111 vin0-supply = <&vcc5v0_sys>; 112 regulators { 113 vdd_gpu: lp8752_buck0 { 114 regulator-name = "vdd_gpu"; 115 regulator-min-microvolt = <735000>; 116 regulator-max-microvolt = <1400000>; 117 regulator-ramp-delay = <6000>; 118 regulator-always-on; 119 regulator-boot-on; 120 }; 121 }; 122 }; 123 124 rk808: pmic@1b { 125 compatible = "rockchip,rk808"; 126 reg = <0x1b>; 127 interrupt-parent = <&gpio1>; 128 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 129 pinctrl-names = "default"; 130 pinctrl-0 = <&pmic_int_l &pmic_dvs2>; 131 rockchip,system-power-controller; 132 wakeup-source; 133 #clock-cells = <1>; 134 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 135 136 vcc1-supply = <&vcc3v3_sys>; 137 vcc2-supply = <&vcc3v3_sys>; 138 vcc3-supply = <&vcc3v3_sys>; 139 vcc4-supply = <&vcc3v3_sys>; 140 vcc6-supply = <&vcc3v3_sys>; 141 vcc7-supply = <&vcc3v3_sys>; 142 vcc8-supply = <&vcc3v3_sys>; 143 vcc9-supply = <&vcc3v3_sys>; 144 vcc10-supply = <&vcc3v3_sys>; 145 vcc11-supply = <&vcc3v3_sys>; 146 vcc12-supply = <&vcc3v3_sys>; 147 vddio-supply = <&vcc1v8_pmu>; 148 149 regulators { 150 vdd_log: DCDC_REG1 { 151 regulator-always-on; 152 regulator-boot-on; 153 regulator-min-microvolt = <750000>; 154 regulator-max-microvolt = <1350000>; 155 regulator-ramp-delay = <6001>; 156 regulator-name = "vdd_log"; 157 regulator-state-mem { 158 regulator-on-in-suspend; 159 regulator-suspend-microvolt = <900000>; 160 }; 161 }; 162 163 vdd_cpu_l: DCDC_REG2 { 164 regulator-always-on; 165 regulator-boot-on; 166 regulator-min-microvolt = <750000>; 167 regulator-max-microvolt = <1350000>; 168 regulator-ramp-delay = <6001>; 169 regulator-name = "vdd_cpu_l"; 170 regulator-state-mem { 171 regulator-off-in-suspend; 172 }; 173 }; 174 175 vcc_ddr: DCDC_REG3 { 176 regulator-always-on; 177 regulator-boot-on; 178 regulator-name = "vcc_ddr"; 179 regulator-state-mem { 180 regulator-on-in-suspend; 181 }; 182 }; 183 184 vcc_1v8: DCDC_REG4 { 185 regulator-always-on; 186 regulator-boot-on; 187 regulator-min-microvolt = <1800000>; 188 regulator-max-microvolt = <1800000>; 189 regulator-name = "vcc_1v8"; 190 regulator-state-mem { 191 regulator-on-in-suspend; 192 regulator-suspend-microvolt = <1800000>; 193 }; 194 }; 195 196 vcc1v8_dvp: LDO_REG1 { 197 regulator-always-on; 198 regulator-boot-on; 199 regulator-min-microvolt = <1800000>; 200 regulator-max-microvolt = <1800000>; 201 regulator-name = "vcc1v8_dvp"; 202 regulator-state-mem { 203 regulator-off-in-suspend; 204 }; 205 }; 206 207 vcc3v0_tp: LDO_REG2 { 208 regulator-always-on; 209 regulator-boot-on; 210 regulator-min-microvolt = <3000000>; 211 regulator-max-microvolt = <3000000>; 212 regulator-name = "vcc3v0_tp"; 213 regulator-state-mem { 214 regulator-off-in-suspend; 215 }; 216 }; 217 218 vcc1v8_pmu: LDO_REG3 { 219 regulator-always-on; 220 regulator-boot-on; 221 regulator-min-microvolt = <1800000>; 222 regulator-max-microvolt = <1800000>; 223 regulator-name = "vcc1v8_pmu"; 224 regulator-state-mem { 225 regulator-on-in-suspend; 226 regulator-suspend-microvolt = <1800000>; 227 }; 228 }; 229 230 vcc_sd: LDO_REG4 { 231 regulator-always-on; 232 regulator-boot-on; 233 regulator-min-microvolt = <1800000>; 234 regulator-max-microvolt = <3000000>; 235 regulator-name = "vcc_sd"; 236 regulator-state-mem { 237 regulator-on-in-suspend; 238 regulator-suspend-microvolt = <3000000>; 239 }; 240 }; 241 242 vcca3v0_codec: LDO_REG5 { 243 regulator-always-on; 244 regulator-boot-on; 245 regulator-min-microvolt = <3000000>; 246 regulator-max-microvolt = <3000000>; 247 regulator-name = "vcca3v0_codec"; 248 regulator-state-mem { 249 regulator-off-in-suspend; 250 }; 251 }; 252 253 vcc_1v5: LDO_REG6 { 254 regulator-always-on; 255 regulator-boot-on; 256 regulator-min-microvolt = <1500000>; 257 regulator-max-microvolt = <1500000>; 258 regulator-name = "vcc_1v5"; 259 regulator-state-mem { 260 regulator-on-in-suspend; 261 regulator-suspend-microvolt = <1500000>; 262 }; 263 }; 264 265 vcca1v8_codec: LDO_REG7 { 266 regulator-always-on; 267 regulator-boot-on; 268 regulator-min-microvolt = <1800000>; 269 regulator-max-microvolt = <1800000>; 270 regulator-name = "vcca1v8_codec"; 271 regulator-state-mem { 272 regulator-off-in-suspend; 273 }; 274 }; 275 276 vcc_3v0: LDO_REG8 { 277 regulator-always-on; 278 regulator-boot-on; 279 regulator-min-microvolt = <3000000>; 280 regulator-max-microvolt = <3000000>; 281 regulator-name = "vcc_3v0"; 282 regulator-state-mem { 283 regulator-on-in-suspend; 284 regulator-suspend-microvolt = <3000000>; 285 }; 286 }; 287 288 vcc3v3_s3: SWITCH_REG1 { 289 regulator-always-on; 290 regulator-boot-on; 291 regulator-name = "vcc3v3_s3"; 292 regulator-state-mem { 293 regulator-off-in-suspend; 294 }; 295 }; 296 297 vcc3v3_s0: SWITCH_REG2 { 298 regulator-always-on; 299 regulator-boot-on; 300 regulator-name = "vcc3v3_s0"; 301 regulator-state-mem { 302 regulator-off-in-suspend; 303 }; 304 }; 305 }; 306 }; 307}; 308 309&pwm3 { 310 status = "okay"; 311 pinctrl-names = "active"; 312 pinctrl-0 = <&pwm3a_pin_pull_down>; 313}; 314 315&u2phy0_otg { 316 rockchip,utmi-avalid; 317}; 318 319&i2c6 { 320 status = "okay"; 321 fusb0: fusb30x@22 { 322 compatible = "fairchild,fusb302"; 323 reg = <0x22>; 324 pinctrl-names = "default"; 325 pinctrl-0 = <&fusb0_int>; 326 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 327 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 328 status = "okay"; 329 }; 330}; 331