1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2022 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include "rk3399-evb.dtsi" 8#include "rk3399-early-opp.dtsi" 9 10/ { 11 compatible = "rockchip,rk3399-evb-rev1", "rockchip,rk3399"; 12 13 vdd_log: vdd-log { 14 compatible = "pwm-regulator"; 15 rockchip,pwm_id = <2>; 16 rockchip,pwm_voltage = <900000>; 17 pwms = <&pwm2 0 25000 1>; 18 regulator-name = "vdd_log"; 19 regulator-min-microvolt = <800000>; 20 regulator-max-microvolt = <1400000>; 21 regulator-always-on; 22 regulator-boot-on; 23 }; 24 25 vdd_center: vdd-center { 26 compatible = "pwm-regulator"; 27 rockchip,pwm_id = <3>; 28 rockchip,pwm_voltage = <900000>; 29 pwms = <&pwm3 0 25000 1>; 30 regulator-name = "vdd_center"; 31 regulator-min-microvolt = <800000>; 32 regulator-max-microvolt = <1400000>; 33 regulator-always-on; 34 regulator-boot-on; 35 }; 36 37 xin32k: xin32k { 38 compatible = "fixed-clock"; 39 clock-frequency = <32768>; 40 clock-output-names = "xin32k"; 41 #clock-cells = <0>; 42 }; 43}; 44 45&cpu_l0 { 46 dynamic-power-coefficient = <121>; 47}; 48 49&cpu_b0 { 50 dynamic-power-coefficient = <1068>; 51}; 52 53&soc_thermal { 54 sustainable-power = <1600>; /* milliwatts */ 55 56 cooling-maps { 57 map0 { 58 trip = <&target>; 59 cooling-device = 60 <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 61 contribution = <10240>; 62 }; 63 map1 { 64 trip = <&target>; 65 cooling-device = 66 <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 67 contribution = <1024>; 68 }; 69 map2 { 70 trip = <&target>; 71 cooling-device = 72 <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 73 contribution = <10240>; 74 }; 75 }; 76}; 77 78&gpu_power_model { 79 dynamic-power = <1780>; 80}; 81 82&i2c0 { 83 fusb0: fusb30x@22 { 84 compatible = "fairchild,fusb302"; 85 reg = <0x22>; 86 pinctrl-names = "default"; 87 pinctrl-0 = <&fusb0_int>; 88 vbus-5v-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 89 int-n-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 90 status = "okay"; 91 }; 92 93 mp8865: mp8865@68 { 94 compatible = "mps,mp8865"; 95 reg = <0x68>; 96 regulators { 97 vdd_gpu: mp8865_dcdc1 { 98 regulator-name = "vdd_gpu"; 99 regulator-min-microvolt = <712500>; 100 regulator-max-microvolt = <1500000>; 101 regulator-ramp-delay = <8000>; 102 regulator-always-on; 103 regulator-boot-on; 104 }; 105 }; 106 }; 107 108 rk808: pmic@1b { 109 compatible = "rockchip,rk808"; 110 reg = <0x1b>; 111 interrupt-parent = <&gpio1>; 112 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 113 pinctrl-names = "default"; 114 pinctrl-0 = <&pmic_int_l &pmic_dvs2>; 115 rockchip,system-power-controller; 116 wakeup-source; 117 #clock-cells = <1>; 118 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 119 120 vcc1-supply = <&vcc3v3_sys>; 121 vcc2-supply = <&vcc3v3_sys>; 122 vcc3-supply = <&vcc3v3_sys>; 123 vcc4-supply = <&vcc3v3_sys>; 124 vcc6-supply = <&vcc3v3_sys>; 125 vcc7-supply = <&vcc3v3_sys>; 126 vcc8-supply = <&vcc3v3_sys>; 127 vcc9-supply = <&vcc3v3_sys>; 128 vcc10-supply = <&vcc3v3_sys>; 129 vcc11-supply = <&vcc3v3_sys>; 130 vcc12-supply = <&vcc3v3_sys>; 131 vddio-supply = <&vcc1v8_pmu>; 132 133 regulators { 134 vdd_cpu_b: DCDC_REG1 { 135 regulator-always-on; 136 regulator-boot-on; 137 regulator-min-microvolt = <750000>; 138 regulator-max-microvolt = <1350000>; 139 regulator-ramp-delay = <6001>; 140 regulator-name = "vdd_cpu_b"; 141 regulator-state-mem { 142 regulator-off-in-suspend; 143 }; 144 }; 145 146 vdd_cpu_l: DCDC_REG2 { 147 regulator-always-on; 148 regulator-boot-on; 149 regulator-min-microvolt = <750000>; 150 regulator-max-microvolt = <1350000>; 151 regulator-ramp-delay = <6001>; 152 regulator-name = "vdd_cpu_l"; 153 regulator-state-mem { 154 regulator-off-in-suspend; 155 }; 156 }; 157 158 vcc_ddr: DCDC_REG3 { 159 regulator-always-on; 160 regulator-boot-on; 161 regulator-name = "vcc_ddr"; 162 regulator-state-mem { 163 regulator-on-in-suspend; 164 }; 165 }; 166 167 vcc_1v8: DCDC_REG4 { 168 regulator-always-on; 169 regulator-boot-on; 170 regulator-min-microvolt = <1800000>; 171 regulator-max-microvolt = <1800000>; 172 regulator-name = "vcc_1v8"; 173 regulator-state-mem { 174 regulator-on-in-suspend; 175 regulator-suspend-microvolt = <1800000>; 176 }; 177 }; 178 179 vcc1v8_dvp: LDO_REG1 { 180 regulator-always-on; 181 regulator-boot-on; 182 regulator-min-microvolt = <1800000>; 183 regulator-max-microvolt = <1800000>; 184 regulator-name = "vcc1v8_dvp"; 185 regulator-state-mem { 186 regulator-on-in-suspend; 187 regulator-suspend-microvolt = <1800000>; 188 }; 189 }; 190 191 vcc3v0_tp: LDO_REG2 { 192 regulator-always-on; 193 regulator-boot-on; 194 regulator-min-microvolt = <3000000>; 195 regulator-max-microvolt = <3000000>; 196 regulator-name = "vcc3v0_tp"; 197 regulator-state-mem { 198 regulator-off-in-suspend; 199 }; 200 }; 201 202 vcc1v8_pmu: LDO_REG3 { 203 regulator-always-on; 204 regulator-boot-on; 205 regulator-min-microvolt = <1800000>; 206 regulator-max-microvolt = <1800000>; 207 regulator-name = "vcc1v8_pmu"; 208 regulator-state-mem { 209 regulator-on-in-suspend; 210 regulator-suspend-microvolt = <1800000>; 211 }; 212 }; 213 214 vcc_sd: LDO_REG4 { 215 regulator-always-on; 216 regulator-boot-on; 217 regulator-min-microvolt = <1800000>; 218 regulator-max-microvolt = <3000000>; 219 regulator-name = "vcc_sd"; 220 regulator-state-mem { 221 regulator-on-in-suspend; 222 regulator-suspend-microvolt = <3000000>; 223 }; 224 }; 225 226 vcca3v0_codec: LDO_REG5 { 227 regulator-always-on; 228 regulator-boot-on; 229 regulator-min-microvolt = <3000000>; 230 regulator-max-microvolt = <3000000>; 231 regulator-name = "vcca3v0_codec"; 232 regulator-state-mem { 233 regulator-on-in-suspend; 234 regulator-suspend-microvolt = <3000000>; 235 }; 236 }; 237 238 vcc_1v5: LDO_REG6 { 239 regulator-always-on; 240 regulator-boot-on; 241 regulator-min-microvolt = <1500000>; 242 regulator-max-microvolt = <1500000>; 243 regulator-name = "vcc_1v5"; 244 regulator-state-mem { 245 regulator-on-in-suspend; 246 regulator-suspend-microvolt = <1500000>; 247 }; 248 }; 249 250 vcca1v8_codec: LDO_REG7 { 251 regulator-always-on; 252 regulator-boot-on; 253 regulator-min-microvolt = <1800000>; 254 regulator-max-microvolt = <1800000>; 255 regulator-name = "vcca1v8_codec"; 256 regulator-state-mem { 257 regulator-on-in-suspend; 258 regulator-suspend-microvolt = <1800000>; 259 }; 260 }; 261 262 vcc_3v0: LDO_REG8 { 263 regulator-always-on; 264 regulator-boot-on; 265 regulator-min-microvolt = <3000000>; 266 regulator-max-microvolt = <3000000>; 267 regulator-name = "vcc_3v0"; 268 regulator-state-mem { 269 regulator-on-in-suspend; 270 regulator-suspend-microvolt = <3000000>; 271 }; 272 }; 273 274 vcc3v3_s3: SWITCH_REG1 { 275 regulator-always-on; 276 regulator-boot-on; 277 regulator-name = "vcc3v3_s3"; 278 regulator-state-mem { 279 regulator-on-in-suspend; 280 }; 281 }; 282 283 vcc3v3_s0: SWITCH_REG2 { 284 regulator-always-on; 285 regulator-boot-on; 286 regulator-name = "vcc3v3_s0"; 287 regulator-state-mem { 288 regulator-on-in-suspend; 289 }; 290 }; 291 }; 292 }; 293}; 294 295&i2c4 { 296 fusb1: fusb30x@22 { 297 compatible = "fairchild,fusb302"; 298 reg = <0x22>; 299 pinctrl-names = "default"; 300 pinctrl-0 = <&fusb1_int>; 301 vbus-5v-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 302 int-n-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; 303 }; 304}; 305 306&pwm2 { 307 status = "okay"; 308}; 309 310&pwm3 { 311 status = "okay"; 312}; 313 314&u2phy0_otg { 315 rockchip,utmi-avalid; 316}; 317