1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 */ 5 6/dts-v1/; 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/sensor-dev.h> 10#include "rk3368.dtsi" 11#include "rk3368-android.dtsi" 12/ { 13 model = "Rockchip rk3368a tablet rk817 board"; 14 compatible = "rockchip,tablet", "rockchip,rk3368a", "rockchip,rk3368"; 15 16 adc_keys: adc-keys { 17 compatible = "adc-keys"; 18 io-channels = <&saradc 1>; 19 io-channel-names = "buttons"; 20 keyup-threshold-microvolt = <1024000>; 21 poll-interval = <100>; 22 23 vol-up-key { 24 label = "volume up"; 25 linux,code = <KEY_VOLUMEUP>; 26 press-threshold-microvolt = <1000>; 27 }; 28 29 vol-down-key { 30 label = "volume down"; 31 linux,code = <KEY_VOLUMEDOWN>; 32 press-threshold-microvolt = <170000>; 33 }; 34 }; 35 36 backlight: backlight { 37 compatible = "pwm-backlight"; 38 pwms = <&pwm0 0 25000 1>; 39 brightness-levels = < 40 30 30 30 31 31 31 32 32 41 32 33 33 33 34 34 34 35 42 35 35 36 36 36 37 37 37 43 38 38 38 39 39 39 40 40 44 40 41 41 41 42 42 42 43 45 43 43 44 44 44 45 46 47 46 48 49 50 51 52 53 54 55 47 56 57 58 59 60 61 62 63 48 64 65 66 67 68 69 70 71 49 72 73 74 75 76 77 78 79 50 80 81 82 83 84 85 86 87 51 88 89 90 91 92 93 94 95 52 96 97 98 99 100 101 102 103 53 104 105 106 107 108 109 110 111 54 112 113 114 115 116 117 118 119 55 120 121 122 123 124 125 126 127 56 128 129 130 131 132 133 134 135 57 136 137 138 139 140 141 142 143 58 144 145 146 147 148 149 150 151 59 152 153 154 155 156 157 158 159 60 160 161 162 163 164 165 166 167 61 168 169 170 171 172 173 174 175 62 176 177 178 179 180 181 182 183 63 184 185 186 187 188 189 190 191 64 192 193 194 195 196 197 198 199 65 200 201 202 203 204 205 206 207 66 208 209 210 211 212 213 214 215 67 216 217 218 219 220 221 222 223 68 224 225 226 227 228 229 230 231 69 232 232 232 233 233 233 234 234 70 234 235 235 235 236 236 236 237 71 237 238 238 239 239 240 240 240>; 72 default-brightness-level = <200>; 73 enable-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; 74 }; 75 76 charge-animation { 77 compatible = "rockchip,uboot-charge"; 78 rockchip,uboot-charge-on = <1>; 79 rockchip,android-charge-on = <0>; 80 rockchip,uboot-low-power-voltage = <3400>; 81 rockchip,screen-on-voltage = <3400>; 82 status = "okay"; 83 }; 84 85 chosen: chosen { 86 bootargs = "earlycon=uart8250,mmio32,0xff690000 console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0"; 87 }; 88 89 rk817-sound { 90 compatible = "simple-audio-card"; 91 simple-audio-card,format = "i2s"; 92 simple-audio-card,name = "rockchip-rk817-codec"; 93 simple-audio-card,mclk-fs = <256>; 94 simple-audio-card,widgets = 95 "Microphone", "Mic Jack", 96 "Headphone", "Headphone Jack"; 97 simple-audio-card,routing = 98 "Mic Jack", "MICBIAS1", 99 "IN1P", "Mic Jack", 100 "Headphone Jack", "HPOL", 101 "Headphone Jack", "HPOR"; 102 simple-audio-card,cpu { 103 sound-dai = <&i2s_8ch>; 104 }; 105 simple-audio-card,codec { 106 sound-dai = <&rk817_codec>; 107 }; 108 }; 109 110 rk_headset: rk-headset { 111 compatible = "rockchip_headset"; 112 headset_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>; 113 pinctrl-names = "default"; 114 pinctrl-0 = <&hp_det>; 115 io-channels = <&saradc 2>; 116 }; 117 118 sdio_pwrseq: sdio-pwrseq { 119 compatible = "mmc-pwrseq-simple"; 120 pinctrl-names = "default"; 121 pinctrl-0 = <&wifi_enable_h>; 122 123 /* 124 * On the module itself this is one of these (depending 125 * on the actual card populated): 126 * - SDIO_RESET_L_WL_REG_ON 127 * - PDN (power down when low) 128 */ 129 reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ 130 }; 131 132 vccsys: vccsys { 133 compatible = "regulator-fixed"; 134 regulator-name = "vcc3v8_sys"; 135 regulator-always-on; 136 regulator-boot-on; 137 regulator-min-microvolt = <3800000>; 138 regulator-max-microvolt = <3800000>; 139 }; 140 141 wireless-wlan { 142 compatible = "wlan-platdata"; 143 /* wifi_chip_type - wifi chip define 144 * ap6210, ap6330, ap6335 145 * rtl8188eu, rtl8723bs, rtl8723bu 146 * esp8089 147 */ 148 wifi_chip_type = "rtl8723bs"; 149 WIFI,vbat_gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>; 150 WIFI,host_wake_irq = <&gpio3 6 GPIO_ACTIVE_HIGH>; 151 status = "okay"; 152 }; 153 154 wireless-bluetooth { 155 compatible = "bluetooth-platdata"; 156 uart_rts_gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; 157 pinctrl-names = "default","rts_gpio"; 158 pinctrl-0 = <&uart0_rts>; 159 pinctrl-1 = <&uart0_rts_gpio>; 160 161 //BT,power_gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>; 162 BT,reset_gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>; 163 BT,wake_gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>; 164 BT,wake_host_irq = <&gpio3 7 GPIO_ACTIVE_HIGH>; 165 166 status = "okay"; 167 }; 168 169 vcc_sys: vcc-sys { 170 compatible = "regulator-fixed"; 171 regulator-name = "vcc_sys"; 172 regulator-always-on; 173 regulator-boot-on; 174 regulator-min-microvolt = <3800000>; 175 regulator-max-microvolt = <3800000>; 176 }; 177 178 vcc_host: vcc-host { 179 compatible = "regulator-fixed"; 180 enable-active-high; 181 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; 182 pinctrl-names = "default"; 183 pinctrl-0 = <&host_vbus_drv>; 184 regulator-name = "vcc_host"; 185 regulator-always-on; 186 }; 187 188 xin32k: xin32k { 189 compatible = "fixed-clock"; 190 clock-frequency = <32768>; 191 clock-output-names = "xin32k"; 192 #clock-cells = <0>; 193 }; 194 195}; 196 197&cif_clkout { 198 /* cif_clkout */ 199 rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none_4ma>; 200}; 201 202&cpu_l0 { 203 cpu-supply = <&vdd_cpu>; 204}; 205 206&cpu_l1 { 207 cpu-supply = <&vdd_cpu>; 208}; 209 210&cpu_l2 { 211 cpu-supply = <&vdd_cpu>; 212}; 213 214&cpu_l3 { 215 cpu-supply = <&vdd_cpu>; 216}; 217 218&cpu_b0 { 219 cpu-supply = <&vdd_cpu>; 220}; 221 222&cpu_b1 { 223 cpu-supply = <&vdd_cpu>; 224}; 225 226&cpu_b2 { 227 cpu-supply = <&vdd_cpu>; 228}; 229 230&cpu_b3 { 231 cpu-supply = <&vdd_cpu>; 232}; 233 234&gpu { 235 logic-supply = <&vdd_logic>; 236}; 237 238&dsi { 239 status = "okay"; 240 //rockchip,lane-rate = <500>; 241 242 panel:panel@0 { 243 compatible = "simple-panel-dsi"; 244 reg = <0>; 245 backlight = <&backlight>; 246 enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 247 prepare-delay-ms = <20>; 248 reset-delay-ms = <20>; 249 init-delay-ms = <20>; 250 enable-delay-ms = <120>; 251 disable-delay-ms = <20>; 252 unprepare-delay-ms = <20>; 253 254 width-mm = <135>; 255 height-mm = <216>; 256 257 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 258 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 259 dsi,format = <MIPI_DSI_FMT_RGB888>; 260 dsi,lanes = <4>; 261 262 panel-init-sequence = [ 263 39 00 04 FF 98 81 03 264 15 00 02 01 00 265 15 00 02 02 00 266 15 00 02 03 53 267 15 00 02 04 00 268 15 00 02 05 00 269 15 00 02 06 08 270 15 00 02 07 00 271 15 00 02 08 00 272 15 00 02 09 00 273 15 00 02 0A 00 274 15 00 02 0B 00 275 15 00 02 0C 00 276 15 00 02 0D 00 277 15 00 02 0E 00 278 15 00 02 0F 26 279 15 00 02 10 26 280 15 00 02 11 00 281 15 00 02 12 00 282 15 00 02 13 00 283 15 00 02 14 00 284 15 00 02 15 00 285 15 00 02 16 00 286 15 00 02 17 00 287 15 00 02 18 00 288 15 00 02 19 00 289 15 00 02 1A 00 290 15 00 02 1B 00 291 15 00 02 1C 00 292 15 00 02 1D 00 293 15 00 02 1E 40 294 15 00 02 1F C0 295 15 00 02 20 06 296 15 00 02 21 01 297 15 00 02 22 07 298 15 00 02 23 00 299 15 00 02 24 8A 300 15 00 02 25 8A 301 15 00 02 26 00 302 15 00 02 27 00 303 15 00 02 28 33 304 15 00 02 29 33 305 15 00 02 2A 00 306 15 00 02 2B 00 307 15 00 02 2C 08 308 15 00 02 2D 08 309 15 00 02 2E 0B 310 15 00 02 2F 0B 311 15 00 02 30 00 312 15 00 02 31 00 313 15 00 02 32 42 314 15 00 02 33 00 315 15 00 02 34 00 316 15 00 02 35 0A 317 15 00 02 36 00 318 15 00 02 37 08 319 15 00 02 38 3C 320 15 00 02 39 00 321 15 00 02 3A 00 322 15 00 02 3B 00 323 15 00 02 3C 00 324 15 00 02 3D 00 325 15 00 02 3E 00 326 15 00 02 3F 00 327 15 00 02 40 00 328 15 00 02 41 00 329 15 00 02 42 00 330 15 00 02 43 08 331 15 00 02 44 00 332 15 00 02 50 01 333 15 00 02 51 23 334 15 00 02 52 45 335 15 00 02 53 67 336 15 00 02 54 89 337 15 00 02 55 AB 338 15 00 02 56 01 339 15 00 02 57 23 340 15 00 02 58 45 341 15 00 02 59 67 342 15 00 02 5A 89 343 15 00 02 5B AB 344 15 00 02 5C CD 345 15 00 02 5D EF 346 15 00 02 5E 00 347 15 00 02 5F 01 348 15 00 02 60 01 349 15 00 02 61 06 350 15 00 02 62 06 351 15 00 02 63 06 352 15 00 02 64 06 353 15 00 02 65 00 354 15 00 02 66 00 355 15 00 02 67 17 356 15 00 02 68 02 357 15 00 02 69 16 358 15 00 02 6A 16 359 15 00 02 6B 02 360 15 00 02 6C 0D 361 15 00 02 6D 0D 362 15 00 02 6E 0C 363 15 00 02 6F 0C 364 15 00 02 70 0F 365 15 00 02 71 0F 366 15 00 02 72 0E 367 15 00 02 73 0E 368 15 00 02 74 02 369 15 00 02 75 01 370 15 00 02 76 01 371 15 00 02 77 06 372 15 00 02 78 06 373 15 00 02 79 06 374 15 00 02 7A 06 375 15 00 02 7B 00 376 15 00 02 7C 00 377 15 00 02 7D 17 378 15 00 02 7E 02 379 15 00 02 7F 16 380 15 00 02 80 16 381 15 00 02 81 02 382 15 00 02 82 0D 383 15 00 02 83 0D 384 15 00 02 84 0C 385 15 00 02 85 0C 386 15 00 02 86 0F 387 15 00 02 87 0F 388 15 00 02 88 0E 389 15 00 02 89 0E 390 15 00 02 8A 02 391 39 00 04 FF 98 81 04 392 15 00 02 6E 2B 393 15 00 02 6F 35 394 15 00 02 3A A4 395 15 00 02 8D 1A 396 15 00 02 87 BA 397 15 00 02 B2 D1 398 15 00 02 88 0B 399 15 00 02 38 01 400 15 00 02 39 00 401 15 00 02 B5 07 402 15 00 02 31 75 403 15 00 02 3B 98 404 39 00 04 FF 98 81 01 405 15 00 02 22 0A 406 15 00 02 31 00 407 15 00 02 53 40 408 15 00 02 55 40 409 15 00 02 50 95 410 15 00 02 51 90 411 15 00 02 60 22 412 15 00 02 62 20 413 15 00 02 A0 00 414 15 00 02 A1 1B 415 15 00 02 A2 2A 416 15 00 02 A3 14 417 15 00 02 A4 17 418 15 00 02 A5 2B 419 15 00 02 A6 1F 420 15 00 02 A7 20 421 15 00 02 A8 93 422 15 00 02 A9 1E 423 15 00 02 AA 2A 424 15 00 02 AB 7E 425 15 00 02 AC 1B 426 15 00 02 AD 19 427 15 00 02 AE 4C 428 15 00 02 AF 22 429 15 00 02 B0 28 430 15 00 02 B1 4B 431 15 00 02 B2 59 432 15 00 02 B3 23 433 15 00 02 C0 00 434 15 00 02 C1 1B 435 15 00 02 C2 2A 436 15 00 02 C3 14 437 15 00 02 C4 17 438 15 00 02 C5 2B 439 15 00 02 C6 1F 440 15 00 02 C7 20 441 15 00 02 C8 93 442 15 00 02 C9 1E 443 15 00 02 CA 2A 444 15 00 02 CB 7E 445 15 00 02 CC 1B 446 15 00 02 CD 19 447 15 00 02 CE 4C 448 15 00 02 CF 22 449 15 00 02 D0 28 450 15 00 02 D1 4B 451 15 00 02 D2 59 452 15 00 02 D3 23 453 //39 00 04 FF 98 81 04 454 //05 00 02 2D 80 455 //05 00 02 2F 31 456 39 00 04 FF 98 81 00 457 05 78 01 11 458 05 14 01 29 459 15 00 02 35 00 460 ]; 461 462 panel-exit-sequence = [ 463 05 00 01 28 464 05 00 01 10 465 ]; 466 467 display-timings { 468 native-mode = <&timing0>; 469 470 timing0: timing0 { 471 clock-frequency = <78000000>; 472 hactive = <800>; 473 vactive = <1280>; 474 hfront-porch = <60>;//70 //16 475 hsync-len = <30>; //20 //5 476 hback-porch = <60>; //59 477 vfront-porch = <20>; //16 //8 478 vsync-len = <8>; //5 479 vback-porch = <16>; //22 //3 480 hsync-active = <0>; 481 vsync-active = <0>; 482 de-active = <0>; 483 pixelclk-active = <0>; 484 }; 485 }; 486 }; 487}; 488 489&dfi { 490 status = "okay"; 491}; 492 493&dmc { 494 status = "okay"; 495 center-supply = <&vdd_logic>; 496 devfreq-events = <&dfi>; 497 upthreshold = <60>; 498 downdifferential = <20>; 499 system-status-freq = < 500 /*system status freq(KHz)*/ 501 SYS_STATUS_NORMAL 600000 502 SYS_STATUS_REBOOT 600000 503 SYS_STATUS_SUSPEND 240000 504 SYS_STATUS_VIDEO_1080P 396000 505 SYS_STATUS_VIDEO_4K 600000 506 SYS_STATUS_PERFORMANCE 600000 507 SYS_STATUS_BOOST 396000 508 SYS_STATUS_DUALVIEW 600000 509 SYS_STATUS_ISP 528000 510 >; 511 vop-bw-dmc-freq = < 512 /* min_bw(MB/s) max_bw(MB/s) freq(KHz) */ 513 0 582 240000 514 583 99999 396000 515 >; 516 vop-dclk-mode = <1>; 517 auto-min-freq = <240000>; 518 auto-freq-en = <0>; 519}; 520 521&emmc { 522 bus-width = <8>; 523 cap-mmc-highspeed; 524 mmc-hs200-1_8v; 525 no-sdio; 526 no-sd; 527 disable-wp; 528 non-removable; 529 num-slots = <1>; 530 status = "okay"; 531}; 532 533&i2c0 { 534 status = "okay"; 535 536 vdd_cpu: syr827@40 { 537 compatible = "silergy,syr827"; 538 status = "okay"; 539 reg = <0x40>; 540 541 regulator-compatible = "fan53555-reg"; 542 regulator-name = "vdd_cpu"; 543 regulator-min-microvolt = <712500>; 544 regulator-max-microvolt = <1500000>; 545 regulator-ramp-delay = <1000>; 546 fcs,suspend-voltage-selector = <1>; 547 pinctrl-0 = <&vsel_gpio>; 548 vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 549 regulator-always-on; 550 regulator-boot-on; 551 regulator-initial-state = <3>; 552 regulator-state-mem { 553 regulator-off-in-suspend; 554 }; 555 }; 556 557 rk817: pmic@20 { 558 compatible = "rockchip,rk817"; 559 reg = <0x20>; 560 interrupt-parent = <&gpio0>; 561 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 562 pinctrl-names = "default", "pmic-sleep", 563 "pmic-power-off", "pmic-reset"; 564 pinctrl-0 = <&pmic_int>; 565 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 566 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 567 pinctrl-3 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 568 rockchip,system-power-controller; 569 wakeup-source; 570 #clock-cells = <1>; 571 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 572 //fb-inner-reg-idxs = <2>; 573 /* 1: rst regs (default in codes), 0: rst the pmic */ 574 pmic-reset-func = <1>; 575 576 vcc1-supply = <&vccsys>; 577 vcc2-supply = <&vccsys>; 578 vcc3-supply = <&vccsys>; 579 vcc4-supply = <&vccsys>; 580 vcc5-supply = <&vccsys>; 581 vcc6-supply = <&vccsys>; 582 vcc7-supply = <&vcc_io>; 583 vcc8-supply = <&vccsys>; 584 vcc9-supply = <&dcdc_boost>; 585 586 pwrkey { 587 status = "okay"; 588 }; 589 590 pinctrl_rk8xx: pinctrl_rk8xx { 591 gpio-controller; 592 #gpio-cells = <2>; 593 594 rk817_ts_gpio1: rk817_ts_gpio1 { 595 pins = "gpio_ts"; 596 function = "pin_fun1"; 597 /* output-low; */ 598 /* input-enable; */ 599 }; 600 601 rk817_gt_gpio2: rk817_gt_gpio2 { 602 pins = "gpio_gt"; 603 function = "pin_fun1"; 604 }; 605 606 rk817_pin_ts: rk817_pin_ts { 607 pins = "gpio_ts"; 608 function = "pin_fun0"; 609 }; 610 611 rk817_pin_gt: rk817_pin_gt { 612 pins = "gpio_gt"; 613 function = "pin_fun0"; 614 }; 615 616 rk817_slppin_null: rk817_slppin_null { 617 pins = "gpio_slp"; 618 function = "pin_fun0"; 619 }; 620 621 rk817_slppin_slp: rk817_slppin_slp { 622 pins = "gpio_slp"; 623 function = "pin_fun1"; 624 }; 625 626 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 627 pins = "gpio_slp"; 628 function = "pin_fun2"; 629 }; 630 631 rk817_slppin_rst: rk817_slppin_rst { 632 pins = "gpio_slp"; 633 function = "pin_fun3"; 634 }; 635 }; 636 637 regulators { 638 vdd_logic: DCDC_REG1 { 639 regulator-always-on; 640 regulator-boot-on; 641 regulator-min-microvolt = <950000>; 642 regulator-max-microvolt = <1350000>; 643 regulator-ramp-delay = <6001>; 644 regulator-initial-mode = <0x2>; 645 regulator-name = "vdd_logic"; 646 regulator-state-mem { 647 regulator-on-in-suspend; 648 regulator-suspend-microvolt = <950000>; 649 }; 650 }; 651 652 vcc_3v3: DCDC_REG2 { 653 regulator-name = "vcc_3v3"; 654 regulator-always-on; 655 regulator-boot-on; 656 regulator-state-mem { 657 regulator-on-in-suspend; 658 }; 659 }; 660 661 vcc_ddr: DCDC_REG3 { 662 regulator-always-on; 663 regulator-boot-on; 664 regulator-initial-mode = <0x2>; 665 regulator-name = "vcc_ddr"; 666 regulator-state-mem { 667 regulator-on-in-suspend; 668 }; 669 }; 670 671 vcc_io: DCDC_REG4 { 672 regulator-always-on; 673 regulator-boot-on; 674 regulator-min-microvolt = <3300000>; 675 regulator-max-microvolt = <3300000>; 676 regulator-name = "vcc_io"; 677 regulator-state-mem { 678 regulator-on-in-suspend; 679 regulator-suspend-microvolt = <3300000>; 680 }; 681 }; 682 683 vcc_1v0: LDO_REG1 { 684 regulator-always-on; 685 regulator-boot-on; 686 regulator-min-microvolt = <1000000>; 687 regulator-max-microvolt = <1000000>; 688 regulator-name = "vcc_1v0"; 689 regulator-state-mem { 690 regulator-on-in-suspend; 691 regulator-suspend-microvolt = <1000000>; 692 }; 693 }; 694 695 vcc1v8_soc: LDO_REG2 { 696 regulator-always-on; 697 regulator-boot-on; 698 regulator-min-microvolt = <1800000>; 699 regulator-max-microvolt = <1800000>; 700 701 regulator-name = "vcc1v8_soc"; 702 regulator-state-mem { 703 regulator-on-in-suspend; 704 regulator-suspend-microvolt = <1800000>; 705 }; 706 }; 707 708 vdd1v0_soc: LDO_REG3 { 709 regulator-always-on; 710 regulator-boot-on; 711 regulator-min-microvolt = <1000000>; 712 regulator-max-microvolt = <1000000>; 713 714 regulator-name = "vcc1v0_soc"; 715 regulator-state-mem { 716 regulator-on-in-suspend; 717 regulator-suspend-microvolt = <1000000>; 718 }; 719 }; 720 721 vcc3v3_pmu: LDO_REG4 { 722 regulator-always-on; 723 regulator-boot-on; 724 regulator-min-microvolt = <3300000>; 725 regulator-max-microvolt = <3300000>; 726 727 regulator-name = "vcc3v3_pmu"; 728 regulator-state-mem { 729 regulator-on-in-suspend; 730 regulator-suspend-microvolt = <3300000>; 731 732 }; 733 }; 734 735 vccio_sd: LDO_REG5 { 736 regulator-always-on; 737 regulator-boot-on; 738 regulator-min-microvolt = <1800000>; 739 regulator-max-microvolt = <3300000>; 740 741 regulator-name = "vccio_sd"; 742 regulator-state-mem { 743 regulator-on-in-suspend; 744 regulator-suspend-microvolt = <3300000>; 745 }; 746 }; 747 748 vcc_sd: LDO_REG6 { 749 regulator-min-microvolt = <3300000>; 750 regulator-max-microvolt = <3300000>; 751 752 regulator-name = "vcc_sd"; 753 regulator-state-mem { 754 regulator-on-in-suspend; 755 regulator-suspend-microvolt = <3300000>; 756 757 }; 758 }; 759 760 vcc2v8_dvp: LDO_REG7 { 761 regulator-boot-on; 762 regulator-min-microvolt = <2800000>; 763 regulator-max-microvolt = <2800000>; 764 765 regulator-name = "vcc2v8_dvp"; 766 regulator-state-mem { 767 regulator-off-in-suspend; 768 regulator-suspend-microvolt = <2800000>; 769 }; 770 }; 771 772 vcc1v8_dvp: LDO_REG8 { 773 regulator-boot-on; 774 regulator-min-microvolt = <1800000>; 775 regulator-max-microvolt = <1800000>; 776 777 regulator-name = "vcc1v8_dvp"; 778 regulator-state-mem { 779 regulator-off-in-suspend; 780 regulator-suspend-microvolt = <1800000>; 781 }; 782 }; 783 784 vdd1v5_dvp: LDO_REG9 { 785 regulator-boot-on; 786 regulator-min-microvolt = <1500000>; 787 regulator-max-microvolt = <1500000>; 788 789 regulator-name = "vdd1v5_dvp"; 790 regulator-state-mem { 791 regulator-off-in-suspend; 792 regulator-suspend-microvolt = <1500000>; 793 }; 794 }; 795 796 dcdc_boost: BOOST { 797 regulator-always-on; 798 regulator-boot-on; 799 regulator-min-microvolt = <5000000>; 800 regulator-max-microvolt = <5000000>; 801 regulator-name = "boost"; 802 }; 803 804 otg_switch: OTG_SWITCH { 805 regulator-name = "otg_switch"; 806 }; 807 }; 808 809 battery { 810 compatible = "rk817,battery"; 811 ocv_table = <3500 3548 3592 3636 3687 3740 3780 812 3806 3827 3846 3864 3889 3929 3964 813 3993 4015 4030 4041 4056 4076 4148>; 814 design_capacity = <5000>; 815 design_qmax = <5500>; 816 bat_res = <100>; 817 sleep_enter_current = <150>; 818 sleep_exit_current = <180>; 819 sleep_filter_current = <100>; 820 power_off_thresd = <3400>; 821 zero_algorithm_vol = <3850>; 822 max_soc_offset = <60>; 823 monitor_sec = <5>; 824 sample_res = <10>; 825 virtual_power = <0>; 826 }; 827 828 charger { 829 compatible = "rk817,charger"; 830 min_input_voltage = <4500>; 831 max_input_current = <1500>; 832 max_chrg_current = <2000>; 833 max_chrg_voltage = <4200>; 834 chrg_term_mode = <0>; 835 chrg_finish_cur = <300>; 836 virtual_power = <0>; 837 dc_det_adc = <0>; 838 extcon = <&u2phy>; 839 }; 840 841 rk817_codec: codec { 842 #sound-dai-cells = <0>; 843 compatible = "rockchip,rk817-codec"; 844 clocks = <&cru SCLK_I2S_8CH_OUT>; 845 clock-names = "mclk"; 846 pinctrl-names = "default"; 847 pinctrl-0 = <&i2s_8ch_mclk>; 848 hp-volume = <20>; 849 spk-volume = <3>; 850 mic-in-differential; 851 out-l2spk-r2hp; 852 spk-ctl-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>; 853 status = "okay"; 854 }; 855 }; 856}; 857 858&i2c2 { 859 status = "okay"; 860 861 ts@40 { 862 status = "okay"; 863 compatible = "GSL,GSL_THZY"; 864 reg = <0x40>; 865 irq_gpio_number = <&gpio0 RK_PB4 IRQ_TYPE_LEVEL_HIGH>; 866 rst_gpio_number = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 867 }; 868}; 869 870&i2c3 { 871 status = "okay"; 872 873 gc032a: gc032a@21 { 874 status = "okay"; 875 compatible = "galaxycore,gc032a"; 876 reg = <0x21>; 877 clocks = <&cru SCLK_VIP_OUT>; 878 clock-names = "xvclk"; 879 880 avdd-supply = <&vcc2v8_dvp>; 881 dovdd-supply = <&vcc1v8_dvp>; 882 dvdd-supply = <&vdd1v5_dvp>; 883 884 pwdn-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 885 rockchip,camera-module-index = <1>; 886 rockchip,camera-module-facing = "front"; 887 rockchip,camera-module-name = "CameraKing"; 888 rockchip,camera-module-lens-name = "Largan"; 889 port { 890 gc0312_out: endpoint { 891 remote-endpoint = <&dvp_in_fcam>; 892 }; 893 }; 894 }; 895 896 gc2145: gc2145@3c { 897 status = "okay"; 898 compatible = "galaxycore,gc2145"; 899 reg = <0x3c>; 900 clocks = <&cru SCLK_VIP_OUT>; 901 clock-names = "xvclk"; 902 903 avdd-supply = <&vcc2v8_dvp>; 904 dovdd-supply = <&vcc1v8_dvp>; 905 dvdd-supply = <&vdd1v5_dvp>; 906 907 pwdn-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 908 reset-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>; 909 rockchip,camera-module-index = <0>; 910 rockchip,camera-module-facing = "back"; 911 rockchip,camera-module-name = "CameraKing"; 912 rockchip,camera-module-lens-name = "Largan"; 913 port { 914 gc2145_mipi_out: endpoint { 915 remote-endpoint = <&mipi_in_bcam>; 916 data-lanes = <1>; 917 }; 918 }; 919 }; 920 921 ov8858: ov8858@36 { 922 status = "disabled"; 923 compatible = "ovti,ov8858"; 924 reg = <0x36>; 925 clocks = <&cru SCLK_VIP_OUT>; 926 clock-names = "xvclk"; 927 928 avdd-supply = <&vcc2v8_dvp>; 929 dovdd-supply = <&vcc1v8_dvp>; 930 dvdd-supply = <&vdd1v5_dvp>; 931 932 pwdn-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 933 reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 934 rockchip,camera-module-index = <0>; 935 rockchip,camera-module-facing = "back"; 936 rockchip,camera-module-name = "CameraKing"; 937 rockchip,camera-module-lens-name = "Largan-9569A2"; 938 port { 939 ov8858_out: endpoint { 940 remote-endpoint = <&mipi_in>; 941 data-lanes = <1 2>; 942 }; 943 }; 944 }; 945}; 946 947&i2c4 { 948 status = "okay"; 949 950 sensor@26 { 951 compatible = "gs_da223"; 952 reg = <0x26>; 953 type = <SENSOR_TYPE_ACCEL>; 954 irq_enable = <0>; 955 poll_delay_ms = <10>; 956 layout = <3>; 957 }; 958 959 sensor@19 { 960 compatible = "gs_sc7a20"; 961 reg = <0x19>; 962 type = <SENSOR_TYPE_ACCEL>; 963 irq_enable = <0>; 964 poll_delay_ms = <10>; 965 layout = <1>; 966 }; 967 968 mpu6500@68 { 969 status = "disabled"; 970 compatible = "invensense,mpu6500"; 971 pinctrl-names = "default"; 972 pinctrl-0 = <&mpu6500_irq_gpio>; 973 reg = <0x68>; 974 irq-gpio = <&gpio3 14 IRQ_TYPE_EDGE_RISING>; 975 mpu-int_config = <0x10>; 976 mpu-level_shifter = <0>; 977 mpu-orientation = <1 0 0 0 1 0 0 0 1>; 978 orientation-x= <1>; 979 orientation-y= <0>; 980 orientation-z= <1>; 981 support-hw-poweroff = <1>; 982 mpu-debug = <1>; 983 }; 984 985 sensor@4c { 986 status = "disabled"; 987 compatible = "gs_mc3230"; 988 reg = <0x4c>; 989 type = <SENSOR_TYPE_ACCEL>; 990 irq_enable = <0>; 991 poll_delay_ms = <30>; 992 layout = <9>; 993 reprobe_en = <1>; 994 irq-gpio = <&gpio3 RK_PB6 IRQ_TYPE_LEVEL_LOW>; 995 }; 996 997 sensor@18 { 998 status = "gs_mc3230"; 999 compatible = "gs_sc7a30"; 1000 reg = <0x18>; 1001 type = <SENSOR_TYPE_ACCEL>; 1002 irq-gpio = <&gpio3 RK_PB6 IRQ_TYPE_LEVEL_LOW>; 1003 irq_enable = <0>; 1004 poll_delay_ms = <30>; 1005 layout = <6>; 1006 reprobe_en = <1>; 1007 }; 1008 1009 sensor@10 { 1010 status = "gs_mc3230"; 1011 compatible = "light_cm3218"; 1012 pinctrl-names = "default"; 1013 pinctrl-0 = <&cm3218_irq_gpio>; 1014 reg = <0x10>; 1015 type = <SENSOR_TYPE_LIGHT>; 1016 irq-gpio = <&gpio3 15 IRQ_TYPE_EDGE_FALLING>; 1017 irq_enable = <1>; 1018 poll_delay_ms = <30>; 1019 }; 1020}; 1021 1022&i2s_8ch { 1023 status = "okay"; 1024 rockchip,i2s-broken-burst-len; 1025 rockchip,playback-channels = <8>; 1026 rockchip,capture-channels = <2>; 1027 #sound-dai-cells = <0>; 1028}; 1029 1030&io_domains { 1031 status = "okay"; 1032 1033 dvp-supply = <&vcc1v8_dvp>; 1034 audio-supply = <&vcc_io>; 1035 gpio30-supply = <&vcc_io>; 1036 gpio1830-supply = <&vcc_io>; 1037 sdcard-supply = <&vccio_sd>; 1038 wifi-supply = <&vcc_3v3>; 1039}; 1040 1041&isp_dvp_d2d9 { 1042 rockchip,pins = 1043 /* cif_data4 ... cif_data9 */ 1044 <1 RK_PA2 1 &pcfg_pull_down>, 1045 <1 RK_PA3 1 &pcfg_pull_down>, 1046 <1 RK_PA4 1 &pcfg_pull_down>, 1047 <1 RK_PA5 1 &pcfg_pull_down>, 1048 <1 RK_PA6 1 &pcfg_pull_down>, 1049 <1 RK_PA7 1 &pcfg_pull_down>, 1050 /* cif_sync, cif_href */ 1051 <1 RK_PB0 1 &pcfg_pull_down>, 1052 <1 RK_PB1 1 &pcfg_pull_down>, 1053 /* cif_clkin */ 1054 <1 RK_PB2 1 &pcfg_pull_down>; 1055}; 1056 1057&isp_dvp_d10d11 { 1058 rockchip,pins = 1059 /* cif_data10, cif_data11 */ 1060 <1 RK_PB6 1 &pcfg_pull_down>, 1061 <1 RK_PB7 1 &pcfg_pull_down>; 1062}; 1063 1064&isp_mmu { 1065 status = "okay"; 1066}; 1067 1068&mipi_dphy_rx0 { 1069 status = "okay"; 1070 1071 ports { 1072 #address-cells = <1>; 1073 #size-cells = <0>; 1074 1075 port@0 { 1076 reg = <0>; 1077 #address-cells = <1>; 1078 #size-cells = <0>; 1079 mipi_in_bcam: endpoint@0 { 1080 reg = <0>; 1081 remote-endpoint = <&gc2145_mipi_out>; 1082 data-lanes = <1>; 1083 }; 1084 1085 mipi_in: endpoint@1 { 1086 reg = <1>; 1087 remote-endpoint = <&ov8858_out>; 1088 data-lanes = <1 2>; 1089 }; 1090 }; 1091 1092 port@1 { 1093 reg = <1>; 1094 #address-cells = <1>; 1095 #size-cells = <0>; 1096 1097 dphy_rx_out: endpoint@0 { 1098 reg = <0>; 1099 remote-endpoint = <&isp_mipi_in>; 1100 }; 1101 }; 1102 }; 1103}; 1104 1105&nandc0 { 1106 status = "okay"; 1107}; 1108 1109&pmu_io_domains { 1110 status = "okay"; 1111 1112 pmu-supply = <&vcc3v3_pmu>; 1113 vop-supply = <&vcc3v3_pmu>; 1114}; 1115 1116&pwm0 { 1117 status = "okay"; 1118}; 1119 1120&pinctrl { 1121 1122 headphone { 1123 hp_det: hp-det { 1124 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 1125 }; 1126 }; 1127 1128 pmic { 1129 pmic_int: pmic_int { 1130 rockchip,pins = 1131 <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 1132 }; 1133 1134 soc_slppin_gpio: soc_slppin_gpio { 1135 rockchip,pins = 1136 <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_low>; 1137 }; 1138 1139 soc_slppin_slp: soc_slppin_slp { 1140 rockchip,pins = 1141 <0 RK_PA0 1 &pcfg_pull_none>; 1142 }; 1143 1144 soc_slppin_rst: soc_slppin_rst { 1145 rockchip,pins = 1146 <0 RK_PA0 2 &pcfg_pull_none>; 1147 }; 1148 1149 vsel_gpio: vsel-gpio { 1150 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; 1151 }; 1152 }; 1153 1154 mpu6500 { 1155 mpu6500_irq_gpio: mpu6500-irq-gpio { 1156 rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 1157 }; 1158 }; 1159 1160 cm3218 { 1161 cm3218_irq_gpio: cm3218-irq-gpio { 1162 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; 1163 }; 1164 }; 1165 1166 dc_det { 1167 dc_irq_gpio: dc-irq-gpio { 1168 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; 1169 }; 1170 }; 1171 1172 pcfg_pull_none_4ma: pcfg-pull-none-4ma { 1173 bias-disable; 1174 drive-strength = <4>; 1175 }; 1176 1177 pcfg_pull_none_smt: pcfg-pull-none-smt { 1178 bias-disable; 1179 input-schmitt-enable; 1180 }; 1181 1182 pcfg_output_high: pcfg-output-high { 1183 output-high; 1184 }; 1185 1186 pcfg_output_low: pcfg-output-low { 1187 output-low; 1188 }; 1189 1190 pcfg_input_high: pcfg-input-high { 1191 bias-pull-up; 1192 input-enable; 1193 }; 1194 1195 pcfg_input: pcfg-input { 1196 input-enable; 1197 }; 1198 1199 sdio-pwrseq { 1200 wifi_enable_h: wifi-enable-h { 1201 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 1202 }; 1203 }; 1204 1205 usb2 { 1206 host_vbus_drv: host-vbus-drv { 1207 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 1208 }; 1209 }; 1210 1211 wireless-bluetooth { 1212 uart0_rts_gpio: uart0-rts-gpio { 1213 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 1214 }; 1215 }; 1216}; 1217 1218&rkisp1 { 1219 status = "okay"; 1220 pinctrl-names = "default"; 1221 pinctrl-0 = <&isp_dvp_d2d9 &isp_dvp_d10d11 &cif_clkout>; 1222 port { 1223 #address-cells = <1>; 1224 #size-cells = <0>; 1225 1226 dvp_in_fcam: endpoint@0 { 1227 reg = <0>; 1228 remote-endpoint = <&gc0312_out>; 1229 }; 1230 1231 isp_mipi_in: endpoint@1 { 1232 reg = <1>; 1233 remote-endpoint = <&dphy_rx_out>; 1234 }; 1235 }; 1236}; 1237 1238&route_dsi { 1239 status = "okay"; 1240}; 1241 1242&rockchip_suspend { 1243 status = "okay"; 1244 Rockchip,sleep-debug-en = <1>; 1245 rockchip,sleep-mode-config = < 1246 (0 1247 | RKPM_SLP_ARMOFF 1248 | RKPM_SLP_PMU_PLLS_PWRDN 1249 | RKPM_SLP_PMU_PMUALIVE_32K 1250 | RKPM_SLP_SFT_PLLS_DEEP 1251 | RKPM_SLP_PMU_DIS_OSC 1252 | RKPM_SLP_SFT_PD_NBSCUS 1253 ) 1254 >; 1255 rockchip,wakeup-config = < 1256 (0 1257 | RKPM_GPIO_WKUP_EN 1258 | RKPM_USB_WKUP_EN 1259 | RKPM_CLUSTER_L_WKUP_EN 1260 ) 1261 >; 1262}; 1263 1264&saradc { 1265 status = "okay"; 1266}; 1267 1268&sdmmc { 1269 clock-frequency = <37500000>; 1270 clock-freq-min-max = <400000 37500000>; 1271 no-sdio; 1272 no-mmc; 1273 cap-mmc-highspeed; 1274 cap-sd-highspeed; 1275 card-detect-delay = <200>; 1276 disable-wp; 1277 num-slots = <1>; 1278 vmmc-supply = <&vcc_sd>; 1279 pinctrl-names = "default"; 1280 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 1281 status = "disabled"; 1282}; 1283 1284&sdio0 { 1285 max-frequency = <50000000>; 1286 no-sd; 1287 no-mmc; 1288 bus-width = <4>; 1289 disable-wp; 1290 cap-sd-highspeed; 1291 cap-sdio-irq; 1292 keep-power-in-suspend; 1293 mmc-pwrseq = <&sdio_pwrseq>; 1294 non-removable; 1295 num-slots = <1>; 1296 pinctrl-names = "default"; 1297 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 1298 rockchip,default-sample-phase = <90>; 1299 status = "okay"; 1300}; 1301 1302&tsadc { 1303 tsadc-supply = <&vdd_cpu>; 1304 status = "okay"; 1305}; 1306 1307&uart0 { 1308 pinctrl-names = "default"; 1309 pinctrl-0 = <&uart0_xfer &uart0_cts>; 1310 status = "okay"; 1311}; 1312 1313&u2phy { 1314 status = "okay"; 1315 1316 u2phy_otg: otg-port { 1317 status = "okay"; 1318 }; 1319 1320 u2phy_host: host-port { 1321 phy-supply = <&vcc_host>; 1322 status = "okay"; 1323 }; 1324}; 1325 1326&usb_host0_ehci { 1327 status = "okay"; 1328}; 1329 1330&usb_host0_ohci { 1331 status = "okay"; 1332}; 1333 1334