1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4 */ 5 6/dts-v1/; 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/sensor-dev.h> 10#include "rk3368.dtsi" 11#include "rk3368-android.dtsi" 12/ { 13 model = "Rockchip rk3368a tablet rk817 board"; 14 compatible = "rockchip,tablet", "rockchip,rk3368a", "rockchip,rk3368"; 15 16 adc_keys: adc-keys { 17 compatible = "adc-keys"; 18 io-channels = <&saradc 1>; 19 io-channel-names = "buttons"; 20 keyup-threshold-microvolt = <1024000>; 21 poll-interval = <100>; 22 23 vol-up-key { 24 label = "volume up"; 25 linux,code = <KEY_VOLUMEUP>; 26 press-threshold-microvolt = <1000>; 27 }; 28 29 vol-down-key { 30 label = "volume down"; 31 linux,code = <KEY_VOLUMEDOWN>; 32 press-threshold-microvolt = <170000>; 33 }; 34 }; 35 36 backlight: backlight { 37 compatible = "pwm-backlight"; 38 pwms = <&pwm0 0 25000 1>; 39 brightness-levels = < 40 10 10 10 11 12 13 14 15 41 16 16 16 16 16 16 16 16 42 17 17 17 17 17 17 17 17 43 18 18 18 18 18 18 18 18 44 19 19 19 19 19 19 19 19 45 20 20 20 20 20 20 20 20 46 21 21 21 21 21 21 21 21 47 22 22 22 22 22 22 22 22 48 23 23 23 23 23 23 23 23 49 24 24 24 24 24 24 24 24 50 25 25 25 25 25 25 25 25 51 26 26 26 26 26 26 26 26 52 27 27 27 27 27 27 27 27 53 28 28 28 28 28 28 28 28 54 27 27 27 27 27 27 27 27 55 30 30 30 30 30 30 30 30 56 31 31 31 31 31 31 31 31 57 32 32 32 32 32 32 32 32 58 33 33 33 33 33 33 33 33 59 34 34 34 34 34 34 34 34 60 35 35 35 35 35 35 35 35 61 36 36 36 36 36 36 36 36 62 37 37 37 37 37 37 37 37 63 38 38 38 38 38 38 38 38 64 38 38 38 38 38 38 38 38 65 38 38 38 38 38 38 38 38 66 38 38 38 38 38 38 38 38 67 38 38 38 38 38 38 38 38 68 38 38 38 38 38 38 38 38 69 38 38 38 38 38 38 38 38 70 38 38 38 38 38 38 38 38>; 71 default-brightness-level = <200>; 72 enable-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; 73 }; 74 75 charge-animation { 76 compatible = "rockchip,uboot-charge"; 77 rockchip,uboot-charge-on = <1>; 78 rockchip,android-charge-on = <0>; 79 rockchip,uboot-low-power-voltage = <3500>; 80 rockchip,screen-on-voltage = <3600>; 81 status = "okay"; 82 }; 83 84 chosen: chosen { 85 bootargs = "earlycon=uart8250,mmio32,0xff690000 console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0"; 86 }; 87 88 rk817-sound { 89 compatible = "simple-audio-card"; 90 simple-audio-card,format = "i2s"; 91 simple-audio-card,name = "rockchip-rk817-codec"; 92 simple-audio-card,mclk-fs = <256>; 93 simple-audio-card,widgets = 94 "Microphone", "Mic Jack", 95 "Headphone", "Headphone Jack"; 96 simple-audio-card,routing = 97 "Mic Jack", "MICBIAS1", 98 "IN1P", "Mic Jack", 99 "Headphone Jack", "HPOL", 100 "Headphone Jack", "HPOR"; 101 simple-audio-card,cpu { 102 sound-dai = <&i2s_8ch>; 103 }; 104 simple-audio-card,codec { 105 sound-dai = <&rk817_codec>; 106 }; 107 }; 108 109 rk_headset: rk-headset { 110 compatible = "rockchip_headset"; 111 headset_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 112 pinctrl-names = "default"; 113 pinctrl-0 = <&hp_det>; 114 io-channels = <&saradc 2>; 115 }; 116 117 sdio_pwrseq: sdio-pwrseq { 118 compatible = "mmc-pwrseq-simple"; 119 pinctrl-names = "default"; 120 pinctrl-0 = <&wifi_enable_h>; 121 122 /* 123 * On the module itself this is one of these (depending 124 * on the actual card populated): 125 * - SDIO_RESET_L_WL_REG_ON 126 * - PDN (power down when low) 127 */ 128 reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ 129 }; 130 131 vccsys: vccsys { 132 compatible = "regulator-fixed"; 133 regulator-name = "vcc3v8_sys"; 134 regulator-always-on; 135 regulator-boot-on; 136 regulator-min-microvolt = <3800000>; 137 regulator-max-microvolt = <3800000>; 138 }; 139 140 wireless-wlan { 141 compatible = "wlan-platdata"; 142 /* wifi_chip_type - wifi chip define 143 * ap6210, ap6330, ap6335 144 * rtl8188eu, rtl8723bs, rtl8723bu 145 * esp8089 146 */ 147 wifi_chip_type = "ap6255"; 148 WIFI,vbat_gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>; 149 WIFI,host_wake_irq = <&gpio3 6 GPIO_ACTIVE_HIGH>; 150 status = "okay"; 151 }; 152 153 wireless-bluetooth { 154 compatible = "bluetooth-platdata"; 155 uart_rts_gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; 156 pinctrl-names = "default","rts_gpio"; 157 pinctrl-0 = <&uart0_rts>; 158 pinctrl-1 = <&uart0_rts_gpio>; 159 160 //BT,power_gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>; 161 BT,reset_gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>; 162 BT,wake_gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>; 163 BT,wake_host_irq = <&gpio3 7 GPIO_ACTIVE_HIGH>; 164 165 status = "okay"; 166 }; 167 168 vcc_sys: vcc-sys { 169 compatible = "regulator-fixed"; 170 regulator-name = "vcc_sys"; 171 regulator-always-on; 172 regulator-boot-on; 173 regulator-min-microvolt = <3800000>; 174 regulator-max-microvolt = <3800000>; 175 }; 176 177 vcc_host: vcc-host { 178 compatible = "regulator-fixed"; 179 enable-active-high; 180 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; 181 pinctrl-names = "default"; 182 pinctrl-0 = <&host_vbus_drv>; 183 regulator-name = "vcc_host"; 184 regulator-always-on; 185 }; 186 187 xin32k: xin32k { 188 compatible = "fixed-clock"; 189 clock-frequency = <32768>; 190 clock-output-names = "xin32k"; 191 #clock-cells = <0>; 192 }; 193 194}; 195 196&cif_clkout { 197 /* cif_clkout */ 198 rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none_4ma>; 199}; 200 201&cpu_l0 { 202 cpu-supply = <&vdd_cpu>; 203}; 204 205&cpu_l1 { 206 cpu-supply = <&vdd_cpu>; 207}; 208 209&cpu_l2 { 210 cpu-supply = <&vdd_cpu>; 211}; 212 213&cpu_l3 { 214 cpu-supply = <&vdd_cpu>; 215}; 216 217&cpu_b0 { 218 cpu-supply = <&vdd_cpu>; 219}; 220 221&cpu_b1 { 222 cpu-supply = <&vdd_cpu>; 223}; 224 225&cpu_b2 { 226 cpu-supply = <&vdd_cpu>; 227}; 228 229&cpu_b3 { 230 cpu-supply = <&vdd_cpu>; 231}; 232 233&gpu { 234 logic-supply = <&vdd_logic>; 235}; 236 237&dfi { 238 status = "okay"; 239}; 240 241&dmc { 242 status = "okay"; 243 center-supply = <&vdd_logic>; 244 devfreq-events = <&dfi>; 245 upthreshold = <60>; 246 downdifferential = <20>; 247 system-status-freq = < 248 /*system status freq(KHz)*/ 249 SYS_STATUS_NORMAL 600000 250 SYS_STATUS_REBOOT 600000 251 SYS_STATUS_SUSPEND 240000 252 SYS_STATUS_VIDEO_1080P 396000 253 SYS_STATUS_VIDEO_4K 600000 254 SYS_STATUS_PERFORMANCE 600000 255 SYS_STATUS_BOOST 396000 256 SYS_STATUS_DUALVIEW 600000 257 SYS_STATUS_ISP 528000 258 >; 259 vop-bw-dmc-freq = < 260 /* min_bw(MB/s) max_bw(MB/s) freq(KHz) */ 261 0 582 240000 262 583 99999 396000 263 >; 264 vop-dclk-mode = <1>; 265 auto-min-freq = <240000>; 266 auto-freq-en = <0>; 267}; 268 269&dsi { 270 status = "okay"; 271 272 panel@0 { 273 compatible = "simple-panel-dsi"; 274 reg = <0>; 275 backlight = <&backlight>; 276 enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 277 /* back-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; */ 278 reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 279 prepare-delay-ms = <8>; 280 enable-delay-ms = <3>; 281 reset-delay-ms = <50>; 282 init-delay-ms = <20>; 283 284 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 285 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 286 dsi,format = <MIPI_DSI_FMT_RGB888>; 287 dsi,lanes = <4>; 288 width-mm = <153>; 289 height-mm = <85>; 290 panel-init-sequence = [ 291 05 1e 01 01 292 15 00 02 80 47 293 15 00 02 81 40 294 15 00 02 82 04 295 15 00 02 83 77 296 15 00 02 84 0f 297 15 00 02 85 70 298 15 78 02 86 70 299 ]; 300 panel-exit-sequence = [ 301 05 00 01 28 302 05 00 01 10 303 ]; 304 305 display-timings { 306 native-mode = <&timing0>; 307 308 timing0: timing0 { 309 clock-frequency = <49500000>; 310 hactive = <1024>; 311 vactive = <600>; 312 hback-porch = <120>; 313 hfront-porch = <80>; 314 vback-porch = <14>; 315 vfront-porch = <14>; 316 hsync-len = <40>; 317 vsync-len = <4>; 318 hsync-active = <0>; 319 vsync-active = <0>; 320 de-active = <0>; 321 pixelclk-active = <0>; 322 }; 323 }; 324 }; 325}; 326 327&emmc { 328 bus-width = <8>; 329 cap-mmc-highspeed; 330 mmc-hs200-1_8v; 331 no-sdio; 332 no-sd; 333 disable-wp; 334 non-removable; 335 num-slots = <1>; 336 status = "okay"; 337}; 338 339&i2c0 { 340 status = "okay"; 341 342 vdd_cpu: tcs4526@10 { 343 compatible = "tcs,tcs4526"; 344 reg = <0x10>; 345 regulator-compatible = "fan53555-reg"; 346 pinctrl-0 = <&vsel_gpio>; 347 vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 348 regulator-name = "vdd_cpu"; 349 regulator-min-microvolt = <712500>; 350 regulator-max-microvolt = <1390000>; 351 regulator-ramp-delay = <2300>; 352 fcs,suspend-voltage-selector = <1>; 353 regulator-boot-on; 354 regulator-always-on; 355 regulator-state-mem { 356 regulator-off-in-suspend; 357 }; 358 }; 359 rk817: pmic@20 { 360 compatible = "rockchip,rk817"; 361 reg = <0x20>; 362 interrupt-parent = <&gpio0>; 363 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 364 pinctrl-names = "default", "pmic-sleep", 365 "pmic-power-off", "pmic-reset"; 366 pinctrl-0 = <&pmic_int>; 367 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 368 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 369 pinctrl-3 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 370 rockchip,system-power-controller; 371 wakeup-source; 372 #clock-cells = <1>; 373 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 374 //fb-inner-reg-idxs = <2>; 375 /* 1: rst regs (default in codes), 0: rst the pmic */ 376 pmic-reset-func = <1>; 377 378 vcc1-supply = <&vccsys>; 379 vcc2-supply = <&vccsys>; 380 vcc3-supply = <&vccsys>; 381 vcc4-supply = <&vccsys>; 382 vcc5-supply = <&vccsys>; 383 vcc6-supply = <&vccsys>; 384 vcc7-supply = <&vcc_io>; 385 vcc8-supply = <&vccsys>; 386 vcc9-supply = <&dcdc_boost>; 387 388 pwrkey { 389 status = "okay"; 390 }; 391 392 pinctrl_rk8xx: pinctrl_rk8xx { 393 gpio-controller; 394 #gpio-cells = <2>; 395 396 rk817_ts_gpio1: rk817_ts_gpio1 { 397 pins = "gpio_ts"; 398 function = "pin_fun1"; 399 /* output-low; */ 400 /* input-enable; */ 401 }; 402 403 rk817_gt_gpio2: rk817_gt_gpio2 { 404 pins = "gpio_gt"; 405 function = "pin_fun1"; 406 }; 407 408 rk817_pin_ts: rk817_pin_ts { 409 pins = "gpio_ts"; 410 function = "pin_fun0"; 411 }; 412 413 rk817_pin_gt: rk817_pin_gt { 414 pins = "gpio_gt"; 415 function = "pin_fun0"; 416 }; 417 418 rk817_slppin_null: rk817_slppin_null { 419 pins = "gpio_slp"; 420 function = "pin_fun0"; 421 }; 422 423 rk817_slppin_slp: rk817_slppin_slp { 424 pins = "gpio_slp"; 425 function = "pin_fun1"; 426 }; 427 428 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 429 pins = "gpio_slp"; 430 function = "pin_fun2"; 431 }; 432 433 rk817_slppin_rst: rk817_slppin_rst { 434 pins = "gpio_slp"; 435 function = "pin_fun3"; 436 }; 437 }; 438 439 regulators { 440 vdd_logic: DCDC_REG1 { 441 regulator-always-on; 442 regulator-boot-on; 443 regulator-min-microvolt = <950000>; 444 regulator-max-microvolt = <1350000>; 445 regulator-ramp-delay = <6001>; 446 regulator-initial-mode = <0x2>; 447 regulator-name = "vdd_logic"; 448 regulator-state-mem { 449 regulator-on-in-suspend; 450 regulator-suspend-microvolt = <950000>; 451 }; 452 }; 453 454 vcc_3v3: DCDC_REG2 { 455 regulator-name = "vcc_3v3"; 456 regulator-always-on; 457 regulator-boot-on; 458 regulator-state-mem { 459 regulator-on-in-suspend; 460 }; 461 }; 462 463 vcc_ddr: DCDC_REG3 { 464 regulator-always-on; 465 regulator-boot-on; 466 regulator-initial-mode = <0x2>; 467 regulator-name = "vcc_ddr"; 468 regulator-state-mem { 469 regulator-on-in-suspend; 470 }; 471 }; 472 473 vcc_io: DCDC_REG4 { 474 regulator-always-on; 475 regulator-boot-on; 476 regulator-min-microvolt = <3000000>; 477 regulator-max-microvolt = <3000000>; 478 regulator-name = "vcc_io"; 479 regulator-state-mem { 480 regulator-off-in-suspend; 481 regulator-suspend-microvolt = <3000000>; 482 }; 483 }; 484 485 vcc_1v0: LDO_REG1 { 486 regulator-always-on; 487 regulator-boot-on; 488 regulator-min-microvolt = <1000000>; 489 regulator-max-microvolt = <1000000>; 490 regulator-name = "vcc_1v0"; 491 regulator-state-mem { 492 regulator-on-in-suspend; 493 regulator-suspend-microvolt = <1000000>; 494 }; 495 }; 496 497 vcc1v8_soc: LDO_REG2 { 498 regulator-always-on; 499 regulator-boot-on; 500 regulator-min-microvolt = <1800000>; 501 regulator-max-microvolt = <1800000>; 502 503 regulator-name = "vcc1v8_soc"; 504 regulator-state-mem { 505 regulator-on-in-suspend; 506 regulator-suspend-microvolt = <1800000>; 507 }; 508 }; 509 510 vdd1v0_soc: LDO_REG3 { 511 regulator-always-on; 512 regulator-boot-on; 513 regulator-min-microvolt = <1000000>; 514 regulator-max-microvolt = <1000000>; 515 516 regulator-name = "vcc1v0_soc"; 517 regulator-state-mem { 518 regulator-on-in-suspend; 519 regulator-suspend-microvolt = <1000000>; 520 }; 521 }; 522 523 vcc3v3_pmu: LDO_REG4 { 524 regulator-always-on; 525 regulator-boot-on; 526 regulator-min-microvolt = <3300000>; 527 regulator-max-microvolt = <3300000>; 528 529 regulator-name = "vcc3v3_pmu"; 530 regulator-state-mem { 531 regulator-on-in-suspend; 532 regulator-suspend-microvolt = <3300000>; 533 534 }; 535 }; 536 537 vccio_sd: LDO_REG5 { 538 regulator-always-on; 539 regulator-boot-on; 540 regulator-min-microvolt = <1800000>; 541 regulator-max-microvolt = <3300000>; 542 543 regulator-name = "vccio_sd"; 544 regulator-state-mem { 545 regulator-on-in-suspend; 546 regulator-suspend-microvolt = <3300000>; 547 }; 548 }; 549 550 vcc_sd: LDO_REG6 { 551 regulator-min-microvolt = <3300000>; 552 regulator-max-microvolt = <3300000>; 553 554 regulator-name = "vcc_sd"; 555 regulator-state-mem { 556 regulator-on-in-suspend; 557 regulator-suspend-microvolt = <3300000>; 558 559 }; 560 }; 561 562 vcc2v8_dvp: LDO_REG7 { 563 regulator-boot-on; 564 regulator-min-microvolt = <2800000>; 565 regulator-max-microvolt = <2800000>; 566 567 regulator-name = "vcc2v8_dvp"; 568 regulator-state-mem { 569 regulator-off-in-suspend; 570 regulator-suspend-microvolt = <2800000>; 571 }; 572 }; 573 574 vcc1v8_dvp: LDO_REG8 { 575 regulator-boot-on; 576 regulator-min-microvolt = <1800000>; 577 regulator-max-microvolt = <1800000>; 578 579 regulator-name = "vcc1v8_dvp"; 580 regulator-state-mem { 581 regulator-off-in-suspend; 582 regulator-suspend-microvolt = <1800000>; 583 }; 584 }; 585 586 vdd1v5_dvp: LDO_REG9 { 587 regulator-boot-on; 588 regulator-min-microvolt = <1500000>; 589 regulator-max-microvolt = <1500000>; 590 591 regulator-name = "vdd1v5_dvp"; 592 regulator-state-mem { 593 regulator-off-in-suspend; 594 regulator-suspend-microvolt = <1500000>; 595 }; 596 }; 597 598 dcdc_boost: BOOST { 599 regulator-always-on; 600 regulator-boot-on; 601 regulator-min-microvolt = <5000000>; 602 regulator-max-microvolt = <5000000>; 603 regulator-name = "boost"; 604 }; 605 606 otg_switch: OTG_SWITCH { 607 regulator-name = "otg_switch"; 608 }; 609 }; 610 611 battery { 612 compatible = "rk817,battery"; 613 ocv_table = <3500 3548 3592 3636 3687 3740 3780 614 3806 3827 3846 3864 3889 3929 3964 615 3993 4015 4030 4041 4056 4076 4148>; 616 design_capacity = <4000>; 617 design_qmax = <4200>; 618 bat_res = <100>; 619 sleep_enter_current = <150>; 620 sleep_exit_current = <180>; 621 sleep_filter_current = <100>; 622 power_off_thresd = <3500>; 623 zero_algorithm_vol = <3850>; 624 max_soc_offset = <60>; 625 monitor_sec = <5>; 626 sample_res = <10>; 627 virtual_power = <0>; 628 }; 629 630 charger { 631 compatible = "rk817,charger"; 632 min_input_voltage = <4500>; 633 max_input_current = <1500>; 634 max_chrg_current = <2000>; 635 max_chrg_voltage = <4200>; 636 chrg_term_mode = <0>; 637 chrg_finish_cur = <300>; 638 virtual_power = <0>; 639 dc_det_adc = <0>; 640 extcon = <&u2phy>; 641 }; 642 643 rk817_codec: codec { 644 #sound-dai-cells = <0>; 645 compatible = "rockchip,rk817-codec"; 646 clocks = <&cru SCLK_I2S_8CH_OUT>; 647 clock-names = "mclk"; 648 pinctrl-names = "default"; 649 pinctrl-0 = <&i2s_8ch_mclk>; 650 hp-volume = <20>; 651 spk-volume = <3>; 652 mic-in-differential; 653 status = "okay"; 654 }; 655 }; 656}; 657 658&i2c2 { 659 status = "okay"; 660 661 ts@5a { 662 compatible = "cst2xxse"; 663 reg = <0x5a>; 664 irq-gpio = <&gpio0 RK_PB4 IRQ_TYPE_LEVEL_LOW>; 665 //touch-gpio = <&gpio1 GPIO_B0 IRQ_TYPE_LEVEL_LOW>; /* TP_INT == GPIO1_B0 */ 666 //reset-gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>; /* TP_RST == GPIO0_D1 */ 667 //power-gpio = <&gpio0 GPIO_C5 GPIO_ACTIVE_LOW>; 668 //max-x = <800>; 669 //max-y = <480>; 670 status = "okay"; 671 }; 672}; 673 674&i2c3 { 675 status = "okay"; 676 677 gc0312: gc0312@21 { 678 status = "okay"; 679 compatible = "galaxycore,gc0312"; 680 reg = <0x21>; 681 clocks = <&cru SCLK_VIP_OUT>; 682 clock-names = "xvclk"; 683 684 avdd-supply = <&vcc2v8_dvp>; 685 dovdd-supply = <&vcc1v8_dvp>; 686 dvdd-supply = <&vdd1v5_dvp>; 687 688 pwdn-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 689 690 rockchip,camera-module-index = <1>; 691 rockchip,camera-module-facing = "front"; 692 rockchip,camera-module-name = "CameraKing"; 693 rockchip,camera-module-lens-name = "Largan"; 694 port { 695 gc0312_out: endpoint { 696 remote-endpoint = <&dvp_in_fcam>; 697 }; 698 }; 699 }; 700 701 gc2145: gc2145@3c { 702 status = "okay"; 703 compatible = "galaxycore,gc2145"; 704 reg = <0x3c>; 705 clocks = <&cru SCLK_VIP_OUT>; 706 clock-names = "xvclk"; 707 708 avdd-supply = <&vcc2v8_dvp>; 709 dovdd-supply = <&vcc1v8_dvp>; 710 dvdd-supply = <&vdd1v5_dvp>; 711 712 pwdn-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 713 reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 714 rockchip,camera-module-index = <0>; 715 rockchip,camera-module-facing = "back"; 716 rockchip,camera-module-name = "CameraKing"; 717 rockchip,camera-module-lens-name = "Largan"; 718 port { 719 gc2145_out: endpoint { 720 remote-endpoint = <&dvp_in_bcam>; 721 }; 722 }; 723 }; 724 725 ov8858: ov8858@36 { 726 status = "disabled"; 727 compatible = "ovti,ov8858"; 728 reg = <0x36>; 729 clocks = <&cru SCLK_VIP_OUT>; 730 clock-names = "xvclk"; 731 732 avdd-supply = <&vcc2v8_dvp>; 733 dovdd-supply = <&vcc1v8_dvp>; 734 dvdd-supply = <&vdd1v5_dvp>; 735 736 pwdn-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 737 reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 738 rockchip,camera-module-index = <0>; 739 rockchip,camera-module-facing = "back"; 740 rockchip,camera-module-name = "CameraKing"; 741 rockchip,camera-module-lens-name = "Largan-9569A2"; 742 port { 743 ov8858_out: endpoint { 744 remote-endpoint = <&mipi_in>; 745 data-lanes = <1 2>; 746 }; 747 }; 748 }; 749}; 750 751&i2c4 { 752 status = "okay"; 753 754 sc7a30: sc7a30@18 { 755 status = "okay"; 756 compatible = "gs_sc7a30"; 757 reg = <0x18>; 758 type = <SENSOR_TYPE_ACCEL>; 759 pinctrl-names = "default"; 760 pinctrl-0 = <&sc7a30_irq_gpio>; 761 irq-gpio = <&gpio3 RK_PB6 IRQ_TYPE_LEVEL_LOW>; 762 irq_enable = <0>; 763 poll_delay_ms = <30>; 764 layout = <6>; 765 reprobe_en = <1>; 766 }; 767 768}; 769 770&i2s_8ch { 771 status = "okay"; 772 rockchip,i2s-broken-burst-len; 773 rockchip,playback-channels = <8>; 774 rockchip,capture-channels = <2>; 775 #sound-dai-cells = <0>; 776}; 777 778&io_domains { 779 status = "okay"; 780 781 dvp-supply = <&vcc1v8_dvp>; 782 audio-supply = <&vcc_io>; 783 gpio30-supply = <&vcc_io>; 784 gpio1830-supply = <&vcc_io>; 785 sdcard-supply = <&vccio_sd>; 786 wifi-supply = <&vcc_3v3>; 787}; 788 789&isp_dvp_d2d9 { 790 rockchip,pins = 791 /* cif_data4 ... cif_data9 */ 792 <1 RK_PA2 1 &pcfg_pull_down>, 793 <1 RK_PA3 1 &pcfg_pull_down>, 794 <1 RK_PA4 1 &pcfg_pull_down>, 795 <1 RK_PA5 1 &pcfg_pull_down>, 796 <1 RK_PA6 1 &pcfg_pull_down>, 797 <1 RK_PA7 1 &pcfg_pull_down>, 798 /* cif_sync, cif_href */ 799 <1 RK_PB0 1 &pcfg_pull_down>, 800 <1 RK_PB1 1 &pcfg_pull_down>, 801 /* cif_clkin */ 802 <1 RK_PB2 1 &pcfg_pull_down>; 803}; 804 805&isp_dvp_d10d11 { 806 rockchip,pins = 807 /* cif_data10, cif_data11 */ 808 <1 RK_PB6 1 &pcfg_pull_down>, 809 <1 RK_PB7 1 &pcfg_pull_down>; 810}; 811 812&isp_mmu { 813 status = "okay"; 814}; 815 816&mipi_dphy_rx0 { 817 status = "disabled"; 818 819 ports { 820 #address-cells = <1>; 821 #size-cells = <0>; 822 823 port@0 { 824 reg = <0>; 825 #address-cells = <1>; 826 #size-cells = <0>; 827 828 mipi_in: endpoint@1 { 829 reg = <1>; 830 remote-endpoint = <&ov8858_out>; 831 data-lanes = <1 2>; 832 }; 833 }; 834 835 port@1 { 836 reg = <1>; 837 #address-cells = <1>; 838 #size-cells = <0>; 839 840 dphy_rx_out: endpoint@0 { 841 reg = <0>; 842 remote-endpoint = <&isp_mipi_in>; 843 }; 844 }; 845 }; 846}; 847 848&nandc0 { 849 status = "okay"; 850}; 851 852&pmu_io_domains { 853 status = "okay"; 854 855 pmu-supply = <&vcc3v3_pmu>; 856 vop-supply = <&vcc3v3_pmu>; 857}; 858 859&pwm0 { 860 status = "okay"; 861}; 862 863&pinctrl { 864 865 headphone { 866 hp_det: hp-det { 867 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 868 }; 869 }; 870 871 pmic { 872 pmic_int: pmic_int { 873 rockchip,pins = 874 <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 875 }; 876 877 soc_slppin_gpio: soc_slppin_gpio { 878 rockchip,pins = 879 <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_low>; 880 }; 881 882 soc_slppin_slp: soc_slppin_slp { 883 rockchip,pins = 884 <0 RK_PA0 1 &pcfg_pull_none>; 885 }; 886 887 soc_slppin_rst: soc_slppin_rst { 888 rockchip,pins = 889 <0 RK_PA0 2 &pcfg_pull_none>; 890 }; 891 892 vsel_gpio: vsel-gpio { 893 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; 894 }; 895 }; 896 897 sc7a30 { 898 sc7a30_irq_gpio: sc7a30_irq_gpio { 899 rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 900 }; 901 }; 902 903 dc_det { 904 dc_irq_gpio: dc-irq-gpio { 905 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; 906 }; 907 }; 908 909 pcfg_pull_none_4ma: pcfg-pull-none-4ma { 910 bias-disable; 911 drive-strength = <4>; 912 }; 913 914 pcfg_pull_none_smt: pcfg-pull-none-smt { 915 bias-disable; 916 input-schmitt-enable; 917 }; 918 919 pcfg_output_high: pcfg-output-high { 920 output-high; 921 }; 922 923 pcfg_output_low: pcfg-output-low { 924 output-low; 925 }; 926 927 pcfg_input_high: pcfg-input-high { 928 bias-pull-up; 929 input-enable; 930 }; 931 932 pcfg_input: pcfg-input { 933 input-enable; 934 }; 935 936 sdio-pwrseq { 937 wifi_enable_h: wifi-enable-h { 938 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 939 }; 940 }; 941 942 usb2 { 943 host_vbus_drv: host-vbus-drv { 944 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 945 }; 946 }; 947 948 wireless-bluetooth { 949 uart0_rts_gpio: uart0-rts-gpio { 950 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 951 }; 952 }; 953}; 954 955&rkisp1 { 956 status = "okay"; 957 pinctrl-names = "default"; 958 pinctrl-0 = <&isp_dvp_d2d9 &isp_dvp_d10d11 &cif_clkout>; 959 port { 960 #address-cells = <1>; 961 #size-cells = <0>; 962 963 dvp_in_fcam: endpoint@0 { 964 reg = <0>; 965 remote-endpoint = <&gc0312_out>; 966 }; 967 968 dvp_in_bcam: endpoint@1 { 969 reg = <1>; 970 remote-endpoint = <&gc2145_out>; 971 }; 972 973 isp_mipi_in: endpoint@2 { 974 reg = <2>; 975 remote-endpoint = <&dphy_rx_out>; 976 }; 977 }; 978}; 979 980&route_dsi { 981 status = "okay"; 982}; 983 984&rockchip_suspend { 985 status = "okay"; 986 rockchip,sleep-mode-config = < 987 (0 988 | RKPM_SLP_ARMOFF 989 | RKPM_SLP_PMU_PLLS_PWRDN 990 | RKPM_SLP_PMU_PMUALIVE_32K 991 | RKPM_SLP_SFT_PLLS_DEEP 992 | RKPM_SLP_PMU_DIS_OSC 993 | RKPM_SLP_SFT_PD_NBSCUS 994 ) 995 >; 996 rockchip,wakeup-config = < 997 (0 998 | RKPM_GPIO_WKUP_EN 999 | RKPM_USB_WKUP_EN 1000 | RKPM_CLUSTER_L_WKUP_EN 1001 ) 1002 >; 1003}; 1004 1005&saradc { 1006 status = "okay"; 1007}; 1008 1009&sdmmc { 1010 clock-frequency = <37500000>; 1011 clock-freq-min-max = <400000 37500000>; 1012 no-sdio; 1013 no-mmc; 1014 cap-mmc-highspeed; 1015 cap-sd-highspeed; 1016 card-detect-delay = <200>; 1017 disable-wp; 1018 num-slots = <1>; 1019 pinctrl-names = "default"; 1020 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 1021 vmmc-supply = <&vcc_sd>; 1022 status = "disabled"; 1023}; 1024 1025&sdio0 { 1026 max-frequency = <50000000>; 1027 no-sd; 1028 no-mmc; 1029 bus-width = <4>; 1030 disable-wp; 1031 cap-sd-highspeed; 1032 cap-sdio-irq; 1033 keep-power-in-suspend; 1034 mmc-pwrseq = <&sdio_pwrseq>; 1035 non-removable; 1036 num-slots = <1>; 1037 pinctrl-names = "default"; 1038 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 1039 rockchip,default-sample-phase = <90>; 1040 status = "okay"; 1041}; 1042 1043&tsadc { 1044 tsadc-supply = <&vdd_cpu>; 1045 status = "okay"; 1046}; 1047 1048&uart0 { 1049 pinctrl-names = "default"; 1050 pinctrl-0 = <&uart0_xfer &uart0_cts>; 1051 status = "okay"; 1052}; 1053 1054&u2phy { 1055 status = "okay"; 1056 1057 u2phy_otg: otg-port { 1058 status = "okay"; 1059 }; 1060 1061 u2phy_host: host-port { 1062 phy-supply = <&vcc_host>; 1063 status = "okay"; 1064 }; 1065}; 1066 1067&usb_host0_ehci { 1068 status = "okay"; 1069}; 1070 1071&usb_host0_ohci { 1072 status = "okay"; 1073}; 1074 1075