1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/sensor-dev.h> 10#include "rk3368.dtsi" 11#include "rk3368-android.dtsi" 12/ { 13 model = "Rockchip rk3368 tablet board"; 14 compatible = "rockchip,tablet", "rockchip,rk3368"; 15 16 adc_keys: adc-keys { 17 compatible = "adc-keys"; 18 io-channels = <&saradc 1>; 19 io-channel-names = "buttons"; 20 keyup-threshold-microvolt = <1024000>; 21 poll-interval = <100>; 22 23 vol-up-key { 24 label = "volume up"; 25 linux,code = <KEY_VOLUMEUP>; 26 press-threshold-microvolt = <1000>; 27 }; 28 29 vol-down-key { 30 label = "volume down"; 31 linux,code = <KEY_VOLUMEDOWN>; 32 press-threshold-microvolt = <170000>; 33 }; 34 }; 35 36 vcc_camera: vcc-camera-regulator { 37 compatible = "regulator-fixed"; 38 gpio = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; 39 pinctrl-names = "default"; 40 pinctrl-0 = <&camera_pwr>; 41 regulator-name = "vcc_camera"; 42 enable-active-high; 43 regulator-always-on; 44 regulator-boot-on; 45 }; 46 47 backlight: backlight { 48 compatible = "pwm-backlight"; 49 pwms = <&pwm0 0 25000 1>; 50 brightness-levels = < 51 0 1 2 3 4 5 6 7 52 8 9 10 11 12 13 14 15 53 16 16 16 16 16 16 16 16 54 17 17 17 17 17 17 17 17 55 18 18 18 18 18 18 18 18 56 19 19 19 19 19 19 19 19 57 20 20 20 20 20 20 20 20 58 21 21 21 21 21 21 21 21 59 22 22 22 22 22 22 22 22 60 23 23 23 23 23 23 23 23 61 24 24 24 24 24 24 24 24 62 25 25 25 25 25 25 25 25 63 26 26 26 26 26 26 26 26 64 27 27 27 27 27 27 27 27 65 28 28 28 28 28 28 28 28 66 27 27 27 27 27 27 27 27 67 30 30 30 30 30 30 30 30 68 31 31 31 31 31 31 31 31 69 32 32 32 32 32 32 32 32 70 33 33 33 33 33 33 33 33 71 34 34 34 34 34 34 34 34 72 35 35 35 35 35 35 35 35 73 36 36 36 36 36 36 36 36 74 37 37 37 37 37 37 37 37 75 38 38 38 38 38 38 38 38 76 38 38 38 38 38 38 38 38 77 38 38 38 38 38 38 38 38 78 38 38 38 38 38 38 38 38 79 38 38 38 38 38 38 38 38 80 38 38 38 38 38 38 38 38 81 38 38 38 38 38 38 38 38 82 38 38 38 38 38 38 38 38>; 83 default-brightness-level = <200>; 84 enable-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; 85 }; 86 87 charge-animation { 88 compatible = "rockchip,uboot-charge"; 89 rockchip,uboot-charge-on = <1>; 90 rockchip,android-charge-on = <0>; 91 rockchip,uboot-low-power-voltage = <3500>; 92 rockchip,screen-on-voltage = <3600>; 93 status = "okay"; 94 }; 95 96 chosen: chosen { 97 bootargs = "earlycon=uart8250,mmio32,0xff690000 console=ttyFIQ0 androidboot.baseband=N/A androidboot.veritymode=enforcing androidboot.hardware=rk30board androidboot.console=ttyFIQ0 init=/init kpti=0"; 98 }; 99 100 es8316-sound { 101 compatible = "simple-audio-card"; 102 simple-audio-card,format = "i2s"; 103 simple-audio-card,name = "rockchip,es8316-codec"; 104 simple-audio-card,mclk-fs = <256>; 105 simple-audio-card,widgets = 106 "Microphone", "Mic Jack", 107 "Headphone", "Headphone Jack"; 108 simple-audio-card,routing = 109 "Mic Jack", "MICBIAS1", 110 "IN1P", "Mic Jack", 111 "Headphone Jack", "HPOL", 112 "Headphone Jack", "HPOR"; 113 simple-audio-card,cpu { 114 sound-dai = <&i2s_8ch>; 115 system-clock-frequency = <11289600>; 116 }; 117 simple-audio-card,codec { 118 sound-dai = <&es8316>; 119 system-clock-frequency = <11289600>; 120 }; 121 }; 122 123 rk_headset: rk-headset { 124 compatible = "rockchip_headset"; 125 headset_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 126 pinctrl-names = "default"; 127 pinctrl-0 = <&hp_det>; 128 io-channels = <&saradc 2>; 129 }; 130 131 sdio_pwrseq: sdio-pwrseq { 132 compatible = "mmc-pwrseq-simple"; 133 clocks = <&rk818 1>; 134 clock-names = "ext_clock"; 135 pinctrl-names = "default"; 136 pinctrl-0 = <&wifi_enable_h>; 137 138 /* 139 * On the module itself this is one of these (depending 140 * on the actual card populated): 141 * - SDIO_RESET_L_WL_REG_ON 142 * - PDN (power down when low) 143 */ 144 reset-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ 145 }; 146 147 gpio_keys: gpio-keys { 148 compatible = "gpio-keys"; 149 autorepeat; 150 151 power { 152 debounce-interval = <100>; 153 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 154 label = "GPIO Key Power"; 155 linux,code = <KEY_POWER>; 156 wakeup-source; 157 }; 158 }; 159 160 wireless-wlan { 161 compatible = "wlan-platdata"; 162 /* wifi_chip_type - wifi chip define 163 * ap6210, ap6330, ap6335 164 * rtl8188eu, rtl8723bs, rtl8723bu 165 * esp8089 166 */ 167 wifi_chip_type = "ap6255"; 168 WIFI,host_wake_irq = <&gpio3 6 GPIO_ACTIVE_HIGH>; 169 status = "okay"; 170 }; 171 172 wireless-bluetooth { 173 compatible = "bluetooth-platdata"; 174 clocks = <&rk818 1>; 175 clock-names = "ext_clock"; 176 uart_rts_gpios = <&gpio2 27 GPIO_ACTIVE_LOW>; 177 pinctrl-names = "default","rts_gpio"; 178 pinctrl-0 = <&uart0_rts>; 179 pinctrl-1 = <&uart0_rts_gpio>; 180 181 //BT,power_gpio = <&gpio3 3 GPIO_ACTIVE_HIGH>; 182 BT,reset_gpio = <&gpio3 5 GPIO_ACTIVE_HIGH>; 183 BT,wake_gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>; 184 BT,wake_host_irq = <&gpio3 7 GPIO_ACTIVE_HIGH>; 185 186 status = "okay"; 187 }; 188 189 vcc_sys: vcc-sys { 190 compatible = "regulator-fixed"; 191 regulator-name = "vcc_sys"; 192 regulator-always-on; 193 regulator-boot-on; 194 regulator-min-microvolt = <3800000>; 195 regulator-max-microvolt = <3800000>; 196 }; 197 198 vcc_host: vcc-host { 199 compatible = "regulator-fixed"; 200 enable-active-high; 201 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>; 202 pinctrl-names = "default"; 203 pinctrl-0 = <&host_vbus_drv>; 204 regulator-name = "vcc_host"; 205 regulator-always-on; 206 }; 207 208 xin32k: xin32k { 209 compatible = "fixed-clock"; 210 clock-frequency = <32768>; 211 clock-output-names = "xin32k"; 212 #clock-cells = <0>; 213 }; 214 215}; 216 217&cif_clkout { 218 /* cif_clkout */ 219 rockchip,pins = <1 RK_PB3 1 &pcfg_pull_none_4ma>; 220}; 221 222&cpu_l0 { 223 cpu-supply = <&vdd_cpu>; 224}; 225 226&cpu_l1 { 227 cpu-supply = <&vdd_cpu>; 228}; 229 230&cpu_l2 { 231 cpu-supply = <&vdd_cpu>; 232}; 233 234&cpu_l3 { 235 cpu-supply = <&vdd_cpu>; 236}; 237 238&cpu_b0 { 239 cpu-supply = <&vdd_cpu>; 240}; 241 242&cpu_b1 { 243 cpu-supply = <&vdd_cpu>; 244}; 245 246&cpu_b2 { 247 cpu-supply = <&vdd_cpu>; 248}; 249 250&cpu_b3 { 251 cpu-supply = <&vdd_cpu>; 252}; 253 254&gpu { 255 logic-supply = <&vdd_logic>; 256}; 257 258&dfi { 259 status = "okay"; 260}; 261 262&dmc { 263 status = "okay"; 264 center-supply = <&vdd_logic>; 265 devfreq-events = <&dfi>; 266 upthreshold = <60>; 267 downdifferential = <20>; 268 system-status-freq = < 269 /*system status freq(KHz)*/ 270 SYS_STATUS_NORMAL 600000 271 SYS_STATUS_REBOOT 600000 272 SYS_STATUS_SUSPEND 240000 273 SYS_STATUS_VIDEO_1080P 396000 274 SYS_STATUS_VIDEO_4K 600000 275 SYS_STATUS_PERFORMANCE 600000 276 SYS_STATUS_BOOST 396000 277 SYS_STATUS_DUALVIEW 600000 278 SYS_STATUS_ISP 528000 279 >; 280 vop-bw-dmc-freq = < 281 /* min_bw(MB/s) max_bw(MB/s) freq(KHz) */ 282 0 582 240000 283 583 99999 396000 284 >; 285 auto-min-freq = <240000>; 286 auto-freq-en = <1>; 287}; 288 289&dsi { 290 status = "okay"; 291 292 panel@0 { 293 compatible = "simple-panel-dsi"; 294 reg = <0>; 295 backlight = <&backlight>; 296 enable-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 297 back-gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_HIGH>; 298 reset-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>; 299 prepare-delay-ms = <8>; 300 enable-delay-ms = <3>; 301 reset-delay-ms = <50>; 302 init-delay-ms = <20>; 303 304 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 305 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 306 dsi,format = <MIPI_DSI_FMT_RGB888>; 307 dsi,lanes = <4>; 308 width-mm = <153>; 309 height-mm = <85>; 310 panel-init-sequence = [ 311 05 1e 01 01 312 15 00 02 80 47 313 15 00 02 81 40 314 15 00 02 82 04 315 15 00 02 83 77 316 15 00 02 84 0f 317 15 00 02 85 70 318 15 78 02 86 70 319 ]; 320 panel-exit-sequence = [ 321 05 00 01 28 322 05 00 01 10 323 ]; 324 325 display-timings { 326 native-mode = <&timing0>; 327 328 timing0: timing0 { 329 clock-frequency = <49500000>; 330 hactive = <1024>; 331 vactive = <600>; 332 hback-porch = <120>; 333 hfront-porch = <80>; 334 vback-porch = <14>; 335 vfront-porch = <14>; 336 hsync-len = <40>; 337 vsync-len = <4>; 338 hsync-active = <0>; 339 vsync-active = <0>; 340 de-active = <0>; 341 pixelclk-active = <0>; 342 }; 343 }; 344 345 ports { 346 #address-cells = <1>; 347 #size-cells = <0>; 348 349 port@0 { 350 reg = <0>; 351 panel_in_dsi: endpoint { 352 remote-endpoint = <&dsi_out_panel>; 353 }; 354 }; 355 }; 356 }; 357 358 ports { 359 #address-cells = <1>; 360 #size-cells = <0>; 361 362 port@1 { 363 reg = <1>; 364 dsi_out_panel: endpoint { 365 remote-endpoint = <&panel_in_dsi>; 366 }; 367 }; 368 }; 369}; 370 371&emmc { 372 bus-width = <8>; 373 cap-mmc-highspeed; 374 mmc-hs200-1_8v; 375 no-sdio; 376 no-sd; 377 disable-wp; 378 non-removable; 379 num-slots = <1>; 380 status = "okay"; 381}; 382 383&i2c0 { 384 status = "okay"; 385 386 vdd_cpu: tcs4526@10 { 387 compatible = "tcs,tcs4526"; 388 reg = <0x10>; 389 regulator-compatible = "fan53555-reg"; 390 pinctrl-0 = <&vsel_gpio>; 391 vsel-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; 392 regulator-name = "vdd_cpu"; 393 regulator-min-microvolt = <712500>; 394 regulator-max-microvolt = <1390000>; 395 regulator-ramp-delay = <2300>; 396 fcs,suspend-voltage-selector = <1>; 397 regulator-boot-on; 398 regulator-always-on; 399 regulator-state-mem { 400 regulator-off-in-suspend; 401 }; 402 }; 403 404 rk818: pmic@1c { 405 compatible = "rockchip,rk818"; 406 status = "okay"; 407 reg = <0x1c>; 408 clock-output-names = "rk818-clkout1", "wifibt_32kin"; 409 interrupt-parent = <&gpio0>; 410 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 411 pinctrl-names = "default"; 412 pinctrl-0 = <&pmic_int_l>; 413 rockchip,system-power-controller; 414 wakeup-source; 415 extcon = <&u2phy>; 416 #clock-cells = <1>; 417 418 vcc1-supply = <&vcc_sys>; 419 vcc2-supply = <&vcc_sys>; 420 vcc3-supply = <&vcc_sys>; 421 vcc4-supply = <&vcc_sys>; 422 vcc6-supply = <&vcc_sys>; 423 vcc7-supply = <&vcc_sys>; 424 vcc8-supply = <&vcc_sys>; 425 vcc9-supply = <&vcc_io>; 426 427 regulators { 428 vdd_logic: DCDC_REG1 { 429 regulator-name = "vdd_logic"; 430 regulator-always-on; 431 regulator-boot-on; 432 regulator-min-microvolt = <750000>; 433 regulator-max-microvolt = <1450000>; 434 regulator-ramp-delay = <6001>; 435 regulator-state-mem { 436 regulator-on-in-suspend; 437 regulator-suspend-microvolt = <1000000>; 438 }; 439 }; 440 441 vdd_gpu: DCDC_REG2 { 442 regulator-name = "vdd_gpu"; 443 regulator-always-on; 444 regulator-boot-on; 445 regulator-min-microvolt = <800000>; 446 regulator-max-microvolt = <1250000>; 447 regulator-ramp-delay = <6001>; 448 regulator-state-mem { 449 regulator-on-in-suspend; 450 regulator-suspend-microvolt = <1000000>; 451 }; 452 }; 453 454 vcc_ddr: DCDC_REG3 { 455 regulator-always-on; 456 regulator-boot-on; 457 regulator-name = "vcc_ddr"; 458 regulator-state-mem { 459 regulator-on-in-suspend; 460 }; 461 }; 462 463 vcc_io: DCDC_REG4 { 464 regulator-always-on; 465 regulator-boot-on; 466 regulator-min-microvolt = <3300000>; 467 regulator-max-microvolt = <3300000>; 468 regulator-name = "vcc_io"; 469 regulator-state-mem { 470 regulator-on-in-suspend; 471 regulator-suspend-microvolt = <3300000>; 472 }; 473 }; 474 475 vcca_codec: LDO_REG1 { 476 regulator-always-on; 477 regulator-boot-on; 478 regulator-min-microvolt = <3300000>; 479 regulator-max-microvolt = <3300000>; 480 regulator-name = "vcca_codec"; 481 regulator-state-mem { 482 regulator-on-in-suspend; 483 regulator-suspend-microvolt = <3300000>; 484 }; 485 }; 486 487 vcc_tp: LDO_REG2 { 488 regulator-boot-on; 489 regulator-min-microvolt = <3000000>; 490 regulator-max-microvolt = <3000000>; 491 regulator-name = "vcc_tp"; 492 regulator-state-mem { 493 regulator-off-in-suspend; 494 }; 495 }; 496 497 vdd_10: LDO_REG3 { 498 regulator-always-on; 499 regulator-boot-on; 500 regulator-min-microvolt = <1000000>; 501 regulator-max-microvolt = <1000000>; 502 regulator-name = "vdd_10"; 503 regulator-state-mem { 504 regulator-on-in-suspend; 505 regulator-suspend-microvolt = <1000000>; 506 }; 507 }; 508 509 vcc18_lcd: LDO_REG4 { 510 regulator-always-on; 511 regulator-boot-on; 512 regulator-min-microvolt = <1800000>; 513 regulator-max-microvolt = <1800000>; 514 regulator-name = "vcc18_lcd"; 515 regulator-state-mem { 516 regulator-on-in-suspend; 517 regulator-suspend-microvolt = <1800000>; 518 }; 519 }; 520 521 vccio_pmu: LDO_REG5 { 522 regulator-always-on; 523 regulator-boot-on; 524 regulator-min-microvolt = <1800000>; 525 regulator-max-microvolt = <1800000>; 526 regulator-name = "vccio_pmu"; 527 regulator-state-mem { 528 regulator-on-in-suspend; 529 regulator-suspend-microvolt = <1800000>; 530 }; 531 }; 532 533 vdd10_lcd: LDO_REG6 { 534 regulator-always-on; 535 regulator-boot-on; 536 regulator-min-microvolt = <1000000>; 537 regulator-max-microvolt = <1000000>; 538 regulator-name = "vdd10_lcd"; 539 regulator-state-mem { 540 regulator-on-in-suspend; 541 regulator-suspend-microvolt = <1000000>; 542 }; 543 }; 544 545 vcc_18: LDO_REG7 { 546 regulator-always-on; 547 regulator-boot-on; 548 regulator-min-microvolt = <1800000>; 549 regulator-max-microvolt = <1800000>; 550 regulator-name = "vcc_18"; 551 regulator-state-mem { 552 regulator-on-in-suspend; 553 regulator-suspend-microvolt = <1800000>; 554 }; 555 }; 556 557 vccio_wl: LDO_REG8 { 558 regulator-always-on; 559 regulator-boot-on; 560 regulator-min-microvolt = <1800000>; 561 regulator-max-microvolt = <1800000>; 562 regulator-name = "vccio_wl"; 563 regulator-state-mem { 564 regulator-on-in-suspend; 565 regulator-suspend-microvolt = <1800000>; 566 }; 567 }; 568 569 vccio_sd: LDO_REG9 { 570 regulator-always-on; 571 regulator-boot-on; 572 regulator-min-microvolt = <1800000>; 573 regulator-max-microvolt = <3300000>; 574 regulator-name = "vccio_sd"; 575 regulator-state-mem { 576 regulator-on-in-suspend; 577 regulator-suspend-microvolt = <3300000>; 578 }; 579 }; 580 581 vcc_sd: SWITCH_REG { 582 regulator-always-on; 583 regulator-boot-on; 584 regulator-name = "vcc_sd"; 585 regulator-state-mem { 586 regulator-on-in-suspend; 587 }; 588 }; 589 590 boost_otg: DCDC_BOOST { 591 regulator-name = "boost_otg"; 592 regulator-always-on; 593 regulator-boot-on; 594 regulator-min-microvolt = <5000000>; 595 regulator-max-microvolt = <5000000>; 596 regulator-state-mem { 597 regulator-on-in-suspend; 598 regulator-suspend-microvolt = <5000000>; 599 }; 600 }; 601 602 otg_switch: OTG_SWITCH { 603 regulator-name = "otg_switch"; 604 }; 605 }; 606 607 battery { 608 compatible = "rk818-battery"; 609 pinctrl-names = "default"; 610 pinctrl-0 = <&dc_irq_gpio>; 611 ocv_table = < 612 3400 3652 3680 3707 3730 3747 3764 613 3772 3781 3792 3807 3828 3861 3899 614 3929 3958 3987 4038 4079 4127 4186>; 615 design_capacity = <7536>; 616 design_qmax = <8290>; 617 bat_res = <100>; 618 max_input_current = <1750>; 619 max_chrg_current = <2000>; 620 max_chrg_voltage = <4200>; 621 sleep_enter_current = <600>; 622 sleep_exit_current = <600>; 623 power_off_thresd = <3400>; 624 zero_algorithm_vol = <3850>; 625 fb_temperature = <115>; 626 sample_res = <20>; 627 max_soc_offset = <60>; 628 energy_mode = <0>; 629 monitor_sec = <5>; 630 virtual_power = <0>; 631 power_dc2otg = <0>; 632 support_usb_adp = <1>; 633 support_dc_adp = <1>; 634 dc_det_gpio = <&gpio0 17 GPIO_ACTIVE_LOW>; 635 }; 636 }; 637}; 638 639&i2c1 { 640 status = "okay"; 641 642 es8316: es8316@10 { 643 status = "okay"; 644 #sound-dai-cells = <0>; 645 compatible = "everest,es8316"; 646 reg = <0x10>; 647 clocks = <&cru SCLK_I2S_8CH_OUT>; 648 clock-names = "mclk"; 649 spk-con-gpio = <&gpio0 27 GPIO_ACTIVE_HIGH>; 650 hp-det-gpio = <&gpio0 23 GPIO_ACTIVE_HIGH>; 651 pinctrl-names = "default"; 652 pinctrl-0 = <&i2s_8ch_mclk>; 653 extcon = <&rk_headset>; 654 }; 655}; 656 657&i2c2 { 658 status = "okay"; 659 660 ts@5a { 661 compatible = "cst2xxse"; 662 reg = <0x5a>; 663 irq-gpio = <&gpio0 RK_PB4 IRQ_TYPE_LEVEL_LOW>; 664 //touch-gpio = <&gpio1 GPIO_B0 IRQ_TYPE_LEVEL_LOW>; /* TP_INT == GPIO1_B0 */ 665 //reset-gpio = <&gpio0 GPIO_D1 GPIO_ACTIVE_LOW>; /* TP_RST == GPIO0_D1 */ 666 //power-gpio = <&gpio0 GPIO_C5 GPIO_ACTIVE_LOW>; 667 //max-x = <800>; 668 //max-y = <480>; 669 status = "okay"; 670 }; 671 672}; 673 674&i2c3 { 675 status = "okay"; 676 677 gc0312: gc0312@21 { 678 status = "okay"; 679 compatible = "galaxycore,gc0312"; 680 reg = <0x21>; 681 clocks = <&cru SCLK_VIP_OUT>; 682 clock-names = "xvclk"; 683 pwdn-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 684 685 rockchip,camera-module-index = <1>; 686 rockchip,camera-module-facing = "front"; 687 rockchip,camera-module-name = "CameraKing"; 688 rockchip,camera-module-lens-name = "Largan"; 689 port { 690 gc0312_out: endpoint { 691 remote-endpoint = <&dvp_in_fcam>; 692 }; 693 }; 694 }; 695 696 gc2145: gc2145@3c { 697 status = "okay"; 698 compatible = "galaxycore,gc2145"; 699 reg = <0x3c>; 700 clocks = <&cru SCLK_VIP_OUT>; 701 clock-names = "xvclk"; 702 pwdn-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 703 rockchip,camera-module-index = <0>; 704 rockchip,camera-module-facing = "back"; 705 rockchip,camera-module-name = "CameraKing"; 706 rockchip,camera-module-lens-name = "Largan"; 707 port { 708 gc2145_out: endpoint { 709 remote-endpoint = <&dvp_in_bcam>; 710 }; 711 }; 712 }; 713 714 ov8858: ov8858@36 { 715 status = "disabled"; 716 compatible = "ovti,ov8858"; 717 reg = <0x36>; 718 clocks = <&cru SCLK_VIP_OUT>; 719 clock-names = "xvclk"; 720 721 rockchip,camera-module-index = <0>; 722 rockchip,camera-module-facing = "back"; 723 rockchip,camera-module-name = "CameraKing"; 724 rockchip,camera-module-lens-name = "Largan-9569A2"; 725 power-gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; 726 pwdn-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 727 728 port { 729 ov8858_out: endpoint { 730 remote-endpoint = <&mipi_in>; 731 data-lanes = <1 2>; 732 }; 733 }; 734 }; 735}; 736 737&i2c4 { 738 status = "okay"; 739 740 mpu6500@68 { 741 status = "disabled"; 742 compatible = "invensense,mpu6500"; 743 pinctrl-names = "default"; 744 pinctrl-0 = <&mpu6500_irq_gpio>; 745 reg = <0x68>; 746 irq-gpio = <&gpio3 14 IRQ_TYPE_EDGE_RISING>; 747 mpu-int_config = <0x10>; 748 mpu-level_shifter = <0>; 749 mpu-orientation = <1 0 0 0 1 0 0 0 1>; 750 orientation-x= <1>; 751 orientation-y= <0>; 752 orientation-z= <1>; 753 support-hw-poweroff = <1>; 754 mpu-debug = <1>; 755 }; 756 757 sensor@4c { 758 status = "okay"; 759 compatible = "gs_mc3230"; 760 reg = <0x4c>; 761 type = <SENSOR_TYPE_ACCEL>; 762 irq_enable = <0>; 763 poll_delay_ms = <30>; 764 layout = <9>; 765 reprobe_en = <1>; 766 irq-gpio = <&gpio3 RK_PB6 IRQ_TYPE_LEVEL_LOW>; 767 }; 768 769 sensor@18 { 770 status = "okay"; 771 compatible = "gs_sc7a30"; 772 reg = <0x18>; 773 type = <SENSOR_TYPE_ACCEL>; 774 irq-gpio = <&gpio3 RK_PB6 IRQ_TYPE_LEVEL_LOW>; 775 irq_enable = <0>; 776 poll_delay_ms = <30>; 777 layout = <6>; 778 reprobe_en = <1>; 779 }; 780 781 sensor@10 { 782 status = "okay"; 783 compatible = "light_cm3218"; 784 pinctrl-names = "default"; 785 pinctrl-0 = <&cm3218_irq_gpio>; 786 reg = <0x10>; 787 type = <SENSOR_TYPE_LIGHT>; 788 irq-gpio = <&gpio3 15 IRQ_TYPE_EDGE_FALLING>; 789 irq_enable = <1>; 790 poll_delay_ms = <30>; 791 }; 792}; 793 794&i2s_8ch { 795 status = "okay"; 796 rockchip,i2s-broken-burst-len; 797 rockchip,playback-channels = <8>; 798 rockchip,capture-channels = <2>; 799 #sound-dai-cells = <0>; 800}; 801 802&io_domains { 803 status = "okay"; 804 805 dvp-supply = <&vcc_18>; 806 audio-supply = <&vcc_io>; 807 gpio30-supply = <&vcc_io>; 808 gpio1830-supply = <&vcc_io>; 809 sdcard-supply = <&vccio_sd>; 810 wifi-supply = <&vccio_wl>; 811}; 812 813&isp_dvp_d2d9 { 814 rockchip,pins = 815 /* cif_data4 ... cif_data9 */ 816 <1 RK_PA2 1 &pcfg_pull_down>, 817 <1 RK_PA3 1 &pcfg_pull_down>, 818 <1 RK_PA4 1 &pcfg_pull_down>, 819 <1 RK_PA5 1 &pcfg_pull_down>, 820 <1 RK_PA6 1 &pcfg_pull_down>, 821 <1 RK_PA7 1 &pcfg_pull_down>, 822 /* cif_sync, cif_href */ 823 <1 RK_PB0 1 &pcfg_pull_down>, 824 <1 RK_PB1 1 &pcfg_pull_down>, 825 /* cif_clkin */ 826 <1 RK_PB2 1 &pcfg_pull_down>; 827}; 828 829&isp_dvp_d10d11 { 830 rockchip,pins = 831 /* cif_data10, cif_data11 */ 832 <1 RK_PB6 1 &pcfg_pull_down>, 833 <1 RK_PB7 1 &pcfg_pull_down>; 834}; 835 836&isp_mmu { 837 status = "okay"; 838}; 839 840&mipi_dphy_rx0 { 841 status = "disabled"; 842 843 ports { 844 #address-cells = <1>; 845 #size-cells = <0>; 846 847 port@0 { 848 reg = <0>; 849 #address-cells = <1>; 850 #size-cells = <0>; 851 852 mipi_in: endpoint@1 { 853 reg = <1>; 854 remote-endpoint = <&ov8858_out>; 855 data-lanes = <1 2>; 856 }; 857 }; 858 859 port@1 { 860 reg = <1>; 861 #address-cells = <1>; 862 #size-cells = <0>; 863 864 dphy_rx_out: endpoint@0 { 865 reg = <0>; 866 remote-endpoint = <&isp_mipi_in>; 867 }; 868 }; 869 }; 870}; 871 872&nandc0 { 873 status = "okay"; 874}; 875 876&pmu_io_domains { 877 status = "okay"; 878 879 pmu-supply = <&vccio_pmu>; 880 vop-supply = <&vccio_pmu>; 881}; 882 883&pwm0 { 884 status = "okay"; 885}; 886 887&pinctrl { 888 camera { 889 camera_pwr: camera-pwr { 890 rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; 891 }; 892 }; 893 894 headphone { 895 hp_det: hp-det { 896 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; 897 }; 898 }; 899 900 pmic { 901 pmic_int_l: pmic-int-l { 902 rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 903 }; 904 vsel_gpio: vsel-gpio { 905 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; 906 }; 907 }; 908 909 mpu6500 { 910 mpu6500_irq_gpio: mpu6500-irq-gpio { 911 rockchip,pins = <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 912 }; 913 }; 914 915 cm3218 { 916 cm3218_irq_gpio: cm3218-irq-gpio { 917 rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; 918 }; 919 }; 920 921 dc_det { 922 dc_irq_gpio: dc-irq-gpio { 923 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; 924 }; 925 }; 926 927 pcfg_pull_none_4ma: pcfg-pull-none-4ma { 928 bias-disable; 929 drive-strength = <4>; 930 }; 931 932 sdio-pwrseq { 933 wifi_enable_h: wifi-enable-h { 934 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 935 }; 936 }; 937 938 usb2 { 939 host_vbus_drv: host-vbus-drv { 940 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 941 }; 942 }; 943 944 wireless-bluetooth { 945 uart0_rts_gpio: uart0-rts-gpio { 946 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 947 }; 948 }; 949}; 950 951&rkisp1 { 952 status = "okay"; 953 pinctrl-names = "default"; 954 pinctrl-0 = <&isp_dvp_d2d9 &isp_dvp_d10d11 &cif_clkout>; 955 port { 956 #address-cells = <1>; 957 #size-cells = <0>; 958 959 dvp_in_fcam: endpoint@0 { 960 reg = <0>; 961 remote-endpoint = <&gc0312_out>; 962 }; 963 964 dvp_in_bcam: endpoint@1 { 965 reg = <1>; 966 remote-endpoint = <&gc2145_out>; 967 }; 968 969 isp_mipi_in: endpoint@2 { 970 reg = <2>; 971 remote-endpoint = <&dphy_rx_out>; 972 }; 973 }; 974}; 975 976&route_dsi { 977 status = "okay"; 978}; 979 980&rockchip_suspend { 981 status = "okay"; 982 rockchip,sleep-mode-config = < 983 (0 984 | RKPM_SLP_ARMOFF 985 | RKPM_SLP_PMU_PLLS_PWRDN 986 | RKPM_SLP_PMU_PMUALIVE_32K 987 | RKPM_SLP_SFT_PLLS_DEEP 988 | RKPM_SLP_PMU_DIS_OSC 989 | RKPM_SLP_SFT_PD_NBSCUS 990 ) 991 >; 992 rockchip,wakeup-config = < 993 (0 994 | RKPM_GPIO_WKUP_EN 995 | RKPM_USB_WKUP_EN 996 | RKPM_CLUSTER_L_WKUP_EN 997 ) 998 >; 999}; 1000 1001&saradc { 1002 status = "okay"; 1003}; 1004 1005&sdmmc { 1006 clock-frequency = <37500000>; 1007 clock-freq-min-max = <400000 37500000>; 1008 no-sdio; 1009 no-mmc; 1010 cap-mmc-highspeed; 1011 cap-sd-highspeed; 1012 card-detect-delay = <200>; 1013 disable-wp; 1014 num-slots = <1>; 1015 pinctrl-names = "default"; 1016 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 1017 status = "disabled"; 1018}; 1019 1020&sdio0 { 1021 max-frequency = <100000000>; 1022 no-sd; 1023 no-mmc; 1024 bus-width = <4>; 1025 disable-wp; 1026 cap-sd-highspeed; 1027 cap-sdio-irq; 1028 keep-power-in-suspend; 1029 mmc-pwrseq = <&sdio_pwrseq>; 1030 non-removable; 1031 num-slots = <1>; 1032 pinctrl-names = "default"; 1033 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 1034 rockchip,default-sample-phase = <90>; 1035 sd-uhs-sdr104; 1036 status = "okay"; 1037}; 1038 1039&tsadc { 1040 tsadc-supply = <&vdd_cpu>; 1041 status = "okay"; 1042}; 1043 1044&uart0 { 1045 pinctrl-names = "default"; 1046 pinctrl-0 = <&uart0_xfer &uart0_cts>; 1047 status = "okay"; 1048}; 1049 1050&u2phy { 1051 status = "okay"; 1052 1053 u2phy_otg: otg-port { 1054 status = "okay"; 1055 }; 1056 1057 u2phy_host: host-port { 1058 phy-supply = <&vcc_host>; 1059 status = "okay"; 1060 }; 1061}; 1062 1063&usb_host0_ehci { 1064 status = "okay"; 1065}; 1066 1067&usb_host0_ohci { 1068 status = "okay"; 1069}; 1070 1071