xref: /OK3568_Linux_fs/kernel/scripts/dtc/include-prefixes/arm64/rockchip/rk3326-86v-v10.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
4 */
5
6/dts-v1/;
7#include <dt-bindings/display/drm_mipi_dsi.h>
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10#include <dt-bindings/pinctrl/rockchip.h>
11#include <dt-bindings/sensor-dev.h>
12#include "rk3326.dtsi"
13#include "rk3326-863-cif-sensor.dtsi"
14#include "px30-android.dtsi"
15
16/ {
17	model = "Rockchip rk3326 86v board";
18	compatible = "rockchip,rk3326-86v-v10", "rockchip,rk3326";
19
20	adc-keys {
21		compatible = "adc-keys";
22		io-channels = <&saradc 2>;
23		io-channel-names = "buttons";
24		poll-interval = <100>;
25		keyup-threshold-microvolt = <617000>;
26
27		vol-down-key {
28			linux,code = <KEY_VOLUMEDOWN>;
29			label = "volume down";
30			press-threshold-microvolt = <300000>;
31		};
32
33		vol-up-key {
34			linux,code = <KEY_VOLUMEUP>;
35			label = "volume up";
36			press-threshold-microvolt = <17000>;
37		};
38	};
39
40	backlight: backlight {
41		compatible = "pwm-backlight";
42		pwms = <&pwm1 0 25000 0>;
43		brightness-levels = <
44			 0   10  10  11  11  12  12  13
45			 13  14  14  15  15  16  16  17
46			 17  18  18  19  20  21  22  23
47			 24  25  26  27  28  29  30  31
48			 32  33  34  35  36  37  38  39
49			 40  41  42  43  44  45  46  47
50			 48  49  50  51  52  53  54  55
51			 56  57  58  59  60  61  62  63
52			 64  65  66  67  68  69  70  71
53			 72  73  74  75  76  77  78  79
54			 80  81  82  83  84  85  86  87
55			 88  89  90  91  92  93  94  95
56			 96  97  98  99 100 101 102 103
57			104 105 106 107 108 109 110 111
58			112 113 114 115 116 117 118 119
59			120 121 122 123 124 125 126 127
60			128 129 130 131 132 133 134 135
61			136 137 138 139 140 141 142 143
62			144 145 146 147 148 149 150 151
63			152 153 154 155 156 157 158 159
64			160 161 162 163 164 165 166 167
65			168 169 170 171 172 173 174 175
66			176 177 178 179 180 181 182 183
67			184 185 186 187 188 189 190 191
68			192 193 194 195 196 197 198 199
69			200 201 202 203 204 205 206 207
70			208 209 210 211 212 213 214 215
71			216 217 218 219 220 221 222 223
72			224 225 226 227 228 229 230 231
73			232 233 234 235 236 237 238 239
74			240 241 242 243 244 245 246 247
75			248 249 250 251 252 253 254 255>;
76		default-brightness-level = <200>;
77	};
78
79	charge-animation {
80		compatible = "rockchip,uboot-charge";
81		rockchip,uboot-charge-on = <0>;
82		rockchip,android-charge-on = <0>;
83		rockchip,uboot-low-power-voltage = <3500>;
84		rockchip,screen-on-voltage = <3600>;
85		status = "okay";
86	};
87
88	panel {
89		compatible ="simple-panel";
90		enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>;
91		reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
92		bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
93
94		display-timings {
95			native-mode = <&timing0>;
96
97			timing0: timing0 {
98				clock-frequency = <51200000>;
99				hactive = <1024>;
100				vactive = <600>;
101				hback-porch = <100>;
102				hfront-porch = <120>;
103				vback-porch = <10>;
104				vfront-porch = <15>;
105				hsync-len = <100>;
106				vsync-len = <10>;
107				hsync-active = <0>;
108				vsync-active = <0>;
109				de-active = <0>;
110				pixelclk-active = <0>;
111			};
112		};
113
114		port {
115			panel_in_rgb: endpoint {
116				remote-endpoint = <&rgb_out_panel>;
117			};
118		};
119	};
120
121	rk817-sound {
122		compatible = "simple-audio-card";
123		simple-audio-card,format = "i2s";
124		simple-audio-card,name = "rockchip,rk817-codec";
125		simple-audio-card,mclk-fs = <256>;
126		simple-audio-card,widgets =
127			"Microphone", "Mic Jack",
128			"Headphone", "Headphone Jack";
129		simple-audio-card,routing =
130			"Mic Jack", "MICBIAS1",
131			"IN1P", "Mic Jack",
132			"Headphone Jack", "HPOL",
133			"Headphone Jack", "HPOR";
134		simple-audio-card,cpu {
135			sound-dai = <&i2s1_2ch>;
136		};
137		simple-audio-card,codec {
138			sound-dai = <&rk817_codec>;
139		};
140	};
141
142	rk_headset: rk-headset {
143		compatible = "rockchip_headset";
144		headset_gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
145		pinctrl-names = "default";
146		pinctrl-0 = <&hp_det>;
147	};
148
149	sdio_pwrseq: sdio-pwrseq {
150		compatible = "mmc-pwrseq-simple";
151		clocks = <&cru SCLK_WIFI_PMU>;
152		clock-names = "clk_wifi_pmu";
153		pinctrl-names = "default";
154		pinctrl-0 = <&wifi_enable_h>;
155
156		/*
157		 * On the module itself this is one of these (depending
158		 * on the actual card populated):
159		 * - SDIO_RESET_L_WL_REG_ON
160		 * - PDN (power down when low)
161		 */
162		reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */
163	};
164
165	vccsys: vccsys {
166		compatible = "regulator-fixed";
167		regulator-name = "vcc3v8_sys";
168		regulator-always-on;
169		regulator-boot-on;
170		regulator-min-microvolt = <3800000>;
171		regulator-max-microvolt = <3800000>;
172	};
173};
174
175&cif {
176	status = "okay";
177};
178
179&cif_sensor {
180	status = "okay";
181};
182
183&display_subsystem {
184	status = "okay";
185};
186
187&bus_apll {
188	bus-supply = <&vdd_logic>;
189	status = "okay";
190};
191
192&cpu0 {
193	cpu-supply = <&vdd_arm>;
194};
195
196&cpu0_opp_table {
197	/*
198	 * max IR-drop values on different freq condition for this board!
199	 */
200	rockchip,board-irdrop = <
201		/*MHz	MHz	uV */
202		0	815	75000
203		816	1119	75000
204		1200	1512	75000
205	>;
206};
207
208&dmc_opp_table {
209	/*
210	 * max IR-drop values on different freq condition for this board!
211	 */
212	rockchip,board-irdrop = <
213		/*MHz	MHz	uV */
214		451	800	75000
215	>;
216};
217
218&dfi {
219	status = "okay";
220};
221
222&dmc {
223	center-supply = <&vdd_logic>;
224	status = "disabled";
225};
226
227&emmc {
228	bus-width = <8>;
229	cap-mmc-highspeed;
230	/*mmc-hs200-1_8v;*/
231	no-sdio;
232	no-sd;
233	disable-wp;
234	non-removable;
235	num-slots = <1>;
236	status = "okay";
237};
238
239&gpu {
240	mali-supply = <&vdd_logic>;
241	status = "okay";
242};
243
244&i2c0 {
245	status = "okay";
246
247	rk817: pmic@20 {
248		compatible = "rockchip,rk817";
249		reg = <0x20>;
250		interrupt-parent = <&gpio0>;
251		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
252		pinctrl-names = "default", "pmic-sleep",
253				"pmic-power-off", "pmic-reset";
254		pinctrl-0 = <&pmic_int>;
255		pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
256		pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
257		pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
258		rockchip,system-power-controller;
259		wakeup-source;
260		#clock-cells = <1>;
261		clock-output-names = "rk808-clkout1", "rk808-clkout2";
262		//fb-inner-reg-idxs = <2>;
263		/* 1: rst regs (default in codes), 0: rst the pmic */
264		pmic-reset-func = <1>;
265
266		vcc1-supply = <&vccsys>;
267		vcc2-supply = <&vccsys>;
268		vcc3-supply = <&vccsys>;
269		vcc4-supply = <&vccsys>;
270		vcc5-supply = <&vccsys>;
271		vcc6-supply = <&vccsys>;
272		vcc7-supply = <&vcc_3v0>;
273		vcc8-supply = <&vccsys>;
274		vcc9-supply = <&dcdc_boost>;
275
276		pwrkey {
277			status = "okay";
278		};
279
280		pinctrl_rk8xx: pinctrl_rk8xx {
281			gpio-controller;
282			#gpio-cells = <2>;
283
284			rk817_ts_gpio1: rk817_ts_gpio1 {
285				pins = "gpio_ts";
286				function = "pin_fun1";
287				/* output-low; */
288				/* input-enable; */
289			};
290
291			rk817_gt_gpio2: rk817_gt_gpio2 {
292				pins = "gpio_gt";
293				function = "pin_fun1";
294			};
295
296			rk817_pin_ts: rk817_pin_ts {
297				pins = "gpio_ts";
298				function = "pin_fun0";
299			};
300
301			rk817_pin_gt: rk817_pin_gt {
302				pins = "gpio_gt";
303				function = "pin_fun0";
304			};
305
306			rk817_slppin_null: rk817_slppin_null {
307				pins = "gpio_slp";
308				function = "pin_fun0";
309			};
310
311			rk817_slppin_slp: rk817_slppin_slp {
312				pins = "gpio_slp";
313				function = "pin_fun1";
314			};
315
316			rk817_slppin_pwrdn: rk817_slppin_pwrdn {
317				pins = "gpio_slp";
318				function = "pin_fun2";
319			};
320
321			rk817_slppin_rst: rk817_slppin_rst {
322				pins = "gpio_slp";
323				function = "pin_fun3";
324			};
325		};
326
327		regulators {
328			vdd_logic: DCDC_REG1 {
329				regulator-always-on;
330				regulator-boot-on;
331				regulator-min-microvolt = <850000>;
332				regulator-max-microvolt = <1350000>;
333				regulator-ramp-delay = <6001>;
334				regulator-initial-mode = <0x2>;
335				regulator-name = "vdd_logic";
336				regulator-state-mem {
337					regulator-on-in-suspend;
338					regulator-suspend-microvolt = <950000>;
339				};
340			};
341
342			vdd_arm: DCDC_REG2 {
343				regulator-always-on;
344				regulator-boot-on;
345				regulator-min-microvolt = <850000>;
346				regulator-max-microvolt = <1350000>;
347				regulator-ramp-delay = <6001>;
348				regulator-initial-mode = <0x2>;
349				regulator-name = "vdd_arm";
350				regulator-state-mem {
351					regulator-off-in-suspend;
352					regulator-suspend-microvolt = <950000>;
353				};
354			};
355
356			vcc_ddr: DCDC_REG3 {
357				regulator-always-on;
358				regulator-boot-on;
359				regulator-initial-mode = <0x2>;
360				regulator-name = "vcc_ddr";
361				regulator-state-mem {
362					regulator-on-in-suspend;
363				};
364			};
365
366			vcc_3v0: DCDC_REG4 {
367				regulator-always-on;
368				regulator-boot-on;
369				regulator-min-microvolt = <3000000>;
370				regulator-max-microvolt = <3000000>;
371				regulator-initial-mode = <0x2>;
372				regulator-name = "vcc_3v0";
373				regulator-state-mem {
374					regulator-on-in-suspend;
375					regulator-suspend-microvolt = <3000000>;
376				};
377			};
378
379			vcc_1v0: LDO_REG1 {
380				regulator-always-on;
381				regulator-boot-on;
382				regulator-min-microvolt = <1000000>;
383				regulator-max-microvolt = <1000000>;
384				regulator-name = "vcc_1v0";
385				regulator-state-mem {
386					regulator-on-in-suspend;
387					regulator-suspend-microvolt = <1000000>;
388				};
389			};
390
391			vcc1v8_soc: LDO_REG2 {
392				regulator-always-on;
393				regulator-boot-on;
394				regulator-min-microvolt = <1800000>;
395				regulator-max-microvolt = <1800000>;
396
397				regulator-name = "vcc1v8_soc";
398				regulator-state-mem {
399					regulator-on-in-suspend;
400					regulator-suspend-microvolt = <1800000>;
401				};
402			};
403
404			vdd1v0_soc: LDO_REG3 {
405				regulator-always-on;
406				regulator-boot-on;
407				regulator-min-microvolt = <1000000>;
408				regulator-max-microvolt = <1000000>;
409
410				regulator-name = "vcc1v0_soc";
411				regulator-state-mem {
412					regulator-on-in-suspend;
413					regulator-suspend-microvolt = <1000000>;
414				};
415			};
416
417			vcc3v0_pmu: LDO_REG4 {
418				regulator-always-on;
419				regulator-boot-on;
420				regulator-min-microvolt = <3000000>;
421				regulator-max-microvolt = <3000000>;
422
423				regulator-name = "vcc3v0_pmu";
424				regulator-state-mem {
425					regulator-on-in-suspend;
426					regulator-suspend-microvolt = <3000000>;
427
428				};
429			};
430
431			vccio_sd: LDO_REG5 {
432				regulator-always-on;
433				regulator-boot-on;
434				regulator-min-microvolt = <1800000>;
435				regulator-max-microvolt = <3300000>;
436
437				regulator-name = "vccio_sd";
438				regulator-state-mem {
439					regulator-on-in-suspend;
440					regulator-suspend-microvolt = <3300000>;
441				};
442			};
443
444			vcc_sd: LDO_REG6 {
445				regulator-min-microvolt = <3300000>;
446				regulator-max-microvolt = <3300000>;
447
448				regulator-name = "vcc_sd";
449				regulator-state-mem {
450					regulator-on-in-suspend;
451					regulator-suspend-microvolt = <3300000>;
452
453				};
454			};
455
456			vcc2v8_dvp: LDO_REG7 {
457				regulator-boot-on;
458				regulator-min-microvolt = <2800000>;
459				regulator-max-microvolt = <2800000>;
460
461				regulator-name = "vcc2v8_dvp";
462				regulator-state-mem {
463					regulator-off-in-suspend;
464					regulator-suspend-microvolt = <2800000>;
465				};
466			};
467
468			vcc1v8_dvp: LDO_REG8 {
469				regulator-boot-on;
470				regulator-min-microvolt = <1800000>;
471				regulator-max-microvolt = <1800000>;
472
473				regulator-name = "vcc1v8_dvp";
474				regulator-state-mem {
475					regulator-off-in-suspend;
476					regulator-suspend-microvolt = <1800000>;
477				};
478			};
479
480			vdd1v5_dvp: LDO_REG9 {
481				regulator-boot-on;
482				regulator-min-microvolt = <1500000>;
483				regulator-max-microvolt = <1500000>;
484
485				regulator-name = "vdd1v5_dvp";
486				regulator-state-mem {
487					regulator-off-in-suspend;
488					regulator-suspend-microvolt = <1500000>;
489				};
490			};
491
492			dcdc_boost: BOOST {
493				regulator-always-on;
494				regulator-boot-on;
495				regulator-min-microvolt = <4700000>;
496				regulator-max-microvolt = <5400000>;
497				regulator-name = "boost";
498			};
499
500			otg_switch: OTG_SWITCH {
501				regulator-name = "otg_switch";
502			};
503		};
504
505		battery {
506			compatible = "rk817,battery";
507			ocv_table = <3500 3548 3592 3636 3687 3740 3780
508				3806 3827 3846 3864 3889 3929 3964
509				3993 4015 4030 4041 4056 4076 4148>;
510			design_capacity = <4000>;
511			design_qmax = <4200>;
512			bat_res = <100>;
513			sleep_enter_current = <150>;
514			sleep_exit_current = <180>;
515			sleep_filter_current = <100>;
516			power_off_thresd = <3500>;
517			zero_algorithm_vol = <3850>;
518			max_soc_offset = <60>;
519			monitor_sec = <5>;
520			sample_res = <10>;
521			virtual_power = <0>;
522		};
523
524		charger {
525			compatible = "rk817,charger";
526			min_input_voltage = <4500>;
527			max_input_current = <1500>;
528			max_chrg_current = <2000>;
529			max_chrg_voltage = <4200>;
530			chrg_term_mode = <0>;
531			chrg_finish_cur = <300>;
532			virtual_power = <0>;
533			dc_det_adc = <0>;
534			extcon = <&u2phy>;
535		};
536
537		rk817_codec: codec {
538			#sound-dai-cells = <0>;
539			compatible = "rockchip,rk817-codec";
540			clocks = <&cru SCLK_I2S1_OUT>;
541			clock-names = "mclk";
542			pinctrl-names = "default";
543			pinctrl-0 = <&i2s1_2ch_mclk>;
544			hp-volume = <20>;
545			spk-volume = <3>;
546			mic-in-differential;
547			status = "okay";
548		};
549	};
550};
551
552&i2c1 {
553	status = "okay";
554
555	ts@40 {
556		compatible = "gslX680-d708";
557		reg = <0x40>;
558		touch-gpio = <&gpio0 RK_PB3 IRQ_TYPE_LEVEL_LOW>;
559		wake-gpio = <&gpio0 RK_PC1 IRQ_TYPE_LEVEL_LOW>;
560		screen_max_x = <1024>;
561		screen_max_y = <600>;
562		revert_x = <1>;
563		status = "okay";
564	};
565
566	sensor@1d {
567		status = "okay";
568		compatible = "gs_lsm303d";
569		reg = <0x1d>;
570		type = <SENSOR_TYPE_ACCEL>;
571		irq-gpio = <&gpio0 RK_PA1 IRQ_TYPE_LEVEL_LOW>;
572		irq_enable = <0>;
573		poll_delay_ms = <30>;
574		layout = <5>;
575		reprobe_en = <1>;
576	};
577};
578
579&i2c2 {
580	status = "okay";
581};
582
583&i2s1_2ch {
584	status = "okay";
585	#sound-dai-cells = <0>;
586};
587
588&io_domains {
589	status = "okay";
590
591	vccio1-supply = <&vcc_3v0>;
592	vccio2-supply = <&vccio_sd>;
593	vccio3-supply = <&vcc2v8_dvp>;
594	vccio4-supply = <&vcc_3v0>;
595	vccio5-supply = <&vcc_3v0>;
596};
597
598&rgb {
599	status = "okay";
600
601	ports {
602		port@1 {
603			reg = <1>;
604
605			rgb_out_panel: endpoint {
606				remote-endpoint = <&panel_in_rgb>;
607			};
608		};
609	};
610};
611
612&nandc0 {
613	status = "okay";
614};
615
616&pinctrl {
617	headphone {
618		hp_det: hp-det {
619			rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
620		};
621	};
622
623	lcdc {
624		lcdc_m1_rgb_pins: lcdc-m1-rgb-pins {
625			rockchip,pins =
626				<3 RK_PA0 1 &pcfg_pull_none>,		/* LCDC_DCLK */
627				<3 RK_PA4 1 &pcfg_pull_none_8ma>,	/* LCDC_D0 */
628				<3 RK_PA6 1 &pcfg_pull_none_8ma>,	/* LCDC_D2 */
629				<3 RK_PB2 1 &pcfg_pull_none_8ma>,	/* LCDC_D6 */
630				<3 RK_PB3 1 &pcfg_pull_none_8ma>,	/* LCDC_D7 */
631				<3 RK_PB5 1 &pcfg_pull_none_8ma>,	/* LCDC_D9 */
632				<3 RK_PC0 1 &pcfg_pull_none_8ma>,	/* LCDC_D12 */
633				<3 RK_PC1 1 &pcfg_pull_none_8ma>,	/* LCDC_D13 */
634				<3 RK_PC2 1 &pcfg_pull_none_8ma>,	/* LCDC_D14 */
635				<3 RK_PC3 1 &pcfg_pull_none_8ma>,	/* LCDC_D15 */
636				<3 RK_PC4 1 &pcfg_pull_none_8ma>,	/* LCDC_D16 */
637				<3 RK_PC5 1 &pcfg_pull_none_8ma>;	/* LCDC_D17 */
638		};
639
640		lcdc_m1_sleep_pins: lcdc-m1-sleep-pins {
641			rockchip,pins =
642				<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_DCLK */
643				<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D0 */
644				<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D2 */
645				<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D6 */
646				<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D7 */
647				<3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D9 */
648				<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D12 */
649				<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D13 */
650				<3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D14 */
651				<3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D15 */
652				<3 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,	/* LCDC_D16 */
653				<3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;	/* LCDC_D17 */
654		};
655	};
656
657	pmic {
658		pmic_int: pmic_int {
659			rockchip,pins =
660				<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
661		};
662
663		soc_slppin_gpio: soc_slppin_gpio {
664			rockchip,pins =
665				<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
666		};
667
668		soc_slppin_slp: soc_slppin_slp {
669			rockchip,pins =
670				<0 RK_PA4 1 &pcfg_pull_none>;
671		};
672
673		soc_slppin_rst: soc_slppin_rst {
674			rockchip,pins =
675				<0 RK_PA4 2 &pcfg_pull_none>;
676		};
677	};
678
679	sdio-pwrseq {
680		wifi_enable_h: wifi-enable-h {
681			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
682		};
683	};
684};
685
686&pmu_io_domains {
687	status = "okay";
688
689	pmuio1-supply = <&vcc3v0_pmu>;
690	pmuio2-supply = <&vcc3v0_pmu>;
691};
692
693&pwm1 {
694	status = "okay";
695};
696
697&rk_rga {
698	status = "okay";
699};
700
701&rockchip_suspend {
702	status = "okay";
703	rockchip,sleep-debug-en = <1>;
704};
705
706&route_rgb {
707	connect = <&vopb_out_rgb>;
708	status = "okay";
709};
710
711&saradc {
712	status = "okay";
713	vref-supply = <&vcc1v8_soc>;
714};
715
716&sdmmc {
717	bus-width = <4>;
718	cap-mmc-highspeed;
719	cap-sd-highspeed;
720	no-sdio;
721	no-mmc;
722	card-detect-delay = <800>;
723	ignore-pm-notify;
724	sd-uhs-sdr12;
725	sd-uhs-sdr25;
726	sd-uhs-sdr50;
727	sd-uhs-sdr104;
728	vqmmc-supply = <&vccio_sd>;
729	vmmc-supply = <&vcc_sd>;
730	status = "disabled";
731};
732
733&sdio {
734	bus-width = <4>;
735	cap-sd-highspeed;
736	no-sd;
737	no-mmc;
738	ignore-pm-notify;
739	keep-power-in-suspend;
740	non-removable;
741	mmc-pwrseq = <&sdio_pwrseq>;
742	sd-uhs-sdr104;
743	status = "disabled";
744};
745
746&tsadc {
747	pinctrl-names = "gpio", "otpout";
748	pinctrl-0 = <&tsadc_otp_gpio>;
749	pinctrl-1 = <&tsadc_otp_out>;
750	status = "okay";
751};
752
753&u2phy {
754	status = "okay";
755
756	u2phy_host: host-port {
757		rockchip,low-power-mode;
758		status = "okay";
759	};
760
761	u2phy_otg: otg-port {
762		rockchip,low-power-mode;
763		status = "okay";
764	};
765};
766
767&usb20_otg {
768	status = "okay";
769};
770
771&uart1 {
772	pinctrl-names = "default";
773	pinctrl-0 = <&uart1_xfer &uart1_cts>;
774	status = "okay";
775};
776
777&vip_mmu {
778	status = "okay";
779};
780
781&vopb {
782	status = "okay";
783};
784
785&vopb_mmu {
786	status = "okay";
787};
788
789&vopl {
790	status = "okay";
791};
792
793&vopl_mmu {
794	status = "okay";
795};
796
797&mpp_srv {
798	status = "okay";
799};
800
801&vdpu {
802	status = "okay";
803};
804
805&vepu {
806	status = "okay";
807};
808
809&vpu_mmu {
810	status = "okay";
811};
812
813&hevc {
814	status = "okay";
815};
816
817&hevc_mmu {
818	status = "okay";
819};
820
821&firmware_android {
822	compatible = "android,firmware";
823	fstab {
824		compatible = "android,fstab";
825		system {
826			compatible = "android,system";
827			dev = "/dev/block/by-name/system";
828			type = "ext4";
829			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
830			fsmgr_flags = "wait";
831		};
832		vendor {
833			compatible = "android,vendor";
834			dev = "/dev/block/by-name/vendor";
835			type = "ext4";
836			mnt_flags = "ro,barrier=1,inode_readahead_blks=8";
837			fsmgr_flags = "wait";
838		};
839	};
840};
841