1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include <dt-bindings/display/drm_mipi_dsi.h> 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/pinctrl/rockchip.h> 11#include <dt-bindings/sensor-dev.h> 12#include "rk3326.dtsi" 13#include "rk3326-863-cif-sensor.dtsi" 14#include "px30-android.dtsi" 15 16/ { 17 adc-keys { 18 compatible = "adc-keys"; 19 io-channels = <&saradc 2>; 20 io-channel-names = "buttons"; 21 poll-interval = <100>; 22 keyup-threshold-microvolt = <1800000>; 23 24 vol-down-key { 25 linux,code = <KEY_VOLUMEDOWN>; 26 label = "volume down"; 27 press-threshold-microvolt = <300000>; 28 }; 29 30 vol-up-key { 31 linux,code = <KEY_VOLUMEUP>; 32 label = "volume up"; 33 press-threshold-microvolt = <17000>; 34 }; 35 }; 36 37 backlight: backlight { 38 compatible = "pwm-backlight"; 39 pwms = <&pwm1 0 25000 0>; 40 brightness-levels = < 41 0 10 10 11 11 12 12 13 42 13 14 14 15 15 16 16 17 43 17 18 18 19 20 21 22 23 44 24 25 26 27 28 29 30 31 45 32 33 34 35 36 37 38 39 46 40 41 42 43 44 45 46 47 47 48 49 50 51 52 53 54 55 48 56 57 58 59 60 61 62 63 49 64 65 66 67 68 69 70 71 50 72 73 74 75 76 77 78 79 51 80 81 82 83 84 85 86 87 52 88 89 90 91 92 93 94 95 53 96 97 98 99 100 101 102 103 54 104 105 106 107 108 109 110 111 55 112 113 114 115 116 117 118 119 56 120 121 122 123 124 125 126 127 57 128 129 130 131 132 133 134 135 58 136 137 138 139 140 141 142 143 59 144 145 146 147 148 149 150 151 60 152 153 154 155 156 157 158 159 61 160 161 162 163 164 165 166 167 62 168 169 170 171 172 173 174 175 63 176 177 178 179 180 181 182 183 64 184 185 186 187 188 189 190 191 65 192 193 194 195 196 197 198 199 66 200 201 202 203 204 205 206 207 67 208 209 210 211 212 213 214 215 68 216 217 218 219 220 221 222 223 69 224 225 226 227 228 229 230 231 70 232 233 234 235 236 237 238 239 71 240 241 242 243 244 245 246 247 72 248 249 250 251 252 253 254 255>; 73 default-brightness-level = <200>; 74 }; 75 76 charge-animation { 77 compatible = "rockchip,uboot-charge"; 78 rockchip,uboot-charge-on = <1>; 79 rockchip,android-charge-on = <0>; 80 rockchip,uboot-low-power-voltage = <3500>; 81 rockchip,screen-on-voltage = <3600>; 82 status = "okay"; 83 }; 84 85 rk817-sound { 86 compatible = "rockchip,multicodecs-card"; 87 rockchip,card-name = "rockchip-rk817"; 88 hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; 89 rockchip,format = "i2s"; 90 rockchip,mclk-fs = <256>; 91 rockchip,cpu = <&i2s1_2ch>; 92 rockchip,codec = <&rk817_codec>; 93 pinctrl-names = "default"; 94 pinctrl-0 = <&hp_det>; 95 }; 96 97 sdio_pwrseq: sdio-pwrseq { 98 compatible = "mmc-pwrseq-simple"; 99 clocks = <&cru SCLK_WIFI_PMU>; 100 clock-names = "clk_wifi_pmu"; 101 pinctrl-names = "default"; 102 pinctrl-0 = <&wifi_enable_h>; 103 104 /* 105 * On the module itself this is one of these (depending 106 * on the actual card populated): 107 * - SDIO_RESET_L_WL_REG_ON 108 * - PDN (power down when low) 109 */ 110 reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; /* GPIO3_A4 */ 111 }; 112 113 vccsys: vccsys { 114 compatible = "regulator-fixed"; 115 regulator-name = "vcc3v8_sys"; 116 regulator-always-on; 117 regulator-boot-on; 118 regulator-min-microvolt = <3800000>; 119 regulator-max-microvolt = <3800000>; 120 }; 121 122 wireless-wlan { 123 compatible = "wlan-platdata"; 124 wifi_chip_type = "rtl8723cs"; 125 WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; 126 WIFI,vbat_gpio = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; 127 status = "okay"; 128 }; 129 130 wireless-bluetooth { 131 compatible = "bluetooth-platdata"; 132 uart_rts_gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_LOW>; 133 pinctrl-names = "default","rts_gpio"; 134 pinctrl-0 = <&uart1_rts>; 135 pinctrl-1 = <&uart1_rts_gpio>; 136 BT,reset_gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 137 BT,wake_gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; 138 BT,wake_host_irq = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; 139 status = "okay"; 140 }; 141}; 142 143 144&display_subsystem { 145 status = "okay"; 146}; 147 148&dsi { 149 status = "okay"; 150 151 panel@0 { 152 compatible = "aoly,sl008pa21y1285-b00", "simple-panel-dsi"; 153 reg = <0>; 154 backlight = <&backlight>; 155 enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; 156 reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 157 prepare-delay-ms = <20>; 158 reset-delay-ms = <20>; 159 init-delay-ms = <20>; 160 enable-delay-ms = <120>; 161 disable-delay-ms = <20>; 162 unprepare-delay-ms = <20>; 163 164 width-mm = <108>; 165 height-mm = <172>; 166 167 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 168 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 169 dsi,format = <MIPI_DSI_FMT_RGB888>; 170 dsi,lanes = <4>; 171 172 panel-init-sequence = [ 173 05 78 01 11 174 05 14 01 29 175 ]; 176 177 panel-exit-sequence = [ 178 05 00 01 28 179 05 00 01 10 180 ]; 181 182 display-timings { 183 native-mode = <&timing0>; 184 185 timing0: timing0 { 186 clock-frequency = <66000000>; 187 hactive = <800>; 188 vactive = <1280>; 189 hfront-porch = <2>; 190 hsync-len = <18>; 191 hback-porch = <18>; 192 vfront-porch = <4>; 193 vsync-len = <4>; 194 vback-porch = <16>; 195 hsync-active = <0>; 196 vsync-active = <0>; 197 de-active = <0>; 198 pixelclk-active = <0>; 199 }; 200 }; 201 202 ports { 203 #address-cells = <1>; 204 #size-cells = <0>; 205 206 port@0 { 207 reg = <0>; 208 panel_in_dsi: endpoint { 209 remote-endpoint = <&dsi_out_panel>; 210 }; 211 }; 212 }; 213 }; 214 215 ports { 216 #address-cells = <1>; 217 #size-cells = <0>; 218 219 port@1 { 220 reg = <1>; 221 dsi_out_panel: endpoint { 222 remote-endpoint = <&panel_in_dsi>; 223 }; 224 }; 225 }; 226}; 227 228&dsi_in_vopb { 229 status = "okay"; 230}; 231 232&route_dsi { 233 connect = <&vopb_out_dsi>; 234 status = "okay"; 235}; 236 237&bus_apll { 238 bus-supply = <&vdd_logic>; 239 status = "okay"; 240}; 241 242&cpu0 { 243 cpu-supply = <&vdd_arm>; 244}; 245 246&cpu0_opp_table { 247 /* 248 * max IR-drop values on different freq condition for this board! 249 */ 250 rockchip,board-irdrop = < 251 /*MHz MHz uV */ 252 0 815 37500 253 816 1119 50000 254 1200 1512 75000 255 >; 256}; 257 258&dmc_opp_table { 259 /* 260 * max IR-drop values on different freq condition for this board! 261 */ 262 rockchip,board-irdrop = < 263 /*MHz MHz uV */ 264 451 800 75000 265 >; 266}; 267 268&dfi { 269 status = "okay"; 270}; 271 272&dmc { 273 center-supply = <&vdd_logic>; 274 status = "okay"; 275}; 276 277&emmc { 278 bus-width = <8>; 279 cap-mmc-highspeed; 280 mmc-hs200-1_8v; 281 no-sdio; 282 no-sd; 283 disable-wp; 284 non-removable; 285 num-slots = <1>; 286 status = "okay"; 287}; 288 289&gpu { 290 mali-supply = <&vdd_logic>; 291 status = "okay"; 292}; 293 294&i2c0 { 295 status = "okay"; 296 297 rk817: pmic@20 { 298 compatible = "rockchip,rk817"; 299 reg = <0x20>; 300 interrupt-parent = <&gpio0>; 301 interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 302 pinctrl-names = "default", "pmic-sleep", 303 "pmic-power-off", "pmic-reset"; 304 pinctrl-0 = <&pmic_int>; 305 pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; 306 pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; 307 pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>; 308 rockchip,system-power-controller; 309 wakeup-source; 310 #clock-cells = <1>; 311 clock-output-names = "rk808-clkout1", "rk808-clkout2"; 312 //fb-inner-reg-idxs = <2>; 313 /* 1: rst regs (default in codes), 0: rst the pmic */ 314 pmic-reset-func = <1>; 315 316 vcc1-supply = <&vccsys>; 317 vcc2-supply = <&vccsys>; 318 vcc3-supply = <&vccsys>; 319 vcc4-supply = <&vccsys>; 320 vcc5-supply = <&vccsys>; 321 vcc6-supply = <&vccsys>; 322 vcc7-supply = <&vcc_3v0>; 323 vcc8-supply = <&vccsys>; 324 vcc9-supply = <&dcdc_boost>; 325 326 pwrkey { 327 status = "okay"; 328 }; 329 330 pinctrl_rk8xx: pinctrl_rk8xx { 331 gpio-controller; 332 #gpio-cells = <2>; 333 334 rk817_ts_gpio1: rk817_ts_gpio1 { 335 pins = "gpio_ts"; 336 function = "pin_fun1"; 337 /* output-low; */ 338 /* input-enable; */ 339 }; 340 341 rk817_gt_gpio2: rk817_gt_gpio2 { 342 pins = "gpio_gt"; 343 function = "pin_fun1"; 344 }; 345 346 rk817_pin_ts: rk817_pin_ts { 347 pins = "gpio_ts"; 348 function = "pin_fun0"; 349 }; 350 351 rk817_pin_gt: rk817_pin_gt { 352 pins = "gpio_gt"; 353 function = "pin_fun0"; 354 }; 355 356 rk817_slppin_null: rk817_slppin_null { 357 pins = "gpio_slp"; 358 function = "pin_fun0"; 359 }; 360 361 rk817_slppin_slp: rk817_slppin_slp { 362 pins = "gpio_slp"; 363 function = "pin_fun1"; 364 }; 365 366 rk817_slppin_pwrdn: rk817_slppin_pwrdn { 367 pins = "gpio_slp"; 368 function = "pin_fun2"; 369 }; 370 371 rk817_slppin_rst: rk817_slppin_rst { 372 pins = "gpio_slp"; 373 function = "pin_fun3"; 374 }; 375 }; 376 377 regulators { 378 vdd_logic: DCDC_REG1 { 379 regulator-always-on; 380 regulator-boot-on; 381 regulator-min-microvolt = <850000>; 382 regulator-max-microvolt = <1350000>; 383 regulator-ramp-delay = <6001>; 384 regulator-initial-mode = <0x2>; 385 regulator-name = "vdd_logic"; 386 regulator-state-mem { 387 regulator-on-in-suspend; 388 regulator-suspend-microvolt = <950000>; 389 }; 390 }; 391 392 vdd_arm: DCDC_REG2 { 393 regulator-always-on; 394 regulator-boot-on; 395 regulator-min-microvolt = <850000>; 396 regulator-max-microvolt = <1350000>; 397 regulator-ramp-delay = <6001>; 398 regulator-initial-mode = <0x2>; 399 regulator-name = "vdd_arm"; 400 regulator-state-mem { 401 regulator-off-in-suspend; 402 regulator-suspend-microvolt = <950000>; 403 }; 404 }; 405 406 vcc_ddr: DCDC_REG3 { 407 regulator-always-on; 408 regulator-boot-on; 409 regulator-initial-mode = <0x2>; 410 regulator-name = "vcc_ddr"; 411 regulator-state-mem { 412 regulator-on-in-suspend; 413 }; 414 }; 415 416 vcc_3v0: DCDC_REG4 { 417 regulator-always-on; 418 regulator-boot-on; 419 regulator-min-microvolt = <3000000>; 420 regulator-max-microvolt = <3000000>; 421 regulator-initial-mode = <0x2>; 422 regulator-name = "vcc_3v0"; 423 regulator-state-mem { 424 regulator-on-in-suspend; 425 regulator-suspend-microvolt = <3000000>; 426 }; 427 }; 428 429 vcc_1v0: LDO_REG1 { 430 regulator-always-on; 431 regulator-boot-on; 432 regulator-min-microvolt = <1000000>; 433 regulator-max-microvolt = <1000000>; 434 regulator-name = "vcc_1v0"; 435 regulator-state-mem { 436 regulator-on-in-suspend; 437 regulator-suspend-microvolt = <1000000>; 438 }; 439 }; 440 441 vcc1v8_soc: LDO_REG2 { 442 regulator-always-on; 443 regulator-boot-on; 444 regulator-min-microvolt = <1800000>; 445 regulator-max-microvolt = <1800000>; 446 447 regulator-name = "vcc1v8_soc"; 448 regulator-state-mem { 449 regulator-on-in-suspend; 450 regulator-suspend-microvolt = <1800000>; 451 }; 452 }; 453 454 vdd1v0_soc: LDO_REG3 { 455 regulator-always-on; 456 regulator-boot-on; 457 regulator-min-microvolt = <1000000>; 458 regulator-max-microvolt = <1000000>; 459 460 regulator-name = "vcc1v0_soc"; 461 regulator-state-mem { 462 regulator-on-in-suspend; 463 regulator-suspend-microvolt = <1000000>; 464 }; 465 }; 466 467 vcc3v0_pmu: LDO_REG4 { 468 regulator-always-on; 469 regulator-boot-on; 470 regulator-min-microvolt = <3000000>; 471 regulator-max-microvolt = <3000000>; 472 473 regulator-name = "vcc3v0_pmu"; 474 regulator-state-mem { 475 regulator-on-in-suspend; 476 regulator-suspend-microvolt = <3000000>; 477 478 }; 479 }; 480 481 vccio_sd: LDO_REG5 { 482 regulator-always-on; 483 regulator-boot-on; 484 regulator-min-microvolt = <1800000>; 485 regulator-max-microvolt = <3300000>; 486 487 regulator-name = "vccio_sd"; 488 regulator-state-mem { 489 regulator-on-in-suspend; 490 regulator-suspend-microvolt = <3300000>; 491 }; 492 }; 493 494 vcc_sd: LDO_REG6 { 495 regulator-min-microvolt = <3300000>; 496 regulator-max-microvolt = <3300000>; 497 498 regulator-name = "vcc_sd"; 499 regulator-state-mem { 500 regulator-on-in-suspend; 501 regulator-suspend-microvolt = <3300000>; 502 503 }; 504 }; 505 506 vcc2v8_dvp: LDO_REG7 { 507 regulator-boot-on; 508 regulator-min-microvolt = <2800000>; 509 regulator-max-microvolt = <2800000>; 510 511 regulator-name = "vcc2v8_dvp"; 512 regulator-state-mem { 513 regulator-off-in-suspend; 514 regulator-suspend-microvolt = <2800000>; 515 }; 516 }; 517 518 vcc1v8_dvp: LDO_REG8 { 519 regulator-boot-on; 520 regulator-min-microvolt = <1800000>; 521 regulator-max-microvolt = <1800000>; 522 523 regulator-name = "vcc1v8_dvp"; 524 regulator-state-mem { 525 regulator-off-in-suspend; 526 regulator-suspend-microvolt = <1800000>; 527 }; 528 }; 529 530 vdd1v5_dvp: LDO_REG9 { 531 regulator-boot-on; 532 regulator-min-microvolt = <1500000>; 533 regulator-max-microvolt = <1500000>; 534 535 regulator-name = "vdd1v5_dvp"; 536 regulator-state-mem { 537 regulator-off-in-suspend; 538 regulator-suspend-microvolt = <1500000>; 539 }; 540 }; 541 542 dcdc_boost: BOOST { 543 regulator-always-on; 544 regulator-boot-on; 545 regulator-min-microvolt = <4700000>; 546 regulator-max-microvolt = <5400000>; 547 regulator-name = "boost"; 548 }; 549 550 otg_switch: OTG_SWITCH { 551 regulator-name = "otg_switch"; 552 }; 553 }; 554 555 battery { 556 compatible = "rk817,battery"; 557 ocv_table = <3500 3548 3592 3636 3687 3740 3780 558 3806 3827 3846 3864 3889 3929 3964 559 3993 4015 4030 4041 4056 4076 4148>; 560 design_capacity = <4000>; 561 design_qmax = <4200>; 562 bat_res = <100>; 563 sleep_enter_current = <150>; 564 sleep_exit_current = <180>; 565 sleep_filter_current = <100>; 566 power_off_thresd = <3500>; 567 zero_algorithm_vol = <3850>; 568 max_soc_offset = <60>; 569 monitor_sec = <5>; 570 sample_res = <10>; 571 virtual_power = <0>; 572 }; 573 574 charger { 575 compatible = "rk817,charger"; 576 min_input_voltage = <4500>; 577 max_input_current = <1500>; 578 max_chrg_current = <2000>; 579 max_chrg_voltage = <4200>; 580 chrg_term_mode = <0>; 581 chrg_finish_cur = <300>; 582 virtual_power = <0>; 583 dc_det_adc = <0>; 584 extcon = <&u2phy>; 585 }; 586 587 rk817_codec: codec { 588 #sound-dai-cells = <0>; 589 compatible = "rockchip,rk817-codec"; 590 clocks = <&cru SCLK_I2S1_OUT>; 591 clock-names = "mclk"; 592 pinctrl-names = "default"; 593 pinctrl-0 = <&i2s1_2ch_mclk>; 594 hp-volume = <20>; 595 spk-volume = <3>; 596 mic-in-differential; 597 status = "okay"; 598 }; 599 }; 600}; 601 602&i2c1 { 603 status = "okay"; 604 605 ts@40 { 606 status = "okay"; 607 compatible = "GSL,GSL3673_800X1280"; 608 reg = <0x40>; 609 irq_gpio_number = <&gpio0 RK_PA5 IRQ_TYPE_LEVEL_LOW>; 610 rst_gpio_number = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; 611 }; 612 613 sensor@19 { 614 status = "okay"; 615 compatible = "gs_lis3dh"; 616 reg = <0x19>; 617 type = <SENSOR_TYPE_ACCEL>; 618 irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>; 619 irq_enable = <0>; 620 poll_delay_ms = <30>; 621 layout = <7>; 622 reprobe_en = <1>; 623 }; 624}; 625 626&i2c2 { 627 status = "okay"; 628}; 629 630&i2s1_2ch { 631 status = "okay"; 632 #sound-dai-cells = <0>; 633}; 634 635&io_domains { 636 status = "okay"; 637 638 vccio1-supply = <&vcc_3v0>; 639 vccio2-supply = <&vccio_sd>; 640 vccio3-supply = <&vcc2v8_dvp>; 641 vccio4-supply = <&vcc_3v0>; 642 vccio5-supply = <&vcc_3v0>; 643}; 644 645&nandc0 { 646 status = "okay"; 647}; 648 649&pinctrl { 650 headphone { 651 hp_det: hp-det { 652 rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 653 }; 654 }; 655 656 pmic { 657 pmic_int: pmic_int { 658 rockchip,pins = 659 <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 660 }; 661 662 soc_slppin_gpio: soc_slppin_gpio { 663 rockchip,pins = 664 <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 665 }; 666 667 soc_slppin_slp: soc_slppin_slp { 668 rockchip,pins = 669 <0 RK_PA4 1 &pcfg_pull_none>; 670 }; 671 672 soc_slppin_rst: soc_slppin_rst { 673 rockchip,pins = 674 <0 RK_PA4 2 &pcfg_pull_none>; 675 }; 676 }; 677 678 sdio-pwrseq { 679 wifi_enable_h: wifi-enable-h { 680 rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; 681 }; 682 }; 683}; 684 685&pmu_io_domains { 686 status = "okay"; 687 688 pmuio1-supply = <&vcc3v0_pmu>; 689 pmuio2-supply = <&vcc3v0_pmu>; 690}; 691 692&pwm1 { 693 status = "okay"; 694}; 695 696&rk_rga { 697 status = "okay"; 698}; 699 700&rockchip_suspend { 701 status = "okay"; 702 rockchip,sleep-debug-en = <1>; 703}; 704 705&saradc { 706 status = "okay"; 707 vref-supply = <&vcc1v8_soc>; 708}; 709 710&sdmmc { 711 bus-width = <4>; 712 cap-mmc-highspeed; 713 cap-sd-highspeed; 714 no-sdio; 715 no-mmc; 716 card-detect-delay = <800>; 717 ignore-pm-notify; 718 sd-uhs-sdr12; 719 sd-uhs-sdr25; 720 sd-uhs-sdr50; 721 sd-uhs-sdr104; 722 vqmmc-supply = <&vccio_sd>; 723 vmmc-supply = <&vcc_sd>; 724 status = "disabled"; 725}; 726 727&sdio { 728 bus-width = <4>; 729 cap-sd-highspeed; 730 no-sd; 731 no-mmc; 732 ignore-pm-notify; 733 keep-power-in-suspend; 734 non-removable; 735 mmc-pwrseq = <&sdio_pwrseq>; 736 sd-uhs-sdr104; 737 status = "okay"; 738}; 739 740&tsadc { 741 pinctrl-names = "gpio", "otpout"; 742 pinctrl-0 = <&tsadc_otp_gpio>; 743 pinctrl-1 = <&tsadc_otp_out>; 744 status = "okay"; 745}; 746 747&u2phy { 748 status = "okay"; 749 750 u2phy_host: host-port { 751 rockchip,low-power-mode; 752 status = "okay"; 753 }; 754 755 u2phy_otg: otg-port { 756 rockchip,low-power-mode; 757 status = "okay"; 758 }; 759}; 760 761&usb20_otg { 762 status = "okay"; 763}; 764 765&uart1 { 766 pinctrl-names = "default"; 767 pinctrl-0 = <&uart1_xfer &uart1_cts>; 768 status = "okay"; 769}; 770 771&vip_mmu { 772 status = "okay"; 773}; 774 775&vopb { 776 status = "okay"; 777}; 778 779&vopb_mmu { 780 status = "okay"; 781}; 782 783&mpp_srv { 784 status = "okay"; 785}; 786 787&vdpu { 788 status = "okay"; 789}; 790 791&vepu { 792 status = "okay"; 793}; 794 795&vpu_mmu { 796 status = "okay"; 797}; 798 799&hevc { 800 status = "okay"; 801}; 802 803&hevc_mmu { 804 status = "okay"; 805}; 806