1/* 2 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 */ 6 7/ { 8 backlight: backlight { 9 status = "okay"; 10 compatible = "pwm-backlight"; 11 pwms = <&pwm1 0 25000 0>; 12 brightness-levels = < 13 0 1 2 3 4 5 6 7 14 8 9 10 11 12 13 14 15 15 16 17 18 19 20 21 22 23 16 24 25 26 27 28 29 30 31 17 32 33 34 35 36 37 38 39 18 40 41 42 43 44 45 46 47 19 48 49 50 51 52 53 54 55 20 56 57 58 59 60 61 62 63 21 64 65 66 67 68 69 70 71 22 72 73 74 75 76 77 78 79 23 80 81 82 83 84 85 86 87 24 88 89 90 91 92 93 94 95 25 96 97 98 99 100 101 102 103 26 104 105 106 107 108 109 110 111 27 112 113 114 115 116 117 118 119 28 120 121 122 123 124 125 126 127 29 128 129 130 131 132 133 134 135 30 136 137 138 139 140 141 142 143 31 144 145 146 147 148 149 150 151 32 152 153 154 155 156 157 158 159 33 160 161 162 163 164 165 166 167 34 168 169 170 171 172 173 174 175 35 176 177 178 179 180 181 182 183 36 184 185 186 187 188 189 190 191 37 192 193 194 195 196 197 198 199 38 200 201 202 203 204 205 206 207 39 208 209 210 211 212 213 214 215 40 216 217 218 219 220 221 222 223 41 224 225 226 227 228 229 230 231 42 232 233 234 235 236 237 238 239 43 240 241 242 243 244 245 246 247 44 248 249 250 251 252 253 254 255>; 45 default-brightness-level = <200>; 46 }; 47 48 panel: panel { 49 compatible = "simple-panel"; 50 bus-format = <MEDIA_BUS_FMT_RGB666_1X18>; 51 backlight = <&backlight>; 52 enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 53 enable-delay-ms = <20>; 54 reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; 55 reset-delay-ms = <10>; 56 prepare-delay-ms = <20>; 57 unprepare-delay-ms = <20>; 58 disable-delay-ms = <20>; 59 /* spi-sdo-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; */ 60 spi-sdi-gpios = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; 61 spi-scl-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; 62 spi-cs-gpios = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; 63 width-mm = <217>; 64 height-mm = <136>; 65 status = "okay"; 66 pinctrl-names = "default"; 67 pinctrl-0 = <&spi_init_cmd>; 68 rockchip,cmd-type = "spi"; 69 70 /* type:0 is cmd, 1 is data */ 71 panel-init-sequence = [ 72 /* type delay num val1 val2 val3 */ 73 00 00 01 e0 74 01 00 01 00 75 01 00 01 07 76 01 00 01 0f 77 01 00 01 0d 78 01 00 01 1b 79 01 00 01 0a 80 01 00 01 3c 81 01 00 01 78 82 01 00 01 4a 83 01 00 01 07 84 01 00 01 0e 85 01 00 01 09 86 01 00 01 1b 87 01 00 01 1e 88 01 00 01 0f 89 00 00 01 e1 90 01 00 01 00 91 01 00 01 22 92 01 00 01 24 93 01 00 01 06 94 01 00 01 12 95 01 00 01 07 96 01 00 01 36 97 01 00 01 47 98 01 00 01 47 99 01 00 01 06 100 01 00 01 0a 101 01 00 01 07 102 01 00 01 30 103 01 00 01 37 104 01 00 01 0f 105 106 00 00 01 c0 107 01 00 01 10 108 01 00 01 10 109 110 00 00 01 c1 111 01 00 01 41 112 113 00 00 01 c5 114 01 00 01 00 115 01 00 01 22 116 01 00 01 80 117 118 00 00 01 36 119 01 00 01 48 120 121 00 00 01 3a //interface pixel format 122 01 00 01 66 // bpp cfg 123 // 3 11 124 // 16 55 125 // 18 66 126 // 24 77 127 128 00 00 01 b0 /* interface mode control */ 129 01 00 01 00 130 131 00 00 01 b1 /* frame rate 60hz */ 132 01 00 01 a0 133 01 00 01 11 134 00 00 01 b4 135 01 00 01 02 136 00 00 01 B6 137 01 00 01 32 138 01 00 01 02 139 140 00 00 01 b7 141 01 00 01 c6 142 143 00 00 01 be 144 01 00 01 00 145 01 00 01 04 146 147 00 00 01 e9 148 01 00 01 00 149 150 00 00 01 f7 151 01 00 01 a9 152 01 00 01 51 153 01 00 01 2c 154 01 00 01 82 155 156 00 78 01 11 157 00 00 01 29 158 ]; 159 160 panel-exit-sequence = [ 161 /* type delay num val1 val2 val3 */ 162 00 0a 01 28 163 00 78 01 10 164 ]; 165 166 display-timings { 167 native-mode = <&kd050fwfba002_timing>; 168 169 kd050fwfba002_timing: timing0 { 170 clock-frequency = <94081500>; 171 hactive = <320>; 172 vactive = <480>; 173 hback-porch = <10>; 174 hfront-porch = <5>; 175 vback-porch = <10>; 176 vfront-porch = <5>; 177 hsync-len = <10>; 178 vsync-len = <10>; 179 hsync-active = <0>; 180 vsync-active = <0>; 181 de-active = <0>; 182 pixelclk-active = <0>; 183 }; 184 }; 185 186 port { 187 panel_in_rgb: endpoint { 188 remote-endpoint = <&rgb_out_panel>; 189 }; 190 }; 191 }; 192}; 193 194&display_subsystem { 195 status = "okay"; 196}; 197 198&pinctrl { 199 spi_panel { 200 spi_init_cmd: spi-init-cmd { 201 rockchip,pins = 202 /* spi sdi */ 203 <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>, 204 /* spi scl */ 205 <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>, 206 /* spi cs */ 207 <1 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 208 }; 209 }; 210}; 211 212&pwm1 { 213 status = "okay"; 214}; 215 216&rgb { 217 status = "okay"; 218 219 ports { 220 rgb_out: port@1 { 221 reg = <1>; 222 #address-cells = <1>; 223 #size-cells = <0>; 224 225 rgb_out_panel: endpoint@0 { 226 reg = <0>; 227 remote-endpoint = <&panel_in_rgb>; 228 }; 229 }; 230 }; 231}; 232 233&route_rgb { 234 status = "okay"; 235}; 236 237&vop { 238 status = "okay"; 239 240 mcu-timing { 241 mcu-pix-total = <9>; 242 mcu-cs-pst = <1>; 243 mcu-cs-pend = <8>; 244 mcu-rw-pst = <2>; 245 mcu-rw-pend = <5>; 246 247 mcu-hold-mode = <0>; // default set to 0 248 }; 249}; 250