1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2022 Fuzhou Rockchip Electronics Co., Ltd.
4 */
5
6#include <dt-bindings/display/media-bus-format.h>
7
8/ {
9	reserved-memory {
10		#address-cells = <1>;
11		#size-cells = <1>;
12		ranges;
13
14		linux,cma {
15			compatible = "shared-dma-pool";
16			inactive;
17			reusable;
18			size = <0x1000000>;
19			linux,cma-default;
20		};
21	};
22};
23
24&display_subsystem {
25	status = "okay";
26};
27
28&i2c0 {
29	clock-frequency = <400000>;
30	status = "okay";
31
32	sii9022: sii9022@39 {
33		compatible = "sil,sii9022";
34		reg = <0x39>;
35		pinctrl-names = "default";
36		pinctrl-0 = <&sii902x_hdmi_int>;
37		interrupt-parent = <&gpio1>;
38		interrupts = <RK_PB0 IRQ_TYPE_LEVEL_HIGH>;
39		reset-gpio = <&gpio1 RK_PD1 GPIO_ACTIVE_LOW>;
40		enable-gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
41		/*
42		 * MEDIA_BUS_FMT_YUYV8_1X16 for bt1120
43		 * MEDIA_BUS_FMT_UYVY8_2X8  for bt656
44		 */
45		bus-format = <MEDIA_BUS_FMT_YUYV8_1X16>;
46
47		ports {
48			#address-cells = <1>;
49			#size-cells = <0>;
50
51			port@0 {
52				reg = <0>;
53
54				sii9022_in_rgb: endpoint {
55					remote-endpoint = <&rgb_out_sii9022>;
56				};
57			};
58		};
59	};
60};
61
62&pinctrl {
63	sii902x {
64		sii902x_hdmi_int: sii902x-hdmi-int {
65			rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
66		};
67	};
68};
69
70&rgb {
71	status = "okay";
72	pinctrl-names = "default";
73	/*
74	 * <&bt1120_pins> for bt1120
75	 * <&bt656_pins>  for bt656
76	 */
77	pinctrl-0 = <&bt1120_pins>;
78
79	ports {
80		port@1 {
81			reg = <1>;
82			#address-cells = <1>;
83			#size-cells = <0>;
84
85			rgb_out_sii9022: endpoint@0 {
86				reg = <0>;
87				remote-endpoint = <&sii9022_in_rgb>;
88			};
89		};
90	};
91};
92
93&rgb_in_vop {
94	status = "okay";
95};
96
97/*
98 * The pins of sdmmc1 and lcd are multiplexed
99 */
100&sdio {
101	status = "disabled";
102};
103
104&sdio_pwrseq {
105	status = "disabled";
106};
107
108&vop {
109	status = "okay";
110};
111