1 /* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR MIT) 2 * 3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef _UAPI_RK_ISPP_CONFIG_H 7 #define _UAPI_RK_ISPP_CONFIG_H 8 9 #include <linux/types.h> 10 #include <linux/v4l2-controls.h> 11 12 #define ISPP_API_VERSION KERNEL_VERSION(1, 8, 0) 13 14 #define ISPP_ID_TNR (0) 15 #define ISPP_ID_NR (1) 16 #define ISPP_ID_SHP (2) 17 #define ISPP_ID_FEC (3) 18 #define ISPP_ID_ORB (4) 19 #define ISPP_ID_MAX (5) 20 21 #define ISPP_MODULE_TNR BIT(ISPP_ID_TNR)/* 2TO1 */ 22 #define ISPP_MODULE_NR BIT(ISPP_ID_NR) 23 #define ISPP_MODULE_SHP BIT(ISPP_ID_SHP) 24 #define ISPP_MODULE_FEC BIT(ISPP_ID_FEC)/* CALIBRATION */ 25 #define ISPP_MODULE_ORB BIT(ISPP_ID_ORB) 26 /* extra function */ 27 #define ISPP_MODULE_TNR_3TO1 (BIT(16) | ISPP_MODULE_TNR) 28 #define ISPP_MODULE_FEC_ST (BIT(17) | ISPP_MODULE_FEC)/* STABILIZATION */ 29 30 #define TNR_SIGMA_CURVE_SIZE 17 31 #define TNR_LUMA_CURVE_SIZE 6 32 #define TNR_GFCOEF6_SIZE 6 33 #define TNR_GFCOEF3_SIZE 3 34 #define TNR_SCALE_YG_SIZE 4 35 #define TNR_SCALE_YL_SIZE 3 36 #define TNR_SCALE_CG_SIZE 3 37 #define TNR_SCALE_Y2CG_SIZE 3 38 #define TNR_SCALE_CL_SIZE 2 39 #define TNR_SCALE_Y2CL_SIZE 3 40 #define TNR_WEIGHT_Y_SIZE 3 41 42 #define NR_UVNR_UVGAIN_SIZE 2 43 #define NR_UVNR_T1FLT_WTQ_SIZE 8 44 #define NR_UVNR_T2GEN_WTQ_SIZE 4 45 #define NR_UVNR_T2FLT_WT_SIZE 3 46 #define NR_YNR_SGM_DX_SIZE 16 47 #define NR_YNR_SGM_Y_SIZE 17 48 #define NR_YNR_HWEIT_D_SIZE 20 49 #define NR_YNR_HGRAD_Y_SIZE 24 50 #define NR_YNR_HSTV_Y_SIZE 17 51 #define NR_YNR_CI_SIZE 4 52 #define NR_YNR_LGAIN_MIN_SIZE 4 53 #define NR_YNR_LWEIT_FLT_SIZE 4 54 #define NR_YNR_HGAIN_SGM_SIZE 4 55 #define NR_YNR_HWEIT_SIZE 4 56 #define NR_YNR_LWEIT_CMP_SIZE 2 57 #define NR_YNR_ST_SCALE_SIZE 3 58 59 #define SHP_PBF_KERNEL_SIZE 3 60 #define SHP_MRF_KERNEL_SIZE 6 61 #define SHP_MBF_KERNEL_SIZE 12 62 #define SHP_HRF_KERNEL_SIZE 6 63 #define SHP_HBF_KERNEL_SIZE 3 64 #define SHP_EDGE_COEF_SIZE 3 65 #define SHP_EDGE_SMOTH_SIZE 3 66 #define SHP_EDGE_GAUS_SIZE 6 67 #define SHP_DOG_KERNEL_SIZE 6 68 #define SHP_LUM_POINT_SIZE 6 69 #define SHP_SIGMA_SIZE 8 70 #define SHP_LUM_CLP_SIZE 8 71 #define SHP_LUM_MIN_SIZE 8 72 #define SHP_EDGE_LUM_THED_SIZE 8 73 #define SHP_CLAMP_SIZE 8 74 #define SHP_DETAIL_ALPHA_SIZE 8 75 76 #define ORB_DATA_NUM 10000 77 #define ORB_BRIEF_NUM 15 78 #define ORB_DUMMY_NUM 13 79 80 #define FEC_MESH_BUF_MAX 7 81 #define FEC_MESH_BUF_NUM 2 82 83 #define MAX_BUF_IDXFD_NUM 64 84 85 /************VIDIOC_PRIVATE*************/ 86 #define RKISPP_CMD_SET_INIT_MODULE \ 87 _IOW('V', BASE_VIDIOC_PRIVATE + 0, int) 88 89 #define RKISPP_CMD_GET_FECBUF_INFO \ 90 _IOR('V', BASE_VIDIOC_PRIVATE + 1, struct rkispp_fecbuf_info) 91 92 #define RKISPP_CMD_SET_FECBUF_SIZE \ 93 _IOW('V', BASE_VIDIOC_PRIVATE + 2, struct rkispp_fecbuf_size) 94 95 #define RKISPP_CMD_TRIGGER_MODE \ 96 _IOW('V', BASE_VIDIOC_PRIVATE + 3, struct rkispp_trigger_mode) 97 98 #define RKISPP_CMD_GET_TNRBUF_FD \ 99 _IOR('V', BASE_VIDIOC_PRIVATE + 4, struct rkispp_buf_idxfd) 100 101 #define RKISPP_CMD_GET_NRBUF_FD \ 102 _IOR('V', BASE_VIDIOC_PRIVATE + 5, struct rkispp_buf_idxfd) 103 104 /**independent fec video**/ 105 #define RKISPP_CMD_FEC_IN_OUT \ 106 _IOW('V', BASE_VIDIOC_PRIVATE + 10, struct rkispp_fec_in_out) 107 #define RKISPP_CMD_FEC_BUF_ADD \ 108 _IOW('V', BASE_VIDIOC_PRIVATE + 11, int) 109 #define RKISPP_CMD_FEC_BUF_DEL \ 110 _IOW('V', BASE_VIDIOC_PRIVATE + 12, int) 111 112 /************EVENT_PRIVATE**************/ 113 #define RKISPP_V4L2_EVENT_TNR_COMPLETE \ 114 (V4L2_EVENT_PRIVATE_START + 3) 115 116 struct rkispp_fec_in_out { 117 int in_width; 118 int in_height; 119 int out_width; 120 int out_height; 121 int in_fourcc; 122 int out_fourcc; 123 int in_pic_fd; 124 int out_pic_fd; 125 int mesh_xint_fd; 126 int mesh_xfra_fd; 127 int mesh_yint_fd; 128 int mesh_yfra_fd; 129 }; 130 131 struct rkispp_buf_idxfd { 132 __u32 buf_num; 133 __u32 index[MAX_BUF_IDXFD_NUM]; 134 __s32 dmafd[MAX_BUF_IDXFD_NUM]; 135 } __attribute__ ((packed)); 136 137 struct rkispp_trigger_mode { 138 __u32 module; 139 __u32 on; 140 } __attribute__ ((packed)); 141 142 struct rkispp_tnr_config { 143 __u8 opty_en; 144 __u8 optc_en; 145 __u8 gain_en; 146 __u8 pk0_y; 147 __u8 pk1_y; 148 __u8 pk0_c; 149 __u8 pk1_c; 150 __u8 glb_gain_cur_sqrt; 151 __u8 sigma_x[TNR_SIGMA_CURVE_SIZE - 1]; 152 __u8 gfcoef_y0[TNR_GFCOEF6_SIZE]; 153 __u8 gfcoef_y1[TNR_GFCOEF3_SIZE]; 154 __u8 gfcoef_y2[TNR_GFCOEF3_SIZE]; 155 __u8 gfcoef_y3[TNR_GFCOEF3_SIZE]; 156 __u8 gfcoef_yg0[TNR_GFCOEF6_SIZE]; 157 __u8 gfcoef_yg1[TNR_GFCOEF3_SIZE]; 158 __u8 gfcoef_yg2[TNR_GFCOEF3_SIZE]; 159 __u8 gfcoef_yg3[TNR_GFCOEF3_SIZE]; 160 __u8 gfcoef_yl0[TNR_GFCOEF6_SIZE]; 161 __u8 gfcoef_yl1[TNR_GFCOEF3_SIZE]; 162 __u8 gfcoef_yl2[TNR_GFCOEF3_SIZE]; 163 __u8 gfcoef_cg0[TNR_GFCOEF6_SIZE]; 164 __u8 gfcoef_cg1[TNR_GFCOEF3_SIZE]; 165 __u8 gfcoef_cg2[TNR_GFCOEF3_SIZE]; 166 __u8 gfcoef_cl0[TNR_GFCOEF6_SIZE]; 167 __u8 gfcoef_cl1[TNR_GFCOEF3_SIZE]; 168 __u8 weight_y[TNR_WEIGHT_Y_SIZE]; 169 170 __u16 glb_gain_cur __attribute__((aligned(2))); 171 __u16 glb_gain_nxt; 172 __u16 glb_gain_cur_div; 173 __u16 txt_th1_y; 174 __u16 txt_th0_c; 175 __u16 txt_th1_c; 176 __u16 txt_thy_dlt; 177 __u16 txt_thc_dlt; 178 __u16 txt_th0_y; 179 __u16 sigma_y[TNR_SIGMA_CURVE_SIZE]; 180 __u16 luma_curve[TNR_LUMA_CURVE_SIZE]; 181 __u16 scale_yg[TNR_SCALE_YG_SIZE]; 182 __u16 scale_yl[TNR_SCALE_YL_SIZE]; 183 __u16 scale_cg[TNR_SCALE_CG_SIZE]; 184 __u16 scale_y2cg[TNR_SCALE_Y2CG_SIZE]; 185 __u16 scale_cl[TNR_SCALE_CL_SIZE]; 186 __u16 scale_y2cl[TNR_SCALE_Y2CL_SIZE]; 187 } __attribute__ ((packed)); 188 189 struct rkispp_nr_config { 190 __u8 uvnr_step1_en; 191 __u8 uvnr_step2_en; 192 __u8 nr_gain_en; 193 __u8 uvnr_sd32_self_en; 194 __u8 uvnr_nobig_en; 195 __u8 uvnr_big_en; 196 __u8 uvnr_gain_1sigma; 197 __u8 uvnr_gain_offset; 198 __u8 uvnr_gain_t2gen; 199 __u8 uvnr_gain_iso; 200 __u8 uvnr_t1gen_m3alpha; 201 __u8 uvnr_t1flt_mode; 202 __u8 uvnr_t1flt_wtp; 203 __u8 uvnr_t2gen_m3alpha; 204 __u8 uvnr_t2gen_wtp; 205 __u8 uvnr_gain_uvgain[NR_UVNR_UVGAIN_SIZE]; 206 __u8 uvnr_t1flt_wtq[NR_UVNR_T1FLT_WTQ_SIZE]; 207 __u8 uvnr_t2gen_wtq[NR_UVNR_T2GEN_WTQ_SIZE]; 208 __u8 uvnr_t2flt_wtp; 209 __u8 uvnr_t2flt_wt[NR_UVNR_T2FLT_WT_SIZE]; 210 __u8 ynr_sgm_dx[NR_YNR_SGM_DX_SIZE]; 211 __u8 ynr_lci[NR_YNR_CI_SIZE]; 212 __u8 ynr_lgain_min[NR_YNR_LGAIN_MIN_SIZE]; 213 __u8 ynr_lgain_max; 214 __u8 ynr_lmerge_bound; 215 __u8 ynr_lmerge_ratio; 216 __u8 ynr_lweit_flt[NR_YNR_LWEIT_FLT_SIZE]; 217 __u8 ynr_hlci[NR_YNR_CI_SIZE]; 218 __u8 ynr_lhci[NR_YNR_CI_SIZE]; 219 __u8 ynr_hhci[NR_YNR_CI_SIZE]; 220 __u8 ynr_hgain_sgm[NR_YNR_HGAIN_SGM_SIZE]; 221 __u8 ynr_hweit_d[NR_YNR_HWEIT_D_SIZE]; 222 __u8 ynr_hgrad_y[NR_YNR_HGRAD_Y_SIZE]; 223 __u8 ynr_hmax_adjust; 224 __u8 ynr_hstrength; 225 __u8 ynr_lweit_cmp[NR_YNR_LWEIT_CMP_SIZE]; 226 __u8 ynr_lmaxgain_lv4; 227 228 __u16 uvnr_t1flt_msigma __attribute__((aligned(2))); 229 __u16 uvnr_t2gen_msigma; 230 __u16 uvnr_t2flt_msigma; 231 __u16 ynr_lsgm_y[NR_YNR_SGM_Y_SIZE]; 232 __u16 ynr_hsgm_y[NR_YNR_SGM_Y_SIZE]; 233 __u16 ynr_hweit[NR_YNR_HWEIT_SIZE]; 234 __u16 ynr_hstv_y[NR_YNR_HSTV_Y_SIZE]; 235 __u16 ynr_st_scale[NR_YNR_ST_SCALE_SIZE]; 236 } __attribute__ ((packed)); 237 238 struct rkispp_sharp_config { 239 __u8 rotation; 240 __u8 scl_down_v; 241 __u8 scl_down_h; 242 __u8 tile_ycnt; 243 __u8 tile_xcnt; 244 __u8 alpha_adp_en; 245 __u8 yin_flt_en; 246 __u8 edge_avg_en; 247 __u8 ehf_th; 248 __u8 pbf_ratio; 249 __u8 edge_thed; 250 __u8 dir_min; 251 __u8 pbf_shf_bits; 252 __u8 mbf_shf_bits; 253 __u8 hbf_shf_bits; 254 __u8 m_ratio; 255 __u8 h_ratio; 256 __u8 pbf_k[SHP_PBF_KERNEL_SIZE]; 257 __u8 mrf_k[SHP_MRF_KERNEL_SIZE]; 258 __u8 mbf_k[SHP_MBF_KERNEL_SIZE]; 259 __u8 hrf_k[SHP_HRF_KERNEL_SIZE]; 260 __u8 hbf_k[SHP_HBF_KERNEL_SIZE]; 261 __s8 eg_coef[SHP_EDGE_COEF_SIZE]; 262 __u8 eg_smoth[SHP_EDGE_SMOTH_SIZE]; 263 __u8 eg_gaus[SHP_EDGE_GAUS_SIZE]; 264 __s8 dog_k[SHP_DOG_KERNEL_SIZE]; 265 __u8 lum_point[SHP_LUM_POINT_SIZE]; 266 __u8 pbf_sigma[SHP_SIGMA_SIZE]; 267 __u8 lum_clp_m[SHP_LUM_CLP_SIZE]; 268 __s8 lum_min_m[SHP_LUM_MIN_SIZE]; 269 __u8 mbf_sigma[SHP_SIGMA_SIZE]; 270 __u8 lum_clp_h[SHP_LUM_CLP_SIZE]; 271 __u8 hbf_sigma[SHP_SIGMA_SIZE]; 272 __u8 edge_lum_thed[SHP_EDGE_LUM_THED_SIZE]; 273 __u8 clamp_pos[SHP_CLAMP_SIZE]; 274 __u8 clamp_neg[SHP_CLAMP_SIZE]; 275 __u8 detail_alpha[SHP_DETAIL_ALPHA_SIZE]; 276 277 __u16 hbf_ratio __attribute__((aligned(2))); 278 __u16 smoth_th4; 279 __u16 l_alpha; 280 __u16 g_alpha; 281 __u16 rfl_ratio; 282 __u16 rfh_ratio; 283 } __attribute__ ((packed)); 284 285 enum rkispp_fecbuf_stat { 286 FEC_BUF_INIT = 0, 287 FEC_BUF_WAIT2CHIP, 288 FEC_BUF_CHIPINUSE, 289 }; 290 291 struct rkispp_fecbuf_info { 292 __s32 buf_fd[FEC_MESH_BUF_MAX]; 293 __u32 buf_size[FEC_MESH_BUF_MAX]; 294 } __attribute__ ((packed)); 295 296 struct rkispp_fecbuf_size { 297 __u32 meas_width; 298 __u32 meas_height; 299 __u32 meas_mode; 300 int buf_cnt; 301 } __attribute__ ((packed)); 302 303 struct rkispp_fec_head { 304 enum rkispp_fecbuf_stat stat; 305 __u32 meshxf_oft; 306 __u32 meshyf_oft; 307 __u32 meshxi_oft; 308 __u32 meshyi_oft; 309 } __attribute__ ((packed)); 310 311 struct rkispp_fec_config { 312 __u8 mesh_density; 313 __u8 crop_en; 314 __u16 crop_width __attribute__((aligned(2))); 315 __u16 crop_height; 316 __u32 mesh_size __attribute__((aligned(4))); 317 __s32 buf_fd; 318 } __attribute__ ((packed)); 319 320 struct rkispp_orb_config { 321 __u8 limit_value; 322 __u32 max_feature __attribute__((aligned(4))); 323 } __attribute__ ((packed)); 324 325 struct rkispp_buf_info { 326 /* __s32 fd; */ 327 __u32 index; 328 __u32 size; 329 } __attribute__ ((packed)); 330 331 /** 332 * struct rkispp_params_cfghead - Rockchip ISPP Input Parameters Meta Data 333 * 334 * @module_en_update: mask the enable bits of which module should be updated 335 * @module_ens: mask the enable value of each module, only update the module 336 * which correspond bit was set in module_en_update 337 * @module_cfg_update: mask the config bits of which module should be updated 338 */ 339 struct rkispp_params_cfghead { 340 __u32 module_en_update; 341 __u32 module_ens; 342 __u32 module_cfg_update; 343 344 __u32 frame_id; 345 } __attribute__ ((packed)); 346 347 /** 348 * struct rkispp_params_tnrcfg - Rockchip ISPP Input Parameters Meta Data 349 */ 350 struct rkispp_params_tnrcfg { 351 struct rkispp_params_cfghead head; 352 353 struct rkispp_tnr_config tnr_cfg; 354 /* struct rkispp_buf_info gain; */ 355 /* struct rkispp_buf_info image; */ 356 } __attribute__ ((packed)); 357 358 /** 359 * struct rkispp_params_nrcfg - Rockchip ISPP Input Parameters Meta Data 360 */ 361 struct rkispp_params_nrcfg { 362 struct rkispp_params_cfghead head; 363 364 struct rkispp_nr_config nr_cfg; 365 struct rkispp_sharp_config shp_cfg; 366 struct rkispp_orb_config orb_cfg; 367 368 struct rkispp_buf_info gain; 369 /* struct rkispp_buf_info image; */ 370 } __attribute__ ((packed)); 371 372 /** 373 * struct rkispp_params_feccfg - Rockchip ISPP Input Parameters Meta Data 374 */ 375 struct rkispp_params_feccfg { 376 struct rkispp_params_cfghead head; 377 378 struct rkispp_fec_config fec_cfg; 379 struct rkispp_buf_info image; 380 } __attribute__ ((packed)); 381 382 struct rkispp_orb_data { 383 __u8 brief[ORB_BRIEF_NUM]; 384 __u32 y : 13; 385 __u32 x : 13; 386 __u32 dmy1 : 6; 387 __u8 dmy2[ORB_DUMMY_NUM]; 388 } __attribute__ ((packed)); 389 390 /** 391 * struct rkispp_stats_nrbuf - Rockchip ISPP Statistics 392 * 393 * @meas_type: measurement types 394 * @frame_id: frame ID for sync 395 * @data: statistics data 396 */ 397 struct rkispp_stats_nrbuf { 398 struct rkispp_orb_data data[ORB_DATA_NUM]; 399 400 __u32 total_num __attribute__((aligned(4))); 401 __u32 meas_type; 402 __u32 frame_id; 403 404 struct rkispp_buf_info image; 405 } __attribute__ ((packed)); 406 407 /** 408 * struct rkispp_stats_tnrbuf - Rockchip ISPP Statistics 409 * 410 * @meas_type: measurement types 411 * @frame_id: frame ID for sync 412 */ 413 struct rkispp_stats_tnrbuf { 414 __u32 meas_type; 415 __u32 frame_id; 416 417 struct rkispp_buf_info gain; 418 struct rkispp_buf_info gainkg; 419 /* struct rkispp_buf_info image; */ 420 } __attribute__ ((packed)); 421 422 #endif 423