1 /* 2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPL or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This library is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This library is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 #ifndef _DT_BINDINGS_DRAM_ROCKCHIP_RK3328_H 43 #define _DT_BINDINGS_DRAM_ROCKCHIP_RK3328_H 44 45 #define DDR3_DS_34ohm (34) 46 #define DDR3_DS_40ohm (40) 47 48 #define DDR3_ODT_DIS (0) 49 #define DDR3_ODT_40ohm (40) 50 #define DDR3_ODT_60ohm (60) 51 #define DDR3_ODT_120ohm (120) 52 53 #define LP2_DS_34ohm (34) 54 #define LP2_DS_40ohm (40) 55 #define LP2_DS_48ohm (48) 56 #define LP2_DS_60ohm (60) 57 #define LP2_DS_68_6ohm (68) /* optional */ 58 #define LP2_DS_80ohm (80) 59 #define LP2_DS_120ohm (120) /* optional */ 60 61 #define LP3_DS_34ohm (34) 62 #define LP3_DS_40ohm (40) 63 #define LP3_DS_48ohm (48) 64 #define LP3_DS_60ohm (60) 65 #define LP3_DS_80ohm (80) 66 #define LP3_DS_34D_40U (3440) 67 #define LP3_DS_40D_48U (4048) 68 #define LP3_DS_34D_48U (3448) 69 70 #define LP3_ODT_DIS (0) 71 #define LP3_ODT_60ohm (60) 72 #define LP3_ODT_120ohm (120) 73 #define LP3_ODT_240ohm (240) 74 75 #define LP4_PDDS_40ohm (40) 76 #define LP4_PDDS_48ohm (48) 77 #define LP4_PDDS_60ohm (60) 78 #define LP4_PDDS_80ohm (80) 79 #define LP4_PDDS_120ohm (120) 80 #define LP4_PDDS_240ohm (240) 81 82 #define LP4_DQ_ODT_40ohm (40) 83 #define LP4_DQ_ODT_48ohm (48) 84 #define LP4_DQ_ODT_60ohm (60) 85 #define LP4_DQ_ODT_80ohm (80) 86 #define LP4_DQ_ODT_120ohm (120) 87 #define LP4_DQ_ODT_240ohm (240) 88 #define LP4_DQ_ODT_DIS (0) 89 90 #define LP4_CA_ODT_40ohm (40) 91 #define LP4_CA_ODT_48ohm (48) 92 #define LP4_CA_ODT_60ohm (60) 93 #define LP4_CA_ODT_80ohm (80) 94 #define LP4_CA_ODT_120ohm (120) 95 #define LP4_CA_ODT_240ohm (240) 96 #define LP4_CA_ODT_DIS (0) 97 98 #define DDR4_DS_34ohm (34) 99 #define DDR4_DS_48ohm (48) 100 #define DDR4_RTT_NOM_DIS (0) 101 #define DDR4_RTT_NOM_60ohm (60) 102 #define DDR4_RTT_NOM_120ohm (120) 103 #define DDR4_RTT_NOM_40ohm (40) 104 #define DDR4_RTT_NOM_240ohm (240) 105 #define DDR4_RTT_NOM_48ohm (48) 106 #define DDR4_RTT_NOM_80ohm (80) 107 #define DDR4_RTT_NOM_34ohm (34) 108 109 #define PHY_DDR3_RON_RTT_DISABLE (0) 110 #define PHY_DDR3_RON_RTT_451ohm (1) 111 #define PHY_DDR3_RON_RTT_225ohm (2) 112 #define PHY_DDR3_RON_RTT_150ohm (3) 113 #define PHY_DDR3_RON_RTT_112ohm (4) 114 #define PHY_DDR3_RON_RTT_90ohm (5) 115 #define PHY_DDR3_RON_RTT_75ohm (6) 116 #define PHY_DDR3_RON_RTT_64ohm (7) 117 #define PHY_DDR3_RON_RTT_56ohm (16) 118 #define PHY_DDR3_RON_RTT_50ohm (17) 119 #define PHY_DDR3_RON_RTT_45ohm (18) 120 #define PHY_DDR3_RON_RTT_41ohm (19) 121 #define PHY_DDR3_RON_RTT_37ohm (20) 122 #define PHY_DDR3_RON_RTT_34ohm (21) 123 #define PHY_DDR3_RON_RTT_33ohm (22) 124 #define PHY_DDR3_RON_RTT_30ohm (23) 125 #define PHY_DDR3_RON_RTT_28ohm (24) 126 #define PHY_DDR3_RON_RTT_26ohm (25) 127 #define PHY_DDR3_RON_RTT_25ohm (26) 128 #define PHY_DDR3_RON_RTT_23ohm (27) 129 #define PHY_DDR3_RON_RTT_22ohm (28) 130 #define PHY_DDR3_RON_RTT_21ohm (29) 131 #define PHY_DDR3_RON_RTT_20ohm (30) 132 #define PHY_DDR3_RON_RTT_19ohm (31) 133 134 #define PHY_DDR4_LPDDR3_RON_RTT_DISABLE (0) 135 #define PHY_DDR4_LPDDR3_RON_RTT_480ohm (1) 136 #define PHY_DDR4_LPDDR3_RON_RTT_240ohm (2) 137 #define PHY_DDR4_LPDDR3_RON_RTT_160ohm (3) 138 #define PHY_DDR4_LPDDR3_RON_RTT_120ohm (4) 139 #define PHY_DDR4_LPDDR3_RON_RTT_96ohm (5) 140 #define PHY_DDR4_LPDDR3_RON_RTT_80ohm (6) 141 #define PHY_DDR4_LPDDR3_RON_RTT_68ohm (7) 142 #define PHY_DDR4_LPDDR3_RON_RTT_60ohm (16) 143 #define PHY_DDR4_LPDDR3_RON_RTT_53ohm (17) 144 #define PHY_DDR4_LPDDR3_RON_RTT_48ohm (18) 145 #define PHY_DDR4_LPDDR3_RON_RTT_43ohm (19) 146 #define PHY_DDR4_LPDDR3_RON_RTT_40ohm (20) 147 #define PHY_DDR4_LPDDR3_RON_RTT_37ohm (21) 148 #define PHY_DDR4_LPDDR3_RON_RTT_34ohm (22) 149 #define PHY_DDR4_LPDDR3_RON_RTT_32ohm (23) 150 #define PHY_DDR4_LPDDR3_RON_RTT_30ohm (24) 151 #define PHY_DDR4_LPDDR3_RON_RTT_28ohm (25) 152 #define PHY_DDR4_LPDDR3_RON_RTT_26ohm (26) 153 #define PHY_DDR4_LPDDR3_RON_RTT_25ohm (27) 154 #define PHY_DDR4_LPDDR3_RON_RTT_24ohm (28) 155 #define PHY_DDR4_LPDDR3_RON_RTT_22ohm (29) 156 #define PHY_DDR4_LPDDR3_RON_RTT_21ohm (30) 157 #define PHY_DDR4_LPDDR3_RON_RTT_20ohm (31) 158 159 #endif /*_DT_BINDINGS_DRAM_ROCKCHIP_RK3328_H*/ 160