1 /* 2 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 */ 6 7 #ifndef _DT_BINDINGS_DRAM_ROCKCHIP_PX30_H 8 #define _DT_BINDINGS_DRAM_ROCKCHIP_PX30_H 9 10 #define DDR2_DS_FULL (0) 11 #define DDR2_DS_REDUCE (1) 12 13 #define DDR2_ODT_DIS (0) 14 #define DDR2_ODT_50ohm (50) /* optional */ 15 #define DDR2_ODT_75ohm (75) 16 #define DDR2_ODT_150ohm (150) 17 18 #define DDR3_DS_34ohm (34) 19 #define DDR3_DS_40ohm (40) 20 21 #define DDR3_ODT_DIS (0) 22 #define DDR3_ODT_40ohm (40) 23 #define DDR3_ODT_60ohm (60) 24 #define DDR3_ODT_120ohm (120) 25 26 #define LP2_DS_34ohm (34) 27 #define LP2_DS_40ohm (40) 28 #define LP2_DS_48ohm (48) 29 #define LP2_DS_60ohm (60) 30 #define LP2_DS_68_6ohm (68) /* optional */ 31 #define LP2_DS_80ohm (80) 32 #define LP2_DS_120ohm (120) /* optional */ 33 34 #define LP3_DS_34ohm (34) 35 #define LP3_DS_40ohm (40) 36 #define LP3_DS_48ohm (48) 37 #define LP3_DS_60ohm (60) 38 #define LP3_DS_80ohm (80) 39 #define LP3_DS_34D_40U (3440) 40 #define LP3_DS_40D_48U (4048) 41 #define LP3_DS_34D_48U (3448) 42 43 #define LP3_ODT_DIS (0) 44 #define LP3_ODT_60ohm (60) 45 #define LP3_ODT_120ohm (120) 46 #define LP3_ODT_240ohm (240) 47 48 #define LP4_PDDS_40ohm (40) 49 #define LP4_PDDS_48ohm (48) 50 #define LP4_PDDS_60ohm (60) 51 #define LP4_PDDS_80ohm (80) 52 #define LP4_PDDS_120ohm (120) 53 #define LP4_PDDS_240ohm (240) 54 55 #define LP4_DQ_ODT_40ohm (40) 56 #define LP4_DQ_ODT_48ohm (48) 57 #define LP4_DQ_ODT_60ohm (60) 58 #define LP4_DQ_ODT_80ohm (80) 59 #define LP4_DQ_ODT_120ohm (120) 60 #define LP4_DQ_ODT_240ohm (240) 61 #define LP4_DQ_ODT_DIS (0) 62 63 #define LP4_CA_ODT_40ohm (40) 64 #define LP4_CA_ODT_48ohm (48) 65 #define LP4_CA_ODT_60ohm (60) 66 #define LP4_CA_ODT_80ohm (80) 67 #define LP4_CA_ODT_120ohm (120) 68 #define LP4_CA_ODT_240ohm (240) 69 #define LP4_CA_ODT_DIS (0) 70 71 #define DDR4_DS_34ohm (34) 72 #define DDR4_DS_48ohm (48) 73 #define DDR4_RTT_NOM_DIS (0) 74 #define DDR4_RTT_NOM_60ohm (60) 75 #define DDR4_RTT_NOM_120ohm (120) 76 #define DDR4_RTT_NOM_40ohm (40) 77 #define DDR4_RTT_NOM_240ohm (240) 78 #define DDR4_RTT_NOM_48ohm (48) 79 #define DDR4_RTT_NOM_80ohm (80) 80 #define DDR4_RTT_NOM_34ohm (34) 81 82 #define PHY_DDR3_RON_RTT_DISABLE (0) 83 #define PHY_DDR3_RON_RTT_451ohm (1) 84 #define PHY_DDR3_RON_RTT_225ohm (2) 85 #define PHY_DDR3_RON_RTT_150ohm (3) 86 #define PHY_DDR3_RON_RTT_112ohm (4) 87 #define PHY_DDR3_RON_RTT_90ohm (5) 88 #define PHY_DDR3_RON_RTT_75ohm (6) 89 #define PHY_DDR3_RON_RTT_64ohm (7) 90 #define PHY_DDR3_RON_RTT_56ohm (16) 91 #define PHY_DDR3_RON_RTT_50ohm (17) 92 #define PHY_DDR3_RON_RTT_45ohm (18) 93 #define PHY_DDR3_RON_RTT_41ohm (19) 94 #define PHY_DDR3_RON_RTT_37ohm (20) 95 #define PHY_DDR3_RON_RTT_34ohm (21) 96 #define PHY_DDR3_RON_RTT_33ohm (22) 97 #define PHY_DDR3_RON_RTT_30ohm (23) 98 #define PHY_DDR3_RON_RTT_28ohm (24) 99 #define PHY_DDR3_RON_RTT_26ohm (25) 100 #define PHY_DDR3_RON_RTT_25ohm (26) 101 #define PHY_DDR3_RON_RTT_23ohm (27) 102 #define PHY_DDR3_RON_RTT_22ohm (28) 103 #define PHY_DDR3_RON_RTT_21ohm (29) 104 #define PHY_DDR3_RON_RTT_20ohm (30) 105 #define PHY_DDR3_RON_RTT_19ohm (31) 106 107 #define PHY_DDR4_LPDDR3_2_RON_RTT_DISABLE (0) 108 #define PHY_DDR4_LPDDR3_2_RON_RTT_480ohm (1) 109 #define PHY_DDR4_LPDDR3_2_RON_RTT_240ohm (2) 110 #define PHY_DDR4_LPDDR3_2_RON_RTT_160ohm (3) 111 #define PHY_DDR4_LPDDR3_2_RON_RTT_120ohm (4) 112 #define PHY_DDR4_LPDDR3_2_RON_RTT_96ohm (5) 113 #define PHY_DDR4_LPDDR3_2_RON_RTT_80ohm (6) 114 #define PHY_DDR4_LPDDR3_2_RON_RTT_68ohm (7) 115 #define PHY_DDR4_LPDDR3_2_RON_RTT_60ohm (16) 116 #define PHY_DDR4_LPDDR3_2_RON_RTT_53ohm (17) 117 #define PHY_DDR4_LPDDR3_2_RON_RTT_48ohm (18) 118 #define PHY_DDR4_LPDDR3_2_RON_RTT_43ohm (19) 119 #define PHY_DDR4_LPDDR3_2_RON_RTT_40ohm (20) 120 #define PHY_DDR4_LPDDR3_2_RON_RTT_37ohm (21) 121 #define PHY_DDR4_LPDDR3_2_RON_RTT_34ohm (22) 122 #define PHY_DDR4_LPDDR3_2_RON_RTT_32ohm (23) 123 #define PHY_DDR4_LPDDR3_2_RON_RTT_30ohm (24) 124 #define PHY_DDR4_LPDDR3_2_RON_RTT_28ohm (25) 125 #define PHY_DDR4_LPDDR3_2_RON_RTT_26ohm (26) 126 #define PHY_DDR4_LPDDR3_2_RON_RTT_25ohm (27) 127 #define PHY_DDR4_LPDDR3_2_RON_RTT_24ohm (28) 128 #define PHY_DDR4_LPDDR3_2_RON_RTT_22ohm (29) 129 #define PHY_DDR4_LPDDR3_2_RON_RTT_21ohm (30) 130 #define PHY_DDR4_LPDDR3_2_RON_RTT_20ohm (31) 131 132 #define LP4_VDDQ_2_5 (0) 133 #define LP4_VDDQ_3 (1) 134 135 #define LP4X_VDDQ_0_6 (0) 136 #define LP4X_VDDQ_0_5 (1) 137 138 #define IGNORE_THIS (0) 139 140 #endif /*_DT_BINDINGS_DRAM_ROCKCHIP_PX30_H*/ 141