1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (c) 2020 Rockchip Electronics Co., Ltd
4 *
5 * author:
6 * Alpha Lin, alpha.lin@rock-chips.com
7 * Ding Wei, leo.ding@rock-chips.com
8 *
9 */
10 #include <asm/cacheflush.h>
11 #include <linux/clk.h>
12 #include <linux/delay.h>
13 #include <linux/iopoll.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/of_platform.h>
18 #include <linux/slab.h>
19 #include <linux/uaccess.h>
20 #include <linux/regmap.h>
21 #include <linux/proc_fs.h>
22 #include <soc/rockchip/pm_domains.h>
23
24 #include "mpp_debug.h"
25 #include "mpp_common.h"
26 #include "mpp_iommu.h"
27
28 #define JPGDEC_DRIVER_NAME "mpp_jpgdec"
29
30 #define JPGDEC_SESSION_MAX_BUFFERS 40
31 /* The maximum registers number of all the version */
32 #define JPGDEC_REG_NUM 42
33 #define JPGDEC_REG_HW_ID_INDEX 0
34 #define JPGDEC_REG_START_INDEX 0
35 #define JPGDEC_REG_END_INDEX 41
36
37 #define JPGDEC_GET_PROD_NUM(x) (((x) >> 16) & 0xffff)
38 #define JPGDEC_GET_SUPPORT_BIT(x) (((x) >> 8) & 0x1)
39
40 #define JPGDEC_REG_INT_EN_BASE 0x004
41 #define JPGDEC_REG_INT_EN_INDEX (1)
42
43 #define JPGDEC_CARE_STREAM_ERROR_EN BIT(16)
44 #define JPGDEC_EMPTY_FORCE_END BIT(15)
45 #define JPGDEC_SOFT_RSET_READY BIT(14)
46 #define JPGDEC_BUF_EMPTY_STA BIT(13)
47 #define JPGDEC_TIMEOUT_STA BIT(12)
48 #define JPGDEC_ERROR_STA BIT(11)
49 #define JPGDEC_BUS_STA BIT(10)
50 #define JPGDEC_REDAY_STA BIT(9)
51 #define JPGDEC_IRQ BIT(8)
52 #define JPGDEC_WAIT_RESET_EN BIT(7)
53 #define JPGDEC_IRQ_RAW BIT(6)
54 #define JPGDEC_SOFT_REST_EN BIT(5)
55 #define JPGDEC_BUF_EMPTY_RELOAD_EN BIT(4)
56 #define JPGDEC_BUF_EMPTY_EN BIT(3)
57 #define JPGDEC_TIMEOUT_EN BIT(2)
58 #define JPGDEC_IRQ_DIS BIT(1)
59 #define JPGDEC_START_EN BIT(0)
60
61 #define JPGDEC_REG_SYS_BASE 0x008
62 #define JPGDEC_FORCE_SOFTRESET_VALID BIT(17)
63
64 #define JPGDEC_REG_PIC_INFO_BASE 0x00c
65 #define JPGDEC_REG_PIC_INFO_INDEX (3)
66 #define JPGDEC_GET_WIDTH(x) (((x) & 0xffff) + 1)
67 #define JPGDEC_GET_HEIGHT(x) ((((x) >> 16) & 0xffff) + 1)
68
69 #define JPGDEC_REG_STREAM_RLC_BASE 0x030
70 #define JPGDEC_REG_STREAM_RLC_BASE_INDEX (12)
71
72 #define to_jpgdec_task(task) \
73 container_of(task, struct jpgdec_task, mpp_task)
74 #define to_jpgdec_dev(dev) \
75 container_of(dev, struct jpgdec_dev, mpp)
76
77 struct jpgdec_task {
78 struct mpp_task mpp_task;
79 enum MPP_CLOCK_MODE clk_mode;
80 u32 reg[JPGDEC_REG_NUM];
81
82 struct reg_offset_info off_inf;
83 u32 strm_addr;
84 u32 irq_status;
85 /* req for current task */
86 u32 w_req_cnt;
87 struct mpp_request w_reqs[MPP_MAX_MSG_NUM];
88 u32 r_req_cnt;
89 struct mpp_request r_reqs[MPP_MAX_MSG_NUM];
90 };
91
92 struct jpgdec_dev {
93 struct mpp_dev mpp;
94
95 struct mpp_clk_info aclk_info;
96 struct mpp_clk_info hclk_info;
97 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
98 struct proc_dir_entry *procfs;
99 #endif
100 struct reset_control *rst_a;
101 struct reset_control *rst_h;
102 };
103
104 static struct mpp_hw_info jpgdec_v1_hw_info = {
105 .reg_num = JPGDEC_REG_NUM,
106 .reg_id = JPGDEC_REG_HW_ID_INDEX,
107 .reg_start = JPGDEC_REG_START_INDEX,
108 .reg_end = JPGDEC_REG_END_INDEX,
109 .reg_en = JPGDEC_REG_INT_EN_INDEX,
110 };
111
112 /*
113 * file handle translate information
114 */
115 static const u16 trans_tbl_jpgdec[] = {
116 9, 10, 11, 12, 13,
117 };
118
119 #define JPEGDEC_FMT_DEFAULT 0
120 static struct mpp_trans_info jpgdec_v1_trans[] = {
121 [JPEGDEC_FMT_DEFAULT] = {
122 .count = ARRAY_SIZE(trans_tbl_jpgdec),
123 .table = trans_tbl_jpgdec,
124 },
125 };
126
jpgdec_process_reg_fd(struct mpp_session * session,struct jpgdec_task * task,struct mpp_task_msgs * msgs)127 static int jpgdec_process_reg_fd(struct mpp_session *session,
128 struct jpgdec_task *task,
129 struct mpp_task_msgs *msgs)
130 {
131 int ret = 0;
132
133 ret = mpp_translate_reg_address(session, &task->mpp_task,
134 JPEGDEC_FMT_DEFAULT, task->reg, &task->off_inf);
135 if (ret)
136 return ret;
137
138 mpp_translate_reg_offset_info(&task->mpp_task,
139 &task->off_inf, task->reg);
140 return 0;
141 }
142
jpgdec_extract_task_msg(struct jpgdec_task * task,struct mpp_task_msgs * msgs)143 static int jpgdec_extract_task_msg(struct jpgdec_task *task,
144 struct mpp_task_msgs *msgs)
145 {
146 u32 i;
147 int ret;
148 struct mpp_request *req;
149 struct mpp_hw_info *hw_info = task->mpp_task.hw_info;
150
151 for (i = 0; i < msgs->req_cnt; i++) {
152 u32 off_s, off_e;
153
154 req = &msgs->reqs[i];
155 if (!req->size)
156 continue;
157
158 switch (req->cmd) {
159 case MPP_CMD_SET_REG_WRITE: {
160 off_s = hw_info->reg_start * sizeof(u32);
161 off_e = hw_info->reg_end * sizeof(u32);
162 ret = mpp_check_req(req, 0, sizeof(task->reg),
163 off_s, off_e);
164 if (ret)
165 continue;
166 if (copy_from_user((u8 *)task->reg + req->offset,
167 req->data, req->size)) {
168 mpp_err("copy_from_user reg failed\n");
169 return -EIO;
170 }
171 memcpy(&task->w_reqs[task->w_req_cnt++],
172 req, sizeof(*req));
173 } break;
174 case MPP_CMD_SET_REG_READ: {
175 off_s = hw_info->reg_start * sizeof(u32);
176 off_e = hw_info->reg_end * sizeof(u32);
177 ret = mpp_check_req(req, 0, sizeof(task->reg),
178 off_s, off_e);
179 if (ret)
180 continue;
181 memcpy(&task->r_reqs[task->r_req_cnt++],
182 req, sizeof(*req));
183 } break;
184 case MPP_CMD_SET_REG_ADDR_OFFSET: {
185 mpp_extract_reg_offset_info(&task->off_inf, req);
186 } break;
187 default:
188 break;
189 }
190 }
191 mpp_debug(DEBUG_TASK_INFO, "w_req_cnt %d, r_req_cnt %d\n",
192 task->w_req_cnt, task->r_req_cnt);
193
194 return 0;
195 }
196
jpgdec_alloc_task(struct mpp_session * session,struct mpp_task_msgs * msgs)197 static void *jpgdec_alloc_task(struct mpp_session *session,
198 struct mpp_task_msgs *msgs)
199 {
200 int ret;
201 struct mpp_task *mpp_task = NULL;
202 struct jpgdec_task *task = NULL;
203 struct mpp_dev *mpp = session->mpp;
204
205 mpp_debug_enter();
206
207 task = kzalloc(sizeof(*task), GFP_KERNEL);
208 if (!task)
209 return NULL;
210
211 mpp_task = &task->mpp_task;
212 mpp_task_init(session, mpp_task);
213 mpp_task->hw_info = mpp->var->hw_info;
214 mpp_task->reg = task->reg;
215 /* extract reqs for current task */
216 ret = jpgdec_extract_task_msg(task, msgs);
217 if (ret)
218 goto fail;
219 /* process fd in register */
220 if (!(msgs->flags & MPP_FLAGS_REG_FD_NO_TRANS)) {
221 ret = jpgdec_process_reg_fd(session, task, msgs);
222 if (ret)
223 goto fail;
224 }
225 task->strm_addr = task->reg[JPGDEC_REG_STREAM_RLC_BASE_INDEX];
226 task->clk_mode = CLK_MODE_NORMAL;
227
228 mpp_debug_leave();
229
230 return mpp_task;
231
232 fail:
233 mpp_task_dump_mem_region(mpp, mpp_task);
234 mpp_task_dump_reg(mpp, mpp_task);
235 mpp_task_finalize(session, mpp_task);
236 kfree(task);
237 return NULL;
238 }
239
jpgdec_soft_reset(struct mpp_dev * mpp)240 static int jpgdec_soft_reset(struct mpp_dev *mpp)
241 {
242 mpp_write(mpp, JPGDEC_REG_SYS_BASE, JPGDEC_FORCE_SOFTRESET_VALID);
243 mpp_write(mpp, JPGDEC_REG_INT_EN_BASE, JPGDEC_SOFT_REST_EN);
244
245 return 0;
246 }
247
jpgdec_run(struct mpp_dev * mpp,struct mpp_task * mpp_task)248 static int jpgdec_run(struct mpp_dev *mpp,
249 struct mpp_task *mpp_task)
250 {
251 u32 i;
252 u32 reg_en;
253 struct jpgdec_task *task = to_jpgdec_task(mpp_task);
254 u32 timing_en = mpp->srv->timing_en;
255
256 mpp_debug_enter();
257
258 /* set registers for hardware */
259 reg_en = mpp_task->hw_info->reg_en;
260 for (i = 0; i < task->w_req_cnt; i++) {
261 struct mpp_request *req = &task->w_reqs[i];
262 int s = req->offset / sizeof(u32);
263 int e = s + req->size / sizeof(u32);
264
265 mpp_write_req(mpp, task->reg, s, e, reg_en);
266 }
267 /* flush tlb before starting hardware */
268 mpp_iommu_flush_tlb(mpp->iommu_info);
269
270 /* init current task */
271 mpp->cur_task = mpp_task;
272
273 mpp_task_run_begin(mpp_task, timing_en, MPP_WORK_TIMEOUT_DELAY);
274
275 /* Flush the register before the start the device */
276 wmb();
277 mpp_write(mpp, JPGDEC_REG_INT_EN_BASE,
278 task->reg[reg_en] | JPGDEC_START_EN);
279
280 mpp_task_run_end(mpp_task, timing_en);
281
282 mpp_debug_leave();
283
284 return 0;
285 }
286
jpgdec_finish(struct mpp_dev * mpp,struct mpp_task * mpp_task)287 static int jpgdec_finish(struct mpp_dev *mpp,
288 struct mpp_task *mpp_task)
289 {
290 u32 i;
291 u32 s, e;
292 u32 dec_get;
293 s32 dec_length;
294 struct mpp_request *req;
295 struct jpgdec_task *task = to_jpgdec_task(mpp_task);
296
297 mpp_debug_enter();
298
299 /* read register after running */
300 for (i = 0; i < task->r_req_cnt; i++) {
301 req = &task->r_reqs[i];
302 s = req->offset / sizeof(u32);
303 e = s + req->size / sizeof(u32);
304 mpp_read_req(mpp, task->reg, s, e);
305 }
306 /* revert hack for irq status */
307 task->reg[JPGDEC_REG_INT_EN_INDEX] = task->irq_status;
308 /* revert hack for decoded length */
309 dec_get = mpp_read_relaxed(mpp, JPGDEC_REG_STREAM_RLC_BASE);
310 dec_length = dec_get - task->strm_addr;
311 task->reg[JPGDEC_REG_STREAM_RLC_BASE_INDEX] = dec_length << 10;
312 /*
313 * If the softrest_rdy bit is low,
314 * it means that the soft-reset of the previous frame
315 * has not been completed.We have to manually trigger to do soft-reset.
316 */
317 if (!(task->irq_status & JPGDEC_SOFT_RSET_READY) &&
318 !atomic_read(&mpp->reset_request))
319 jpgdec_soft_reset(mpp);
320
321 mpp_debug(DEBUG_REGISTER,
322 "dec_get %08x dec_length %d\n", dec_get, dec_length);
323
324 mpp_debug_leave();
325
326 return 0;
327 }
328
jpgdec_result(struct mpp_dev * mpp,struct mpp_task * mpp_task,struct mpp_task_msgs * msgs)329 static int jpgdec_result(struct mpp_dev *mpp,
330 struct mpp_task *mpp_task,
331 struct mpp_task_msgs *msgs)
332 {
333 u32 i;
334 struct mpp_request *req;
335 struct jpgdec_task *task = to_jpgdec_task(mpp_task);
336
337 /* FIXME may overflow the kernel */
338 for (i = 0; i < task->r_req_cnt; i++) {
339 req = &task->r_reqs[i];
340
341 if (copy_to_user(req->data,
342 (u8 *)task->reg + req->offset,
343 req->size)) {
344 mpp_err("copy_to_user reg fail\n");
345 return -EIO;
346 }
347 }
348
349 return 0;
350 }
351
jpgdec_free_task(struct mpp_session * session,struct mpp_task * mpp_task)352 static int jpgdec_free_task(struct mpp_session *session,
353 struct mpp_task *mpp_task)
354 {
355 struct jpgdec_task *task = to_jpgdec_task(mpp_task);
356
357 mpp_task_finalize(session, mpp_task);
358 kfree(task);
359
360 return 0;
361 }
362
363 #ifdef CONFIG_ROCKCHIP_MPP_PROC_FS
jpgdec_procfs_remove(struct mpp_dev * mpp)364 static int jpgdec_procfs_remove(struct mpp_dev *mpp)
365 {
366 struct jpgdec_dev *dec = to_jpgdec_dev(mpp);
367
368 if (dec->procfs) {
369 proc_remove(dec->procfs);
370 dec->procfs = NULL;
371 }
372
373 return 0;
374 }
375
jpgdec_procfs_init(struct mpp_dev * mpp)376 static int jpgdec_procfs_init(struct mpp_dev *mpp)
377 {
378 struct jpgdec_dev *dec = to_jpgdec_dev(mpp);
379
380 dec->procfs = proc_mkdir(mpp->dev->of_node->name, mpp->srv->procfs);
381 if (IS_ERR_OR_NULL(dec->procfs)) {
382 mpp_err("failed on open procfs\n");
383 dec->procfs = NULL;
384 return -EIO;
385 }
386
387 /* for common mpp_dev options */
388 mpp_procfs_create_common(dec->procfs, mpp);
389
390 mpp_procfs_create_u32("aclk", 0644,
391 dec->procfs, &dec->aclk_info.debug_rate_hz);
392 mpp_procfs_create_u32("session_buffers", 0644,
393 dec->procfs, &mpp->session_max_buffers);
394
395 return 0;
396 }
397 #else
jpgdec_procfs_remove(struct mpp_dev * mpp)398 static inline int jpgdec_procfs_remove(struct mpp_dev *mpp)
399 {
400 return 0;
401 }
402
jpgdec_procfs_init(struct mpp_dev * mpp)403 static inline int jpgdec_procfs_init(struct mpp_dev *mpp)
404 {
405 return 0;
406 }
407 #endif
408
jpgdec_init(struct mpp_dev * mpp)409 static int jpgdec_init(struct mpp_dev *mpp)
410 {
411 int ret;
412 struct jpgdec_dev *dec = to_jpgdec_dev(mpp);
413
414 mpp->grf_info = &mpp->srv->grf_infos[MPP_DRIVER_VDPU1];
415
416 /* Get clock info from dtsi */
417 ret = mpp_get_clk_info(mpp, &dec->aclk_info, "aclk_vcodec");
418 if (ret)
419 mpp_err("failed on clk_get aclk_vcodec\n");
420 ret = mpp_get_clk_info(mpp, &dec->hclk_info, "hclk_vcodec");
421 if (ret)
422 mpp_err("failed on clk_get hclk_vcodec\n");
423 /* Set default rates */
424 mpp_set_clk_info_rate_hz(&dec->aclk_info, CLK_MODE_DEFAULT, 300 * MHZ);
425
426 /* Get reset control from dtsi */
427 dec->rst_a = mpp_reset_control_get(mpp, RST_TYPE_A, "video_a");
428 if (!dec->rst_a)
429 mpp_err("No aclk reset resource define\n");
430 dec->rst_h = mpp_reset_control_get(mpp, RST_TYPE_H, "video_h");
431 if (!dec->rst_h)
432 mpp_err("No hclk reset resource define\n");
433
434 return 0;
435 }
436
jpgdec_clk_on(struct mpp_dev * mpp)437 static int jpgdec_clk_on(struct mpp_dev *mpp)
438 {
439 struct jpgdec_dev *dec = to_jpgdec_dev(mpp);
440
441 mpp_clk_safe_enable(dec->aclk_info.clk);
442 mpp_clk_safe_enable(dec->hclk_info.clk);
443
444 return 0;
445 }
446
jpgdec_clk_off(struct mpp_dev * mpp)447 static int jpgdec_clk_off(struct mpp_dev *mpp)
448 {
449 struct jpgdec_dev *dec = to_jpgdec_dev(mpp);
450
451 mpp_clk_safe_disable(dec->aclk_info.clk);
452 mpp_clk_safe_disable(dec->hclk_info.clk);
453
454 return 0;
455 }
456
jpgdec_set_freq(struct mpp_dev * mpp,struct mpp_task * mpp_task)457 static int jpgdec_set_freq(struct mpp_dev *mpp,
458 struct mpp_task *mpp_task)
459 {
460 struct jpgdec_dev *dec = to_jpgdec_dev(mpp);
461 struct jpgdec_task *task = to_jpgdec_task(mpp_task);
462
463 mpp_clk_set_rate(&dec->aclk_info, task->clk_mode);
464
465 return 0;
466 }
467
jpgdec_reduce_freq(struct mpp_dev * mpp)468 static int jpgdec_reduce_freq(struct mpp_dev *mpp)
469 {
470 struct jpgdec_dev *dec = to_jpgdec_dev(mpp);
471
472 mpp_clk_set_rate(&dec->aclk_info, CLK_MODE_REDUCE);
473
474 return 0;
475 }
476
jpgdec_irq(struct mpp_dev * mpp)477 static int jpgdec_irq(struct mpp_dev *mpp)
478 {
479 mpp->irq_status = mpp_read(mpp, JPGDEC_REG_INT_EN_BASE);
480 if (!(mpp->irq_status & JPGDEC_IRQ_RAW))
481 return IRQ_NONE;
482 mpp_write(mpp, JPGDEC_REG_INT_EN_BASE, 0);
483
484 return IRQ_WAKE_THREAD;
485 }
486
jpgdec_isr(struct mpp_dev * mpp)487 static int jpgdec_isr(struct mpp_dev *mpp)
488 {
489 int error_mask;
490 struct jpgdec_task *task = NULL;
491 struct mpp_task *mpp_task = mpp->cur_task;
492
493 /* FIXME use a spin lock here */
494 if (!mpp_task) {
495 dev_err(mpp->dev, "no current task\n");
496 return IRQ_HANDLED;
497 }
498 mpp_time_diff(mpp_task);
499 mpp->cur_task = NULL;
500 task = to_jpgdec_task(mpp_task);
501 task->irq_status = mpp->irq_status;
502 mpp_debug(DEBUG_IRQ_STATUS, "irq_status: %08x\n",
503 task->irq_status);
504
505 error_mask = JPGDEC_BUS_STA | JPGDEC_ERROR_STA |
506 JPGDEC_TIMEOUT_STA | JPGDEC_BUF_EMPTY_STA;
507
508 if (error_mask & task->irq_status)
509 atomic_inc(&mpp->reset_request);
510
511 mpp_task_finish(mpp_task->session, mpp_task);
512
513 mpp_debug_leave();
514
515 return IRQ_HANDLED;
516 }
517
jpgdec_reset(struct mpp_dev * mpp)518 static int jpgdec_reset(struct mpp_dev *mpp)
519 {
520 struct jpgdec_dev *dec = to_jpgdec_dev(mpp);
521
522 if (dec->rst_a && dec->rst_h) {
523 mpp_debug(DEBUG_RESET, "reset in\n");
524
525 /* Don't skip this or iommu won't work after reset */
526 mpp_pmu_idle_request(mpp, true);
527 mpp_safe_reset(dec->rst_a);
528 mpp_safe_reset(dec->rst_h);
529 udelay(5);
530 mpp_safe_unreset(dec->rst_a);
531 mpp_safe_unreset(dec->rst_h);
532 mpp_pmu_idle_request(mpp, false);
533
534 mpp_debug(DEBUG_RESET, "reset out\n");
535 }
536 mpp_write(mpp, JPGDEC_REG_INT_EN_BASE, 0);
537
538 return 0;
539 }
540
541 static struct mpp_hw_ops jpgdec_v1_hw_ops = {
542 .init = jpgdec_init,
543 .clk_on = jpgdec_clk_on,
544 .clk_off = jpgdec_clk_off,
545 .set_freq = jpgdec_set_freq,
546 .reduce_freq = jpgdec_reduce_freq,
547 .reset = jpgdec_reset,
548 };
549
550 static struct mpp_dev_ops jpgdec_v1_dev_ops = {
551 .alloc_task = jpgdec_alloc_task,
552 .run = jpgdec_run,
553 .irq = jpgdec_irq,
554 .isr = jpgdec_isr,
555 .finish = jpgdec_finish,
556 .result = jpgdec_result,
557 .free_task = jpgdec_free_task,
558 };
559
560 static const struct mpp_dev_var jpgdec_v1_data = {
561 .device_type = MPP_DEVICE_RKJPEGD,
562 .hw_info = &jpgdec_v1_hw_info,
563 .trans_info = jpgdec_v1_trans,
564 .hw_ops = &jpgdec_v1_hw_ops,
565 .dev_ops = &jpgdec_v1_dev_ops,
566 };
567
568 static const struct of_device_id mpp_jpgdec_dt_match[] = {
569 {
570 .compatible = "rockchip,rkv-jpeg-decoder-v1",
571 .data = &jpgdec_v1_data,
572 },
573 {},
574 };
575
jpgdec_probe(struct platform_device * pdev)576 static int jpgdec_probe(struct platform_device *pdev)
577 {
578 struct device *dev = &pdev->dev;
579 struct jpgdec_dev *dec = NULL;
580 struct mpp_dev *mpp = NULL;
581 const struct of_device_id *match = NULL;
582 int ret = 0;
583
584 dev_info(dev, "probe device\n");
585 dec = devm_kzalloc(dev, sizeof(struct jpgdec_dev), GFP_KERNEL);
586 if (!dec)
587 return -ENOMEM;
588 mpp = &dec->mpp;
589 platform_set_drvdata(pdev, mpp);
590
591 if (pdev->dev.of_node) {
592 match = of_match_node(mpp_jpgdec_dt_match, pdev->dev.of_node);
593 if (match)
594 mpp->var = (struct mpp_dev_var *)match->data;
595 }
596
597 ret = mpp_dev_probe(mpp, pdev);
598 if (ret) {
599 dev_err(dev, "probe sub driver failed\n");
600 return -EINVAL;
601 }
602
603 ret = devm_request_threaded_irq(dev, mpp->irq,
604 mpp_dev_irq,
605 mpp_dev_isr_sched,
606 IRQF_SHARED,
607 dev_name(dev), mpp);
608 if (ret) {
609 dev_err(dev, "register interrupter runtime failed\n");
610 return -EINVAL;
611 }
612
613 mpp->session_max_buffers = JPGDEC_SESSION_MAX_BUFFERS;
614 jpgdec_procfs_init(mpp);
615 /* register current device to mpp service */
616 mpp_dev_register_srv(mpp, mpp->srv);
617 dev_info(dev, "probing finish\n");
618
619 return 0;
620 }
621
jpgdec_remove(struct platform_device * pdev)622 static int jpgdec_remove(struct platform_device *pdev)
623 {
624 struct device *dev = &pdev->dev;
625 struct mpp_dev *mpp = dev_get_drvdata(dev);
626
627 dev_info(dev, "remove device\n");
628 mpp_dev_remove(mpp);
629 jpgdec_procfs_remove(mpp);
630
631 return 0;
632 }
633
634 struct platform_driver rockchip_jpgdec_driver = {
635 .probe = jpgdec_probe,
636 .remove = jpgdec_remove,
637 .shutdown = mpp_dev_shutdown,
638 .driver = {
639 .name = JPGDEC_DRIVER_NAME,
640 .of_match_table = of_match_ptr(mpp_jpgdec_dt_match),
641 },
642 };
643 EXPORT_SYMBOL(rockchip_jpgdec_driver);
644