1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) Rockchip Electronics Co.Ltd 4 * Author: Felix Zeng <felix.zeng@rock-chips.com> 5 */ 6 7 #ifndef __LINUX_RKNPU_IOCTL_H 8 #define __LINUX_RKNPU_IOCTL_H 9 10 #include <linux/ioctl.h> 11 #include <linux/types.h> 12 13 #if !defined(__KERNEL__) 14 #define __user 15 #endif 16 17 #ifndef __packed 18 #define __packed __attribute__((packed)) 19 #endif 20 21 #define RKNPU_OFFSET_VERSION 0x0 22 #define RKNPU_OFFSET_VERSION_NUM 0x4 23 #define RKNPU_OFFSET_PC_OP_EN 0x8 24 #define RKNPU_OFFSET_PC_DATA_ADDR 0x10 25 #define RKNPU_OFFSET_PC_DATA_AMOUNT 0x14 26 #define RKNPU_OFFSET_PC_TASK_CONTROL 0x30 27 #define RKNPU_OFFSET_PC_DMA_BASE_ADDR 0x34 28 29 #define RKNPU_OFFSET_INT_MASK 0x20 30 #define RKNPU_OFFSET_INT_CLEAR 0x24 31 #define RKNPU_OFFSET_INT_STATUS 0x28 32 #define RKNPU_OFFSET_INT_RAW_STATUS 0x2c 33 34 #define RKNPU_OFFSET_CLR_ALL_RW_AMOUNT 0x8010 35 #define RKNPU_OFFSET_DT_WR_AMOUNT 0x8034 36 #define RKNPU_OFFSET_DT_RD_AMOUNT 0x8038 37 #define RKNPU_OFFSET_WT_RD_AMOUNT 0x803c 38 39 #define RKNPU_OFFSET_ENABLE_MASK 0xf008 40 41 #define RKNPU_INT_CLEAR 0x1ffff 42 43 #define RKNPU_PC_DATA_EXTRA_AMOUNT 4 44 45 #define RKNPU_STR_HELPER(x) #x 46 47 #define RKNPU_GET_DRV_VERSION_STRING(MAJOR, MINOR, PATCHLEVEL) \ 48 RKNPU_STR_HELPER(MAJOR) \ 49 "." RKNPU_STR_HELPER(MINOR) "." RKNPU_STR_HELPER(PATCHLEVEL) 50 #define RKNPU_GET_DRV_VERSION_CODE(MAJOR, MINOR, PATCHLEVEL) \ 51 (MAJOR * 10000 + MINOR * 100 + PATCHLEVEL) 52 #define RKNPU_GET_DRV_VERSION_MAJOR(CODE) (CODE / 10000) 53 #define RKNPU_GET_DRV_VERSION_MINOR(CODE) ((CODE % 10000) / 100) 54 #define RKNPU_GET_DRV_VERSION_PATCHLEVEL(CODE) (CODE % 100) 55 56 /* memory type definitions. */ 57 enum e_rknpu_mem_type { 58 /* physically continuous memory and used as default. */ 59 RKNPU_MEM_CONTIGUOUS = 0 << 0, 60 /* physically non-continuous memory. */ 61 RKNPU_MEM_NON_CONTIGUOUS = 1 << 0, 62 /* non-cacheable mapping and used as default. */ 63 RKNPU_MEM_NON_CACHEABLE = 0 << 1, 64 /* cacheable mapping. */ 65 RKNPU_MEM_CACHEABLE = 1 << 1, 66 /* write-combine mapping. */ 67 RKNPU_MEM_WRITE_COMBINE = 1 << 2, 68 /* dma attr kernel mapping */ 69 RKNPU_MEM_KERNEL_MAPPING = 1 << 3, 70 /* iommu mapping */ 71 RKNPU_MEM_IOMMU = 1 << 4, 72 /* zero mapping */ 73 RKNPU_MEM_ZEROING = 1 << 5, 74 /* allocate secure buffer */ 75 RKNPU_MEM_SECURE = 1 << 6, 76 /* allocate from dma32 zone */ 77 RKNPU_MEM_DMA32 = 1 << 7, 78 /* request SRAM */ 79 RKNPU_MEM_TRY_ALLOC_SRAM = 1 << 8, 80 /* request NBUF */ 81 RKNPU_MEM_TRY_ALLOC_NBUF = 1 << 9, 82 RKNPU_MEM_MASK = RKNPU_MEM_NON_CONTIGUOUS | RKNPU_MEM_CACHEABLE | 83 RKNPU_MEM_WRITE_COMBINE | RKNPU_MEM_KERNEL_MAPPING | 84 RKNPU_MEM_IOMMU | RKNPU_MEM_ZEROING | 85 RKNPU_MEM_SECURE | RKNPU_MEM_DMA32 | 86 RKNPU_MEM_TRY_ALLOC_SRAM | RKNPU_MEM_TRY_ALLOC_NBUF 87 }; 88 89 /* sync mode definitions. */ 90 enum e_rknpu_mem_sync_mode { 91 RKNPU_MEM_SYNC_TO_DEVICE = 1 << 0, 92 RKNPU_MEM_SYNC_FROM_DEVICE = 1 << 1, 93 RKNPU_MEM_SYNC_MASK = 94 RKNPU_MEM_SYNC_TO_DEVICE | RKNPU_MEM_SYNC_FROM_DEVICE 95 }; 96 97 /* job mode definitions. */ 98 enum e_rknpu_job_mode { 99 RKNPU_JOB_SLAVE = 0 << 0, 100 RKNPU_JOB_PC = 1 << 0, 101 RKNPU_JOB_BLOCK = 0 << 1, 102 RKNPU_JOB_NONBLOCK = 1 << 1, 103 RKNPU_JOB_PINGPONG = 1 << 2, 104 RKNPU_JOB_FENCE_IN = 1 << 3, 105 RKNPU_JOB_FENCE_OUT = 1 << 4, 106 RKNPU_JOB_MASK = RKNPU_JOB_PC | RKNPU_JOB_NONBLOCK | 107 RKNPU_JOB_PINGPONG | RKNPU_JOB_FENCE_IN | 108 RKNPU_JOB_FENCE_OUT 109 }; 110 111 /* action definitions */ 112 enum e_rknpu_action { 113 RKNPU_GET_HW_VERSION = 0, 114 RKNPU_GET_DRV_VERSION = 1, 115 RKNPU_GET_FREQ = 2, 116 RKNPU_SET_FREQ = 3, 117 RKNPU_GET_VOLT = 4, 118 RKNPU_SET_VOLT = 5, 119 RKNPU_ACT_RESET = 6, 120 RKNPU_GET_BW_PRIORITY = 7, 121 RKNPU_SET_BW_PRIORITY = 8, 122 RKNPU_GET_BW_EXPECT = 9, 123 RKNPU_SET_BW_EXPECT = 10, 124 RKNPU_GET_BW_TW = 11, 125 RKNPU_SET_BW_TW = 12, 126 RKNPU_ACT_CLR_TOTAL_RW_AMOUNT = 13, 127 RKNPU_GET_DT_WR_AMOUNT = 14, 128 RKNPU_GET_DT_RD_AMOUNT = 15, 129 RKNPU_GET_WT_RD_AMOUNT = 16, 130 RKNPU_GET_TOTAL_RW_AMOUNT = 17, 131 RKNPU_GET_IOMMU_EN = 18, 132 RKNPU_SET_PROC_NICE = 19, 133 RKNPU_POWER_ON = 20, 134 RKNPU_POWER_OFF = 21, 135 RKNPU_GET_TOTAL_SRAM_SIZE = 22, 136 RKNPU_GET_FREE_SRAM_SIZE = 23, 137 }; 138 139 /** 140 * User-desired buffer creation information structure. 141 * 142 * @handle: The handle of the created GEM object. 143 * @flags: user request for setting memory type or cache attributes. 144 * @size: user-desired memory allocation size. 145 * - this size value would be page-aligned internally. 146 * @obj_addr: address of RKNPU memory object. 147 * @dma_addr: dma address that access by rknpu. 148 * @sram_size: user-desired sram memory allocation size. 149 * - this size value would be page-aligned internally. 150 */ 151 struct rknpu_mem_create { 152 __u32 handle; 153 __u32 flags; 154 __u64 size; 155 __u64 obj_addr; 156 __u64 dma_addr; 157 __u64 sram_size; 158 }; 159 160 /** 161 * A structure for getting a fake-offset that can be used with mmap. 162 * 163 * @handle: handle of gem object. 164 * @reserved: just padding to be 64-bit aligned. 165 * @offset: a fake-offset of gem object. 166 */ 167 struct rknpu_mem_map { 168 __u32 handle; 169 __u32 reserved; 170 __u64 offset; 171 }; 172 173 /** 174 * For destroying DMA buffer 175 * 176 * @handle: handle of the buffer. 177 * @reserved: reserved for padding. 178 * @obj_addr: rknpu_mem_object addr. 179 */ 180 struct rknpu_mem_destroy { 181 __u32 handle; 182 __u32 reserved; 183 __u64 obj_addr; 184 }; 185 186 /** 187 * For synchronizing DMA buffer 188 * 189 * @flags: user request for setting memory type or cache attributes. 190 * @reserved: reserved for padding. 191 * @obj_addr: address of RKNPU memory object. 192 * @offset: offset in bytes from start address of buffer. 193 * @size: size of memory region. 194 * 195 */ 196 struct rknpu_mem_sync { 197 __u32 flags; 198 __u32 reserved; 199 __u64 obj_addr; 200 __u64 offset; 201 __u64 size; 202 }; 203 204 /** 205 * struct rknpu_task structure for task information 206 * 207 * @flags: flags for task 208 * @op_idx: operator index 209 * @enable_mask: enable mask 210 * @int_mask: interrupt mask 211 * @int_clear: interrupt clear 212 * @int_status: interrupt status 213 * @regcfg_amount: register config number 214 * @regcfg_offset: offset for register config 215 * @regcmd_addr: address for register command 216 * 217 */ 218 struct rknpu_task { 219 __u32 flags; 220 __u32 op_idx; 221 __u32 enable_mask; 222 __u32 int_mask; 223 __u32 int_clear; 224 __u32 int_status; 225 __u32 regcfg_amount; 226 __u32 regcfg_offset; 227 __u64 regcmd_addr; 228 } __packed; 229 230 /** 231 * struct rknpu_subcore_task structure for subcore task index 232 * 233 * @task_start: task start index 234 * @task_number: task number 235 * 236 */ 237 struct rknpu_subcore_task { 238 __u32 task_start; 239 __u32 task_number; 240 }; 241 242 /** 243 * struct rknpu_submit structure for job submit 244 * 245 * @flags: flags for job submit 246 * @timeout: submit timeout 247 * @task_start: task start index 248 * @task_number: task number 249 * @task_counter: task counter 250 * @priority: submit priority 251 * @task_obj_addr: address of task object 252 * @regcfg_obj_addr: address of register config object 253 * @task_base_addr: task base address 254 * @user_data: (optional) user data 255 * @core_mask: core mask of rknpu 256 * @fence_fd: dma fence fd 257 * @subcore_task: subcore task 258 * 259 */ 260 struct rknpu_submit { 261 __u32 flags; 262 __u32 timeout; 263 __u32 task_start; 264 __u32 task_number; 265 __u32 task_counter; 266 __s32 priority; 267 __u64 task_obj_addr; 268 __u64 regcfg_obj_addr; 269 __u64 task_base_addr; 270 __u64 user_data; 271 __u32 core_mask; 272 __s32 fence_fd; 273 struct rknpu_subcore_task subcore_task[5]; 274 }; 275 276 /** 277 * struct rknpu_task structure for action (GET, SET or ACT) 278 * 279 * @flags: flags for action 280 * @value: GET or SET value 281 * 282 */ 283 struct rknpu_action { 284 __u32 flags; 285 __u32 value; 286 }; 287 288 #define RKNPU_ACTION 0x00 289 #define RKNPU_SUBMIT 0x01 290 #define RKNPU_MEM_CREATE 0x02 291 #define RKNPU_MEM_MAP 0x03 292 #define RKNPU_MEM_DESTROY 0x04 293 #define RKNPU_MEM_SYNC 0x05 294 295 #define RKNPU_IOC_MAGIC 'r' 296 #define RKNPU_IOW(nr, type) _IOW(RKNPU_IOC_MAGIC, nr, type) 297 #define RKNPU_IOR(nr, type) _IOR(RKNPU_IOC_MAGIC, nr, type) 298 #define RKNPU_IOWR(nr, type) _IOWR(RKNPU_IOC_MAGIC, nr, type) 299 300 #include <drm/drm.h> 301 302 #define DRM_IOCTL_RKNPU_ACTION \ 303 DRM_IOWR(DRM_COMMAND_BASE + RKNPU_ACTION, struct rknpu_action) 304 #define DRM_IOCTL_RKNPU_SUBMIT \ 305 DRM_IOWR(DRM_COMMAND_BASE + RKNPU_SUBMIT, struct rknpu_submit) 306 #define DRM_IOCTL_RKNPU_MEM_CREATE \ 307 DRM_IOWR(DRM_COMMAND_BASE + RKNPU_MEM_CREATE, struct rknpu_mem_create) 308 #define DRM_IOCTL_RKNPU_MEM_MAP \ 309 DRM_IOWR(DRM_COMMAND_BASE + RKNPU_MEM_MAP, struct rknpu_mem_map) 310 #define DRM_IOCTL_RKNPU_MEM_DESTROY \ 311 DRM_IOWR(DRM_COMMAND_BASE + RKNPU_MEM_DESTROY, struct rknpu_mem_destroy) 312 #define DRM_IOCTL_RKNPU_MEM_SYNC \ 313 DRM_IOWR(DRM_COMMAND_BASE + RKNPU_MEM_SYNC, struct rknpu_mem_sync) 314 315 #define IOCTL_RKNPU_ACTION RKNPU_IOWR(RKNPU_ACTION, struct rknpu_action) 316 #define IOCTL_RKNPU_SUBMIT RKNPU_IOWR(RKNPU_SUBMIT, struct rknpu_submit) 317 #define IOCTL_RKNPU_MEM_CREATE \ 318 RKNPU_IOWR(RKNPU_MEM_CREATE, struct rknpu_mem_create) 319 #define IOCTL_RKNPU_MEM_MAP RKNPU_IOWR(RKNPU_MEM_MAP, struct rknpu_mem_map) 320 #define IOCTL_RKNPU_MEM_DESTROY \ 321 RKNPU_IOWR(RKNPU_MEM_DESTROY, struct rknpu_mem_destroy) 322 #define IOCTL_RKNPU_MEM_SYNC RKNPU_IOWR(RKNPU_MEM_SYNC, struct rknpu_mem_sync) 323 324 #endif 325