1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Pinctrl driver for Rockchip RK805 PMIC
4 *
5 * Copyright (c) 2017, Fuzhou Rockchip Electronics Co., Ltd
6 *
7 * Author: Joseph Chen <chenjh@rock-chips.com>
8 *
9 * Based on the pinctrl-as3722 driver
10 */
11
12 #include <linux/gpio/driver.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/mfd/rk808.h>
16 #include <linux/of.h>
17 #include <linux/of_device.h>
18 #include <linux/platform_device.h>
19 #include <linux/pinctrl/consumer.h>
20 #include <linux/pinctrl/machine.h>
21 #include <linux/pinctrl/pinctrl.h>
22 #include <linux/pinctrl/pinconf-generic.h>
23 #include <linux/pinctrl/pinconf.h>
24 #include <linux/pinctrl/pinmux.h>
25 #include <linux/pm.h>
26 #include <linux/slab.h>
27
28 #include "core.h"
29 #include "pinconf.h"
30 #include "pinctrl-utils.h"
31
32 struct rk805_pin_function {
33 const char *name;
34 const char *const *groups;
35 unsigned int ngroups;
36 int mux_option;
37 };
38
39 struct rk805_pin_group {
40 const char *name;
41 const unsigned int pins[1];
42 unsigned int npins;
43 };
44
45 /*
46 * @reg: gpio setting register;
47 * @fun_mask: functions select mask value, when set is gpio;
48 * @dir_mask: input or output mask value, when set is output, otherwise input;
49 * @val_mask: gpio set value, when set is level high, otherwise low;
50 *
51 * Different PMIC has different pin features, belowing 3 mask members are not
52 * all necessary for every PMIC. For example, RK805 has 2 pins that can be used
53 * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1
54 * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
55 * necessary.
56 */
57 struct rk805_pin_config {
58 u8 reg;
59 u8 fun_msk;
60 u8 dir_msk;
61 u8 val_msk;
62 };
63
64 struct rk805_pctrl_info {
65 struct rk808 *rk808;
66 struct device *dev;
67 struct pinctrl_dev *pctl;
68 struct gpio_chip gpio_chip;
69 struct pinctrl_desc pinctrl_desc;
70 const struct rk805_pin_function *functions;
71 unsigned int num_functions;
72 const struct rk805_pin_group *groups;
73 int num_pin_groups;
74 const struct pinctrl_pin_desc *pins;
75 unsigned int num_pins;
76 const struct rk805_pin_config *pin_cfg;
77 };
78
79 enum rk805_pinmux_option {
80 RK805_PINMUX_GPIO,
81 RK805_PINMUX_TS,
82 };
83
84 enum {
85 RK805_GPIO0,
86 RK805_GPIO1,
87 };
88
89 static const char *const rk805_gpio_groups[] = {
90 "gpio0",
91 "gpio1",
92 };
93
94 /* RK805: 2 output only GPIOs */
95 static const struct pinctrl_pin_desc rk805_pins_desc[] = {
96 PINCTRL_PIN(RK805_GPIO0, "gpio0"),
97 PINCTRL_PIN(RK805_GPIO1, "gpio1"),
98 };
99
100 static const struct rk805_pin_function rk805_pin_functions[] = {
101 {
102 .name = "gpio",
103 .groups = rk805_gpio_groups,
104 .ngroups = ARRAY_SIZE(rk805_gpio_groups),
105 .mux_option = RK805_PINMUX_GPIO,
106 },
107 };
108
109 static const struct rk805_pin_group rk805_pin_groups[] = {
110 {
111 .name = "gpio0",
112 .pins = { RK805_GPIO0 },
113 .npins = 1,
114 },
115 {
116 .name = "gpio1",
117 .pins = { RK805_GPIO1 },
118 .npins = 1,
119 },
120 };
121
122 #define RK805_GPIO0_VAL_MSK BIT(0)
123 #define RK805_GPIO1_VAL_MSK BIT(1)
124
125 static const struct rk805_pin_config rk805_gpio_cfgs[] = {
126 {
127 .reg = RK805_OUT_REG,
128 .val_msk = RK805_GPIO0_VAL_MSK,
129 },
130 {
131 .reg = RK805_OUT_REG,
132 .val_msk = RK805_GPIO1_VAL_MSK,
133 },
134 };
135
136 #define RK816_FUN_MASK BIT(2)
137 #define RK816_VAL_MASK BIT(3)
138 #define RK816_DIR_MASK BIT(4)
139
140 enum {
141 RK816_GPIO0,
142 };
143
144 /* RK816: gpio/ts */
145 static const char *const rk816_gpio_groups[] = {
146 "gpio0",
147 };
148
149 static const struct pinctrl_pin_desc rk816_pins_desc[] = {
150 PINCTRL_PIN(RK816_GPIO0, "gpio0"),
151 };
152
153 static const struct rk805_pin_function rk816_pin_functions[] = {
154 {
155 .name = "gpio",
156 .groups = rk816_gpio_groups,
157 .ngroups = ARRAY_SIZE(rk816_gpio_groups),
158 .mux_option = RK805_PINMUX_GPIO,
159 },
160 {
161 .name = "ts",
162 .groups = rk816_gpio_groups,
163 .ngroups = ARRAY_SIZE(rk816_gpio_groups),
164 .mux_option = RK805_PINMUX_TS,
165 },
166 };
167
168 static const struct rk805_pin_group rk816_pin_groups[] = {
169 {
170 .name = "gpio0",
171 .pins = { RK816_GPIO0 },
172 .npins = 1,
173 },
174 };
175
176 static struct rk805_pin_config rk816_gpio_cfgs[] = {
177 {
178 .reg = RK816_GPIO_IO_POL_REG,
179 .val_msk = RK816_VAL_MASK,
180 .fun_msk = RK816_FUN_MASK,
181 .dir_msk = RK816_DIR_MASK,
182 },
183 };
184
185 enum rk817_pinmux_option {
186 RK817_PINMUX_FUN0 = 0,
187 RK817_PINMUX_FUN1,
188 RK817_PINMUX_FUN2,
189 RK817_PINMUX_FUN3
190 };
191
192 enum {
193 RK817_GPIO_SLP,
194 RK817_GPIO_TS,
195 RK817_GPIO_GT
196 };
197
198 /* for rk809 only a sleep pin */
199 static const char *const rk817_gpio_groups[] = {
200 "gpio_slp",
201 "gpio_ts",
202 "gpio_gt",
203 };
204
205 static const struct pinctrl_pin_desc rk817_pins_desc[] = {
206 PINCTRL_PIN(RK817_GPIO_SLP, "gpio_slp"), /* sleep pin */
207 PINCTRL_PIN(RK817_GPIO_TS, "gpio_ts"), /* ts pin */
208 PINCTRL_PIN(RK817_GPIO_GT, "gpio_gt")/* gate pin */
209 };
210
211 static const struct rk805_pin_function rk817_pin_functions[] = {
212 {
213 .name = "pin_fun0",
214 .groups = rk817_gpio_groups,
215 .ngroups = ARRAY_SIZE(rk817_gpio_groups),
216 .mux_option = RK817_PINMUX_FUN0,
217 },
218 {
219 .name = "pin_fun1",
220 .groups = rk817_gpio_groups,
221 .ngroups = ARRAY_SIZE(rk817_gpio_groups),
222 .mux_option = RK817_PINMUX_FUN1,
223 },
224 {
225 .name = "pin_fun2",
226 .groups = rk817_gpio_groups,
227 .ngroups = ARRAY_SIZE(rk817_gpio_groups),
228 .mux_option = RK817_PINMUX_FUN2,
229 },
230 {
231 .name = "pin_fun3",
232 .groups = rk817_gpio_groups,
233 .ngroups = ARRAY_SIZE(rk817_gpio_groups),
234 .mux_option = RK817_PINMUX_FUN3,
235 },
236 };
237
238 /* for rk809 only a sleep pin */
239 static const struct rk805_pin_group rk817_pin_groups[] = {
240 {
241 .name = "gpio_slp",
242 .pins = { RK817_GPIO_SLP },
243 .npins = 1,
244 },
245 {
246 .name = "gpio_ts",
247 .pins = { RK817_GPIO_TS },
248 .npins = 1,
249 },
250 {
251 .name = "gpio_gt",
252 .pins = { RK817_GPIO_GT },
253 .npins = 1,
254 }
255 };
256
257 #define RK817_GPIOTS_VAL_MSK BIT(3)
258 #define RK817_GPIOGT_VAL_MSK BIT(6)
259 #define RK817_GPIOTS_FUNC_MSK BIT(2)
260 #define RK817_GPIOGT_FUNC_MSK BIT(5)
261 #define RK817_GPIOTS_DIR_MSK BIT(4)
262 #define RK817_GPIOGT_DIR_MSK BIT(7)
263
264 static struct rk805_pin_config rk817_gpio_cfgs[] = {
265 {
266 .reg = RK817_SYS_CFG(3),
267 .val_msk = 0,
268 .fun_msk = RK817_SLPPIN_FUNC_MSK,
269 .dir_msk = 0
270 },
271 {
272 .reg = RK817_GPIO_INT_CFG,
273 .val_msk = RK817_GPIOTS_VAL_MSK,
274 .fun_msk = RK817_GPIOTS_FUNC_MSK,
275 .dir_msk = RK817_GPIOTS_DIR_MSK
276 },
277 {
278 .reg = RK817_GPIO_INT_CFG,
279 .val_msk = RK817_GPIOGT_VAL_MSK,
280 .fun_msk = RK817_GPIOGT_FUNC_MSK,
281 .dir_msk = RK817_GPIOGT_DIR_MSK
282 }
283 };
284
285 /* generic gpio chip */
rk805_gpio_get(struct gpio_chip * chip,unsigned int offset)286 static int rk805_gpio_get(struct gpio_chip *chip, unsigned int offset)
287 {
288 struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
289 int ret, val;
290
291 if (!pci->pin_cfg[offset].val_msk) {
292 dev_dbg(pci->dev, "getting gpio%d value is not support\n",
293 offset);
294 return -1;
295 }
296
297 ret = regmap_read(pci->rk808->regmap, pci->pin_cfg[offset].reg, &val);
298 if (ret) {
299 dev_err(pci->dev, "get gpio%d value failed\n", offset);
300 return ret;
301 }
302
303 return !!(val & pci->pin_cfg[offset].val_msk);
304 }
305
rk805_gpio_set(struct gpio_chip * chip,unsigned int offset,int value)306 static void rk805_gpio_set(struct gpio_chip *chip,
307 unsigned int offset,
308 int value)
309 {
310 struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
311 int ret;
312
313 if (!pci->pin_cfg[offset].val_msk)
314 return;
315
316 ret = regmap_update_bits(pci->rk808->regmap,
317 pci->pin_cfg[offset].reg,
318 pci->pin_cfg[offset].val_msk,
319 value ? pci->pin_cfg[offset].val_msk : 0);
320 if (ret)
321 dev_err(pci->dev, "set gpio%d value %d failed\n",
322 offset, value);
323 }
324
rk805_gpio_direction_input(struct gpio_chip * chip,unsigned int offset)325 static int rk805_gpio_direction_input(struct gpio_chip *chip,
326 unsigned int offset)
327 {
328 return pinctrl_gpio_direction_input(chip->base + offset);
329 }
330
rk805_gpio_direction_output(struct gpio_chip * chip,unsigned int offset,int value)331 static int rk805_gpio_direction_output(struct gpio_chip *chip,
332 unsigned int offset, int value)
333 {
334 rk805_gpio_set(chip, offset, value);
335 return pinctrl_gpio_direction_output(chip->base + offset);
336 }
337
rk805_gpio_get_direction(struct gpio_chip * chip,unsigned int offset)338 static int rk805_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
339 {
340 struct rk805_pctrl_info *pci = gpiochip_get_data(chip);
341 unsigned int val;
342 int ret;
343
344 /* default output*/
345 if (!pci->pin_cfg[offset].dir_msk)
346 return GPIO_LINE_DIRECTION_OUT;
347
348 ret = regmap_read(pci->rk808->regmap,
349 pci->pin_cfg[offset].reg,
350 &val);
351 if (ret) {
352 dev_err(pci->dev, "get gpio%d direction failed\n", offset);
353 return ret;
354 }
355
356 if (val & pci->pin_cfg[offset].dir_msk)
357 return GPIO_LINE_DIRECTION_OUT;
358
359 return GPIO_LINE_DIRECTION_IN;
360 }
361
362 static const struct gpio_chip rk805_gpio_chip = {
363 .label = "rk805-gpio",
364 .request = gpiochip_generic_request,
365 .free = gpiochip_generic_free,
366 .get_direction = rk805_gpio_get_direction,
367 .get = rk805_gpio_get,
368 .set = rk805_gpio_set,
369 .direction_input = rk805_gpio_direction_input,
370 .direction_output = rk805_gpio_direction_output,
371 .can_sleep = true,
372 .base = -1,
373 .owner = THIS_MODULE,
374 };
375
376 static struct gpio_chip rk816_gpio_chip = {
377 .label = "rk816-gpio",
378 .request = gpiochip_generic_request,
379 .free = gpiochip_generic_free,
380 .get_direction = rk805_gpio_get_direction,
381 .get = rk805_gpio_get,
382 .set = rk805_gpio_set,
383 .direction_input = rk805_gpio_direction_input,
384 .direction_output = rk805_gpio_direction_output,
385 .can_sleep = true,
386 .base = -1,
387 .owner = THIS_MODULE,
388 };
389
390 static struct gpio_chip rk817_gpio_chip = {
391 .label = "rk817-gpio",
392 .request = gpiochip_generic_request,
393 .free = gpiochip_generic_free,
394 .get_direction = rk805_gpio_get_direction,
395 .get = rk805_gpio_get,
396 .set = rk805_gpio_set,
397 .direction_input = rk805_gpio_direction_input,
398 .direction_output = rk805_gpio_direction_output,
399 .can_sleep = true,
400 .base = -1,
401 .owner = THIS_MODULE,
402 };
403
404 /* generic pinctrl */
rk805_pinctrl_get_groups_count(struct pinctrl_dev * pctldev)405 static int rk805_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
406 {
407 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
408
409 return pci->num_pin_groups;
410 }
411
rk805_pinctrl_get_group_name(struct pinctrl_dev * pctldev,unsigned int group)412 static const char *rk805_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
413 unsigned int group)
414 {
415 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
416
417 return pci->groups[group].name;
418 }
419
rk805_pinctrl_get_group_pins(struct pinctrl_dev * pctldev,unsigned int group,const unsigned int ** pins,unsigned int * num_pins)420 static int rk805_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
421 unsigned int group,
422 const unsigned int **pins,
423 unsigned int *num_pins)
424 {
425 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
426
427 *pins = pci->groups[group].pins;
428 *num_pins = pci->groups[group].npins;
429
430 return 0;
431 }
432
433 static const struct pinctrl_ops rk805_pinctrl_ops = {
434 .get_groups_count = rk805_pinctrl_get_groups_count,
435 .get_group_name = rk805_pinctrl_get_group_name,
436 .get_group_pins = rk805_pinctrl_get_group_pins,
437 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
438 .dt_free_map = pinctrl_utils_free_map,
439 };
440
rk805_pinctrl_get_funcs_count(struct pinctrl_dev * pctldev)441 static int rk805_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
442 {
443 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
444
445 return pci->num_functions;
446 }
447
rk805_pinctrl_get_func_name(struct pinctrl_dev * pctldev,unsigned int function)448 static const char *rk805_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
449 unsigned int function)
450 {
451 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
452
453 return pci->functions[function].name;
454 }
455
rk805_pinctrl_get_func_groups(struct pinctrl_dev * pctldev,unsigned int function,const char * const ** groups,unsigned int * const num_groups)456 static int rk805_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
457 unsigned int function,
458 const char *const **groups,
459 unsigned int *const num_groups)
460 {
461 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
462
463 *groups = pci->functions[function].groups;
464 *num_groups = pci->functions[function].ngroups;
465
466 return 0;
467 }
468
_rk805_pinctrl_set_mux(struct pinctrl_dev * pctldev,unsigned int offset,int mux)469 static int _rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
470 unsigned int offset,
471 int mux)
472 {
473 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
474 int ret;
475
476 if (!pci->pin_cfg[offset].fun_msk)
477 return 0;
478
479 if (mux == RK805_PINMUX_GPIO) {
480 ret = regmap_update_bits(pci->rk808->regmap,
481 pci->pin_cfg[offset].reg,
482 pci->pin_cfg[offset].fun_msk,
483 pci->pin_cfg[offset].fun_msk);
484 if (ret) {
485 dev_err(pci->dev, "set gpio%d GPIO failed\n", offset);
486 return ret;
487 }
488 } else if (mux == RK805_PINMUX_TS) {
489 ret = regmap_update_bits(pci->rk808->regmap,
490 pci->pin_cfg[offset].reg,
491 pci->pin_cfg[offset].fun_msk,
492 0);
493 if (ret) {
494 dev_err(pci->dev, "set gpio%d TS failed\n", offset);
495 return ret;
496 }
497 } else {
498 dev_err(pci->dev, "Couldn't find function mux %d\n", mux);
499 return -EINVAL;
500 }
501
502 return 0;
503 }
504
_rk817_pinctrl_set_mux(struct pinctrl_dev * pctldev,unsigned int offset,int mux)505 static int _rk817_pinctrl_set_mux(struct pinctrl_dev *pctldev,
506 unsigned int offset,
507 int mux)
508 {
509 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
510 int ret;
511
512 if (!pci->pin_cfg[offset].fun_msk)
513 return 0;
514
515 mux <<= ffs(pci->pin_cfg[offset].fun_msk) - 1;
516 ret = regmap_update_bits(pci->rk808->regmap,
517 pci->pin_cfg[offset].reg,
518 pci->pin_cfg[offset].fun_msk, mux);
519
520 if (ret)
521 dev_err(pci->dev, "set gpio%d func%d failed\n", offset, mux);
522
523 return ret;
524 }
525
rk805_pinctrl_set_mux(struct pinctrl_dev * pctldev,unsigned int function,unsigned int group)526 static int rk805_pinctrl_set_mux(struct pinctrl_dev *pctldev,
527 unsigned int function,
528 unsigned int group)
529 {
530 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
531 int mux = pci->functions[function].mux_option;
532 int offset = group;
533
534 switch (pci->rk808->variant) {
535 case RK805_ID:
536 case RK816_ID:
537 return _rk805_pinctrl_set_mux(pctldev, offset, mux);
538
539 case RK809_ID:
540 case RK817_ID:
541 return _rk817_pinctrl_set_mux(pctldev, offset, mux);
542 default:
543 dev_err(pci->dev, "Couldn't find the variant id\n");
544 return -EINVAL;
545 }
546 }
547
rk805_pmx_gpio_set_direction(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned int offset,bool input)548 static int rk805_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
549 struct pinctrl_gpio_range *range,
550 unsigned int offset, bool input)
551 {
552 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
553 int ret;
554
555 /* set direction */
556 if (!pci->pin_cfg[offset].dir_msk)
557 return 0;
558
559 ret = regmap_update_bits(pci->rk808->regmap,
560 pci->pin_cfg[offset].reg,
561 pci->pin_cfg[offset].dir_msk,
562 input ? 0 : pci->pin_cfg[offset].dir_msk);
563 if (ret) {
564 dev_err(pci->dev, "set gpio%d direction failed\n", offset);
565 return ret;
566 }
567
568 return ret;
569 }
570
rk805_pinctrl_gpio_request_enable(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned int offset)571 static int rk805_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
572 struct pinctrl_gpio_range *range,
573 unsigned int offset)
574 {
575 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
576
577 /* switch to gpio function */
578 switch (pci->rk808->variant) {
579 case RK805_ID:
580 case RK816_ID:
581 return _rk805_pinctrl_set_mux(pctldev, offset,
582 RK805_PINMUX_GPIO);
583 default:
584 return 0;
585 }
586 }
587
588 static const struct pinmux_ops rk805_pinmux_ops = {
589 .gpio_request_enable = rk805_pinctrl_gpio_request_enable,
590 .get_functions_count = rk805_pinctrl_get_funcs_count,
591 .get_function_name = rk805_pinctrl_get_func_name,
592 .get_function_groups = rk805_pinctrl_get_func_groups,
593 .set_mux = rk805_pinctrl_set_mux,
594 .gpio_set_direction = rk805_pmx_gpio_set_direction,
595 };
596
rk805_pinconf_get(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * config)597 static int rk805_pinconf_get(struct pinctrl_dev *pctldev,
598 unsigned int pin, unsigned long *config)
599 {
600 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
601 enum pin_config_param param = pinconf_to_config_param(*config);
602 u32 arg = 0;
603
604 switch (param) {
605 case PIN_CONFIG_OUTPUT:
606 case PIN_CONFIG_INPUT_ENABLE:
607 arg = rk805_gpio_get(&pci->gpio_chip, pin);
608 break;
609 default:
610 dev_err(pci->dev, "Properties not supported\n");
611 return -ENOTSUPP;
612 }
613
614 *config = pinconf_to_config_packed(param, (u16)arg);
615
616 return 0;
617 }
618
rk805_pinconf_set(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * configs,unsigned int num_configs)619 static int rk805_pinconf_set(struct pinctrl_dev *pctldev,
620 unsigned int pin, unsigned long *configs,
621 unsigned int num_configs)
622 {
623 struct rk805_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
624 enum pin_config_param param;
625 u32 i, arg = 0;
626
627 for (i = 0; i < num_configs; i++) {
628 param = pinconf_to_config_param(configs[i]);
629 arg = pinconf_to_config_argument(configs[i]);
630
631 switch (param) {
632 case PIN_CONFIG_OUTPUT:
633 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
634 rk805_gpio_set(&pci->gpio_chip, pin, arg);
635 break;
636 case PIN_CONFIG_INPUT_ENABLE:
637 if (arg)
638 rk805_pmx_gpio_set_direction(pctldev, NULL,
639 pin, true);
640 break;
641 default:
642 dev_err(pci->dev, "Properties not supported\n");
643 return -ENOTSUPP;
644 }
645 }
646
647 return 0;
648 }
649
650 static const struct pinconf_ops rk805_pinconf_ops = {
651 .pin_config_get = rk805_pinconf_get,
652 .pin_config_set = rk805_pinconf_set,
653 };
654
655 static const struct pinctrl_desc rk805_pinctrl_desc = {
656 .name = "rk805-pinctrl",
657 .pctlops = &rk805_pinctrl_ops,
658 .pmxops = &rk805_pinmux_ops,
659 .confops = &rk805_pinconf_ops,
660 .owner = THIS_MODULE,
661 };
662
663 static struct pinctrl_desc rk816_pinctrl_desc = {
664 .name = "rk816-pinctrl",
665 .pctlops = &rk805_pinctrl_ops,
666 .pmxops = &rk805_pinmux_ops,
667 .confops = &rk805_pinconf_ops,
668 .owner = THIS_MODULE,
669 };
670
671 static struct pinctrl_desc rk817_pinctrl_desc = {
672 .name = "rk817-pinctrl",
673 .pctlops = &rk805_pinctrl_ops,
674 .pmxops = &rk805_pinmux_ops,
675 .confops = &rk805_pinconf_ops,
676 .owner = THIS_MODULE,
677 };
678
rk805_pinctrl_probe(struct platform_device * pdev)679 static int rk805_pinctrl_probe(struct platform_device *pdev)
680 {
681 struct rk805_pctrl_info *pci;
682 struct device_node *np;
683 int ret;
684
685 pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
686 if (!pci)
687 return -ENOMEM;
688
689 pci->dev = &pdev->dev;
690 np = of_get_child_by_name(pdev->dev.parent->of_node, "pinctrl_rk8xx");
691 if (np)
692 pci->dev->of_node = np;
693 else
694 pci->dev->of_node = pdev->dev.parent->of_node;
695 pci->rk808 = dev_get_drvdata(pdev->dev.parent);
696
697 platform_set_drvdata(pdev, pci);
698
699 switch (pci->rk808->variant) {
700 case RK805_ID:
701 pci->pinctrl_desc = rk805_pinctrl_desc;
702 pci->gpio_chip = rk805_gpio_chip;
703 pci->pins = rk805_pins_desc;
704 pci->num_pins = ARRAY_SIZE(rk805_pins_desc);
705 pci->functions = rk805_pin_functions;
706 pci->num_functions = ARRAY_SIZE(rk805_pin_functions);
707 pci->groups = rk805_pin_groups;
708 pci->num_pin_groups = ARRAY_SIZE(rk805_pin_groups);
709 pci->pinctrl_desc.pins = rk805_pins_desc;
710 pci->pinctrl_desc.npins = ARRAY_SIZE(rk805_pins_desc);
711 pci->pin_cfg = rk805_gpio_cfgs;
712 pci->gpio_chip.ngpio = ARRAY_SIZE(rk805_gpio_cfgs);
713 break;
714
715 case RK816_ID:
716 pci->pinctrl_desc = rk816_pinctrl_desc;
717 pci->gpio_chip = rk816_gpio_chip;
718 pci->pins = rk816_pins_desc;
719 pci->num_pins = ARRAY_SIZE(rk816_pins_desc);
720 pci->functions = rk816_pin_functions;
721 pci->num_functions = ARRAY_SIZE(rk816_pin_functions);
722 pci->groups = rk816_pin_groups;
723 pci->num_pin_groups = ARRAY_SIZE(rk816_pin_groups);
724 pci->pinctrl_desc.pins = rk816_pins_desc;
725 pci->pinctrl_desc.npins = ARRAY_SIZE(rk816_pins_desc);
726 pci->pin_cfg = rk816_gpio_cfgs;
727 pci->gpio_chip.ngpio = ARRAY_SIZE(rk816_gpio_cfgs);
728 break;
729
730 case RK809_ID:
731 case RK817_ID:
732 pci->pinctrl_desc = rk817_pinctrl_desc;
733 pci->gpio_chip = rk817_gpio_chip;
734 pci->pins = rk817_pins_desc;
735 pci->num_pins = ARRAY_SIZE(rk817_pins_desc);
736 pci->functions = rk817_pin_functions;
737 pci->num_functions = ARRAY_SIZE(rk817_pin_functions);
738 pci->groups = rk817_pin_groups;
739 pci->num_pin_groups = ARRAY_SIZE(rk817_pin_groups);
740 pci->pinctrl_desc.pins = rk817_pins_desc;
741 pci->pinctrl_desc.npins = ARRAY_SIZE(rk817_pins_desc);
742 pci->pin_cfg = rk817_gpio_cfgs;
743 pci->gpio_chip.ngpio = ARRAY_SIZE(rk817_gpio_cfgs);
744 /* for rk809 only a sleep pin */
745 if (pci->rk808->variant == RK809_ID) {
746 pci->pinctrl_desc.npins = 1;
747 pci->num_pin_groups = 1;
748 pci->num_pins = 1;
749 pci->gpio_chip.ngpio = 1;
750 }
751 break;
752
753 default:
754 dev_err(&pdev->dev, "unsupported RK805 ID %lu\n",
755 pci->rk808->variant);
756 return -EINVAL;
757 }
758
759 pci->gpio_chip.parent = &pdev->dev;
760
761 if (np)
762 pci->gpio_chip.of_node = np;
763 else
764 pci->gpio_chip.of_node = pdev->dev.parent->of_node;
765
766 /* Add gpiochip */
767 ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci);
768 if (ret < 0) {
769 dev_err(&pdev->dev, "Couldn't add gpiochip\n");
770 return ret;
771 }
772
773 /* Add pinctrl */
774 pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci);
775 if (IS_ERR(pci->pctl)) {
776 dev_err(&pdev->dev, "Couldn't add pinctrl\n");
777 return PTR_ERR(pci->pctl);
778 }
779
780 /* Add pin range */
781 ret = gpiochip_add_pin_range(&pci->gpio_chip, dev_name(&pdev->dev),
782 0, 0, pci->gpio_chip.ngpio);
783 if (ret < 0) {
784 dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n");
785 return ret;
786 }
787
788 return 0;
789 }
790
791 static struct platform_driver rk805_pinctrl_driver = {
792 .probe = rk805_pinctrl_probe,
793 .driver = {
794 .name = "rk805-pinctrl",
795 },
796 };
797
rk805_pinctrl_driver_register(void)798 static int __init rk805_pinctrl_driver_register(void)
799 {
800 return platform_driver_register(&rk805_pinctrl_driver);
801 }
802 #ifdef CONFIG_ROCKCHIP_THUNDER_BOOT
803 subsys_initcall(rk805_pinctrl_driver_register);
804 #else
805 fs_initcall_sync(rk805_pinctrl_driver_register);
806 #endif
807
808 MODULE_DESCRIPTION("RK805 pin control and GPIO driver");
809 MODULE_AUTHOR("Joseph Chen <chenjh@rock-chips.com>");
810 MODULE_LICENSE("GPL v2");
811