xref: /OK3568_Linux_fs/kernel/drivers/pinctrl/pinctrl-max96745.c (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Maxim MAX96745 pin control driver
4  *
5  * Copyright (c) 2022 Rockchip Electronics Co. Ltd.
6  */
7 
8 #include <linux/module.h>
9 #include <linux/of.h>
10 #include <linux/pinctrl/pinctrl.h>
11 #include <linux/pinctrl/pinconf-generic.h>
12 #include <linux/pinctrl/pinconf.h>
13 #include <linux/pinctrl/pinmux.h>
14 #include <linux/platform_device.h>
15 #include <linux/regmap.h>
16 #include <linux/mfd/max96745.h>
17 
18 #include "core.h"
19 #include "pinconf.h"
20 #include "pinmux.h"
21 
22 struct max96745_pinctrl {
23 	struct device *dev;
24 	struct pinctrl_dev *pctl;
25 	struct regmap *regmap;
26 };
27 
28 struct max96745_function_data {
29 	u8 gpio_out_dis:1;
30 	u8 gpio_io_rx_en:1;
31 	u8 gpio_tx_en_a:1;
32 	u8 gpio_tx_en_b:1;
33 	u8 gpio_rx_en_a:1;
34 	u8 gpio_rx_en_b:1;
35 	u8 gpio_tx_id;
36 	u8 gpio_rx_id;
37 };
38 
max96745_pinmux_set_mux(struct pinctrl_dev * pctldev,unsigned int function,unsigned int group)39 static int max96745_pinmux_set_mux(struct pinctrl_dev *pctldev,
40 				   unsigned int function, unsigned int group)
41 {
42 	struct max96745_pinctrl *mpctl = pinctrl_dev_get_drvdata(pctldev);
43 	struct function_desc *func;
44 	struct group_desc *grp;
45 	int i;
46 
47 	func = pinmux_generic_get_function(pctldev, function);
48 	if (!func)
49 		return -EINVAL;
50 
51 	grp = pinctrl_generic_get_group(pctldev, group);
52 	if (!grp)
53 		return -EINVAL;
54 
55 	if (func->data) {
56 		struct max96745_function_data *data = func->data;
57 
58 		for (i = 0; i < grp->num_pins; i++) {
59 			regmap_update_bits(mpctl->regmap,
60 					   GPIO_A_REG(grp->pins[i]), GPIO_OUT_DIS,
61 					   FIELD_PREP(GPIO_OUT_DIS, data->gpio_out_dis));
62 			if (data->gpio_tx_en_a || data->gpio_tx_en_b)
63 				regmap_update_bits(mpctl->regmap,
64 						   GPIO_B_REG(grp->pins[i]),
65 						   GPIO_TX_ID,
66 						   FIELD_PREP(GPIO_TX_ID, data->gpio_tx_id));
67 			if (data->gpio_rx_en_a || data->gpio_rx_en_b)
68 				regmap_update_bits(mpctl->regmap,
69 						   GPIO_C_REG(grp->pins[i]),
70 						   GPIO_RX_ID,
71 						   FIELD_PREP(GPIO_RX_ID, data->gpio_rx_id));
72 			regmap_update_bits(mpctl->regmap,
73 					   GPIO_D_REG(grp->pins[i]),
74 					   GPIO_TX_EN_A | GPIO_TX_EN_B | GPIO_IO_RX_EN |
75 					   GPIO_RX_EN_A | GPIO_RX_EN_B,
76 					   FIELD_PREP(GPIO_TX_EN_A, data->gpio_tx_en_a) |
77 					   FIELD_PREP(GPIO_TX_EN_B, data->gpio_tx_en_b) |
78 					   FIELD_PREP(GPIO_RX_EN_A, data->gpio_rx_en_a) |
79 					   FIELD_PREP(GPIO_RX_EN_B, data->gpio_rx_en_b) |
80 					   FIELD_PREP(GPIO_IO_RX_EN, data->gpio_io_rx_en));
81 		}
82 	}
83 
84 	return 0;
85 }
86 
87 static const struct pinmux_ops max96745_pinmux_ops = {
88 	.get_functions_count = pinmux_generic_get_function_count,
89 	.get_function_name = pinmux_generic_get_function_name,
90 	.get_function_groups = pinmux_generic_get_function_groups,
91 	.set_mux = max96745_pinmux_set_mux,
92 };
93 
94 static const struct pinctrl_ops max96745_pinctrl_ops = {
95 	.get_groups_count = pinctrl_generic_get_group_count,
96 	.get_group_name = pinctrl_generic_get_group_name,
97 	.get_group_pins = pinctrl_generic_get_group_pins,
98 	.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
99 	.dt_free_map = pinconf_generic_dt_free_map,
100 };
101 
102 static const struct pinctrl_pin_desc max96745_pins_desc[] = {
103 	PINCTRL_PIN(0, "MFP0"),
104 	PINCTRL_PIN(1, "MFP1"),
105 	PINCTRL_PIN(2, "MFP2"),
106 	PINCTRL_PIN(3, "MFP3"),
107 	PINCTRL_PIN(4, "MFP4"),
108 	PINCTRL_PIN(5, "MFP5"),
109 	PINCTRL_PIN(6, "MFP6"),
110 	PINCTRL_PIN(7, "MFP7"),
111 	PINCTRL_PIN(8, "MFP8"),
112 	PINCTRL_PIN(9, "MFP9"),
113 	PINCTRL_PIN(10, "MFP10"),
114 	PINCTRL_PIN(11, "MFP11"),
115 	PINCTRL_PIN(12, "MFP12"),
116 	PINCTRL_PIN(13, "MFP13"),
117 	PINCTRL_PIN(14, "MFP14"),
118 	PINCTRL_PIN(15, "MFP15"),
119 	PINCTRL_PIN(16, "MFP16"),
120 	PINCTRL_PIN(17, "MFP17"),
121 	PINCTRL_PIN(18, "MFP18"),
122 	PINCTRL_PIN(19, "MFP19"),
123 	PINCTRL_PIN(20, "MFP20"),
124 	PINCTRL_PIN(21, "MFP21"),
125 	PINCTRL_PIN(22, "MFP22"),
126 	PINCTRL_PIN(23, "MFP23"),
127 	PINCTRL_PIN(24, "MFP24"),
128 	PINCTRL_PIN(25, "MFP25"),
129 };
130 
131 static int MFP0_pins[] = {0};
132 static int MFP1_pins[] = {1};
133 static int MFP2_pins[] = {2};
134 static int MFP3_pins[] = {3};
135 static int MFP4_pins[] = {4};
136 static int MFP5_pins[] = {5};
137 static int MFP6_pins[] = {6};
138 static int MFP7_pins[] = {7};
139 static int MFP8_pins[] = {8};
140 static int MFP9_pins[] = {9};
141 static int MFP10_pins[] = {10};
142 static int MFP11_pins[] = {11};
143 static int MFP12_pins[] = {12};
144 static int MFP13_pins[] = {13};
145 static int MFP14_pins[] = {14};
146 static int MFP15_pins[] = {15};
147 static int MFP16_pins[] = {16};
148 static int MFP17_pins[] = {17};
149 static int MFP18_pins[] = {18};
150 static int MFP19_pins[] = {19};
151 static int MFP20_pins[] = {20};
152 static int MFP21_pins[] = {21};
153 static int MFP22_pins[] = {22};
154 static int MFP23_pins[] = {23};
155 static int MFP24_pins[] = {24};
156 static int MFP25_pins[] = {25};
157 static int I2C_pins[] = {3, 7};
158 static int UART_pins[] = {3, 7};
159 
160 #define GROUP_DESC(nm) \
161 { \
162 	.name = #nm, \
163 	.pins = nm ## _pins, \
164 	.num_pins = ARRAY_SIZE(nm ## _pins), \
165 }
166 
167 static const struct group_desc max96745_groups[] = {
168 	GROUP_DESC(MFP0),
169 	GROUP_DESC(MFP1),
170 	GROUP_DESC(MFP2),
171 	GROUP_DESC(MFP3),
172 	GROUP_DESC(MFP4),
173 	GROUP_DESC(MFP5),
174 	GROUP_DESC(MFP6),
175 	GROUP_DESC(MFP7),
176 	GROUP_DESC(MFP8),
177 	GROUP_DESC(MFP9),
178 	GROUP_DESC(MFP10),
179 	GROUP_DESC(MFP11),
180 	GROUP_DESC(MFP12),
181 	GROUP_DESC(MFP13),
182 	GROUP_DESC(MFP14),
183 	GROUP_DESC(MFP15),
184 	GROUP_DESC(MFP16),
185 	GROUP_DESC(MFP17),
186 	GROUP_DESC(MFP18),
187 	GROUP_DESC(MFP19),
188 	GROUP_DESC(MFP20),
189 	GROUP_DESC(MFP21),
190 	GROUP_DESC(MFP22),
191 	GROUP_DESC(MFP23),
192 	GROUP_DESC(MFP24),
193 	GROUP_DESC(MFP25),
194 	GROUP_DESC(I2C),
195 	GROUP_DESC(UART),
196 };
197 
198 static const char *MFP_groups[] = {
199 	"MFP0", "MFP1", "MFP2", "MFP3", "MFP4",
200 	"MFP5", "MFP6", "MFP7", "MFP8", "MFP9",
201 	"MFP10", "MFP11", "MFP12", "MFP13", "MFP14",
202 	"MFP15", "MFP16", "MFP17", "MFP18", "MFP19",
203 	"MFP20", "MFP21", "MFP22", "MFP23", "MFP24",
204 	"MFP25",
205 };
206 static const char *I2C_groups[] = { "I2C" };
207 static const char *UART_groups[] = { "UART" };
208 
209 #define FUNCTION_DESC_GPIO_TX_A(id) \
210 { \
211 	.name = "GPIO_TX_A_"#id, \
212 	.group_names = MFP_groups, \
213 	.num_group_names = ARRAY_SIZE(MFP_groups), \
214 	.data = (void *)(const struct max96745_function_data []) { \
215 		{ .gpio_out_dis = 1, .gpio_tx_en_a = 1, \
216 		  .gpio_io_rx_en = 1, .gpio_tx_id = id } \
217 	}, \
218 } \
219 
220 #define FUNCTION_DESC_GPIO_TX_B(id) \
221 { \
222 	.name = "GPIO_TX_B_"#id, \
223 	.group_names = MFP_groups, \
224 	.num_group_names = ARRAY_SIZE(MFP_groups), \
225 	.data = (void *)(const struct max96745_function_data []) { \
226 		{ .gpio_out_dis = 1, .gpio_tx_en_b = 1, \
227 		  .gpio_io_rx_en = 1, .gpio_tx_id = id } \
228 	}, \
229 } \
230 
231 #define FUNCTION_DESC_GPIO_RX_A(id) \
232 { \
233 	.name = "GPIO_RX_A_"#id, \
234 	.group_names = MFP_groups, \
235 	.num_group_names = ARRAY_SIZE(MFP_groups), \
236 	.data = (void *)(const struct max96745_function_data []) { \
237 		{ .gpio_rx_en_a = 1, .gpio_rx_id = id } \
238 	}, \
239 } \
240 
241 #define FUNCTION_DESC_GPIO_RX_B(id) \
242 { \
243 	.name = "GPIO_RX_B_"#id, \
244 	.group_names = MFP_groups, \
245 	.num_group_names = ARRAY_SIZE(MFP_groups), \
246 	.data = (void *)(const struct max96745_function_data []) { \
247 		{ .gpio_rx_en_b = 1, .gpio_rx_id = id } \
248 	}, \
249 } \
250 
251 #define FUNCTION_DESC_GPIO() \
252 { \
253 	.name = "GPIO", \
254 	.group_names = MFP_groups, \
255 	.num_group_names = ARRAY_SIZE(MFP_groups), \
256 	.data = (void *)(const struct max96745_function_data []) { \
257 		{ } \
258 	}, \
259 } \
260 
261 #define FUNCTION_DESC(nm) \
262 { \
263 	.name = #nm, \
264 	.group_names = nm##_groups, \
265 	.num_group_names = ARRAY_SIZE(nm##_groups), \
266 } \
267 
268 static const struct function_desc max96745_functions[] = {
269 	FUNCTION_DESC_GPIO_TX_A(0),
270 	FUNCTION_DESC_GPIO_TX_A(1),
271 	FUNCTION_DESC_GPIO_TX_A(2),
272 	FUNCTION_DESC_GPIO_TX_A(3),
273 	FUNCTION_DESC_GPIO_TX_A(4),
274 	FUNCTION_DESC_GPIO_TX_A(5),
275 	FUNCTION_DESC_GPIO_TX_A(6),
276 	FUNCTION_DESC_GPIO_TX_A(7),
277 	FUNCTION_DESC_GPIO_TX_A(8),
278 	FUNCTION_DESC_GPIO_TX_A(9),
279 	FUNCTION_DESC_GPIO_TX_A(10),
280 	FUNCTION_DESC_GPIO_TX_A(11),
281 	FUNCTION_DESC_GPIO_TX_A(12),
282 	FUNCTION_DESC_GPIO_TX_A(13),
283 	FUNCTION_DESC_GPIO_TX_A(14),
284 	FUNCTION_DESC_GPIO_TX_A(15),
285 	FUNCTION_DESC_GPIO_TX_A(16),
286 	FUNCTION_DESC_GPIO_TX_A(17),
287 	FUNCTION_DESC_GPIO_TX_A(18),
288 	FUNCTION_DESC_GPIO_TX_A(19),
289 	FUNCTION_DESC_GPIO_TX_A(20),
290 	FUNCTION_DESC_GPIO_TX_A(21),
291 	FUNCTION_DESC_GPIO_TX_A(22),
292 	FUNCTION_DESC_GPIO_TX_A(23),
293 	FUNCTION_DESC_GPIO_TX_A(24),
294 	FUNCTION_DESC_GPIO_TX_A(25),
295 	FUNCTION_DESC_GPIO_TX_A(26),
296 	FUNCTION_DESC_GPIO_TX_A(27),
297 	FUNCTION_DESC_GPIO_TX_A(28),
298 	FUNCTION_DESC_GPIO_TX_A(29),
299 	FUNCTION_DESC_GPIO_TX_A(30),
300 	FUNCTION_DESC_GPIO_TX_A(31),
301 	FUNCTION_DESC_GPIO_TX_B(0),
302 	FUNCTION_DESC_GPIO_TX_B(1),
303 	FUNCTION_DESC_GPIO_TX_B(2),
304 	FUNCTION_DESC_GPIO_TX_B(3),
305 	FUNCTION_DESC_GPIO_TX_B(4),
306 	FUNCTION_DESC_GPIO_TX_B(5),
307 	FUNCTION_DESC_GPIO_TX_B(6),
308 	FUNCTION_DESC_GPIO_TX_B(7),
309 	FUNCTION_DESC_GPIO_TX_B(8),
310 	FUNCTION_DESC_GPIO_TX_B(9),
311 	FUNCTION_DESC_GPIO_TX_B(10),
312 	FUNCTION_DESC_GPIO_TX_B(11),
313 	FUNCTION_DESC_GPIO_TX_B(12),
314 	FUNCTION_DESC_GPIO_TX_B(13),
315 	FUNCTION_DESC_GPIO_TX_B(14),
316 	FUNCTION_DESC_GPIO_TX_B(15),
317 	FUNCTION_DESC_GPIO_TX_B(16),
318 	FUNCTION_DESC_GPIO_TX_B(17),
319 	FUNCTION_DESC_GPIO_TX_B(18),
320 	FUNCTION_DESC_GPIO_TX_B(19),
321 	FUNCTION_DESC_GPIO_TX_B(20),
322 	FUNCTION_DESC_GPIO_TX_B(21),
323 	FUNCTION_DESC_GPIO_TX_B(22),
324 	FUNCTION_DESC_GPIO_TX_B(23),
325 	FUNCTION_DESC_GPIO_TX_B(24),
326 	FUNCTION_DESC_GPIO_TX_B(25),
327 	FUNCTION_DESC_GPIO_TX_B(26),
328 	FUNCTION_DESC_GPIO_TX_B(27),
329 	FUNCTION_DESC_GPIO_TX_B(28),
330 	FUNCTION_DESC_GPIO_TX_B(29),
331 	FUNCTION_DESC_GPIO_TX_B(30),
332 	FUNCTION_DESC_GPIO_TX_B(31),
333 	FUNCTION_DESC_GPIO_RX_A(0),
334 	FUNCTION_DESC_GPIO_RX_A(1),
335 	FUNCTION_DESC_GPIO_RX_A(2),
336 	FUNCTION_DESC_GPIO_RX_A(3),
337 	FUNCTION_DESC_GPIO_RX_A(4),
338 	FUNCTION_DESC_GPIO_RX_A(5),
339 	FUNCTION_DESC_GPIO_RX_A(6),
340 	FUNCTION_DESC_GPIO_RX_A(7),
341 	FUNCTION_DESC_GPIO_RX_A(8),
342 	FUNCTION_DESC_GPIO_RX_A(9),
343 	FUNCTION_DESC_GPIO_RX_A(10),
344 	FUNCTION_DESC_GPIO_RX_A(11),
345 	FUNCTION_DESC_GPIO_RX_A(12),
346 	FUNCTION_DESC_GPIO_RX_A(13),
347 	FUNCTION_DESC_GPIO_RX_A(14),
348 	FUNCTION_DESC_GPIO_RX_A(15),
349 	FUNCTION_DESC_GPIO_RX_A(16),
350 	FUNCTION_DESC_GPIO_RX_A(17),
351 	FUNCTION_DESC_GPIO_RX_A(18),
352 	FUNCTION_DESC_GPIO_RX_A(19),
353 	FUNCTION_DESC_GPIO_RX_A(20),
354 	FUNCTION_DESC_GPIO_RX_A(21),
355 	FUNCTION_DESC_GPIO_RX_A(22),
356 	FUNCTION_DESC_GPIO_RX_A(23),
357 	FUNCTION_DESC_GPIO_RX_A(24),
358 	FUNCTION_DESC_GPIO_RX_A(25),
359 	FUNCTION_DESC_GPIO_RX_A(26),
360 	FUNCTION_DESC_GPIO_RX_A(27),
361 	FUNCTION_DESC_GPIO_RX_A(28),
362 	FUNCTION_DESC_GPIO_RX_A(29),
363 	FUNCTION_DESC_GPIO_RX_A(30),
364 	FUNCTION_DESC_GPIO_RX_A(31),
365 	FUNCTION_DESC_GPIO_RX_B(0),
366 	FUNCTION_DESC_GPIO_RX_B(1),
367 	FUNCTION_DESC_GPIO_RX_B(2),
368 	FUNCTION_DESC_GPIO_RX_B(3),
369 	FUNCTION_DESC_GPIO_RX_B(4),
370 	FUNCTION_DESC_GPIO_RX_B(5),
371 	FUNCTION_DESC_GPIO_RX_B(6),
372 	FUNCTION_DESC_GPIO_RX_B(7),
373 	FUNCTION_DESC_GPIO_RX_B(8),
374 	FUNCTION_DESC_GPIO_RX_B(9),
375 	FUNCTION_DESC_GPIO_RX_B(10),
376 	FUNCTION_DESC_GPIO_RX_B(11),
377 	FUNCTION_DESC_GPIO_RX_B(12),
378 	FUNCTION_DESC_GPIO_RX_B(13),
379 	FUNCTION_DESC_GPIO_RX_B(14),
380 	FUNCTION_DESC_GPIO_RX_B(15),
381 	FUNCTION_DESC_GPIO_RX_B(16),
382 	FUNCTION_DESC_GPIO_RX_B(17),
383 	FUNCTION_DESC_GPIO_RX_B(18),
384 	FUNCTION_DESC_GPIO_RX_B(19),
385 	FUNCTION_DESC_GPIO_RX_B(20),
386 	FUNCTION_DESC_GPIO_RX_B(21),
387 	FUNCTION_DESC_GPIO_RX_B(22),
388 	FUNCTION_DESC_GPIO_RX_B(23),
389 	FUNCTION_DESC_GPIO_RX_B(24),
390 	FUNCTION_DESC_GPIO_RX_B(25),
391 	FUNCTION_DESC_GPIO_RX_B(26),
392 	FUNCTION_DESC_GPIO_RX_B(27),
393 	FUNCTION_DESC_GPIO_RX_B(28),
394 	FUNCTION_DESC_GPIO_RX_B(29),
395 	FUNCTION_DESC_GPIO_RX_B(30),
396 	FUNCTION_DESC_GPIO_RX_B(31),
397 	FUNCTION_DESC_GPIO(),
398 	FUNCTION_DESC(I2C),
399 	FUNCTION_DESC(UART),
400 };
401 
max96745_pinctrl_probe(struct platform_device * pdev)402 static int max96745_pinctrl_probe(struct platform_device *pdev)
403 {
404 	struct device *dev = &pdev->dev;
405 	struct max96745_pinctrl *mpctl;
406 	struct pinctrl_desc *pctl_desc;
407 	int i, ret;
408 
409 	mpctl = devm_kzalloc(dev, sizeof(*mpctl), GFP_KERNEL);
410 	if (!mpctl)
411 		return -ENOMEM;
412 
413 	mpctl->dev = dev;
414 	platform_set_drvdata(pdev, mpctl);
415 
416 	mpctl->regmap = dev_get_regmap(dev->parent, NULL);
417 	if (!mpctl->regmap)
418 		return dev_err_probe(dev, -ENODEV, "failed to get regmap\n");
419 
420 	pctl_desc = devm_kzalloc(dev, sizeof(*pctl_desc), GFP_KERNEL);
421 	if (!pctl_desc)
422 		return -ENOMEM;
423 
424 	pctl_desc->name = dev_name(dev);
425 	pctl_desc->owner = THIS_MODULE;
426 	pctl_desc->pctlops = &max96745_pinctrl_ops;
427 	pctl_desc->pmxops = &max96745_pinmux_ops;
428 	pctl_desc->pins = max96745_pins_desc;
429 	pctl_desc->npins = ARRAY_SIZE(max96745_pins_desc);
430 
431 	ret = devm_pinctrl_register_and_init(dev, pctl_desc, mpctl,
432 					     &mpctl->pctl);
433 	if (ret)
434 		return dev_err_probe(dev, ret, "failed to register pinctrl\n");
435 
436 	for (i = 0; i < ARRAY_SIZE(max96745_groups); i++) {
437 		const struct group_desc *group = &max96745_groups[i];
438 
439 		ret = pinctrl_generic_add_group(mpctl->pctl, group->name,
440 						group->pins, group->num_pins,
441 						group->data);
442 		if (ret < 0)
443 			return dev_err_probe(dev, ret,
444 					     "failed to register group %s\n",
445 					     group->name);
446 	}
447 
448 	for (i = 0; i < ARRAY_SIZE(max96745_functions); i++) {
449 		const struct function_desc *func = &max96745_functions[i];
450 
451 		ret = pinmux_generic_add_function(mpctl->pctl, func->name,
452 						  func->group_names,
453 						  func->num_group_names,
454 						  func->data);
455 		if (ret < 0)
456 			return dev_err_probe(dev, ret,
457 					     "failed to register function %s\n",
458 					     func->name);
459 	}
460 
461 	return pinctrl_enable(mpctl->pctl);
462 }
463 
464 static const struct of_device_id max96745_pinctrl_of_match[] = {
465 	{ .compatible = "maxim,max96745-pinctrl" },
466 	{}
467 };
468 MODULE_DEVICE_TABLE(of, max96745_pinctrl_of_match);
469 
470 static struct platform_driver max96745_pinctrl_driver = {
471 	.driver = {
472 		.name = "max96745-pinctrl",
473 		.of_match_table = max96745_pinctrl_of_match,
474 	},
475 	.probe = max96745_pinctrl_probe,
476 };
477 
478 module_platform_driver(max96745_pinctrl_driver);
479 
480 MODULE_AUTHOR("Wyon Bi <bivvy.bi@rock-chips.com>");
481 MODULE_DESCRIPTION("Maxim MAX96745 pin control driver");
482 MODULE_LICENSE("GPL");
483