1 /* 2 * Copyright (c) 2015 South Silicon Valley Microelectronics Inc. 3 * Copyright (c) 2015 iComm Corporation 4 * 5 * This program is free software: you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation, either version 3 of the License, or 8 * (at your option) any later version. 9 * This program is distributed in the hope that it will be useful, but 10 * WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 12 * See the GNU General Public License for more details. 13 * You should have received a copy of the GNU General Public License 14 * along with this program. If not, see <http://www.gnu.org/licenses/>. 15 */ 16 17 #ifndef _LINUX_SSVCABRIO_PLATFORM_H 18 #define _LINUX_SSVCABRIO_PLATFORM_H 19 #include <linux/mmc/host.h> 20 #include <hwif/sdio/sdio_def.h> 21 #define SSVCABRIO_PLAT_EEP_MAX_WORDS 2048 22 #define SSV_REG_WRITE(dev,reg,val) \ 23 (sh)->priv->ops->writereg((sh)->sc->dev, (reg), (val)) 24 #define SSV_REG_READ(dev,reg,buf) \ 25 (sh)->priv->ops->readreg((sh)->sc->dev, (reg), (buf)) 26 #if 0 27 #define SSV_REG_WRITE(sh,reg,val) \ 28 (sh)->priv->ops->writereg((sh)->sc->dev, (reg), (val)) 29 #define SSV_REG_READ(sh,reg,buf) \ 30 (sh)->priv->ops->readreg((sh)->sc->dev, (reg), (buf)) 31 #define SSV_REG_CONFIRM(sh,reg,val) \ 32 { \ 33 u32 regval; \ 34 SSV_REG_READ(sh, reg, ®val); \ 35 if (regval != (val)) { \ 36 printk("[0x%08x]: 0x%08x!=0x%08x\n",\ 37 (reg), (val), regval); \ 38 return -1; \ 39 } \ 40 } 41 #define SSV_REG_SET_BITS(sh,reg,set,clr) \ 42 { \ 43 u32 reg_val; \ 44 SSV_REG_READ(sh, reg, ®_val); \ 45 reg_val &= ~(clr); \ 46 reg_val |= (set); \ 47 SSV_REG_WRITE(sh, reg, reg_val); \ 48 } 49 #endif 50 struct ssv6xxx_hwif_ops { 51 int __must_check (*read)(struct device *child, void *buf,size_t *size); 52 int __must_check (*write)(struct device *child, void *buf, size_t len,u8 queue_num); 53 int __must_check (*readreg)(struct device *child, u32 addr, u32 *buf); 54 int __must_check (*writereg)(struct device *child, u32 addr, u32 buf); 55 int (*trigger_tx_rx)(struct device *child); 56 int (*irq_getmask)(struct device *child, u32 *mask); 57 void (*irq_setmask)(struct device *child,int mask); 58 void (*irq_enable)(struct device *child); 59 void (*irq_disable)(struct device *child,bool iswaitirq); 60 int (*irq_getstatus)(struct device *child,int *status); 61 void (*irq_request)(struct device *child,irq_handler_t irq_handler,void *irq_dev); 62 void (*irq_trigger)(struct device *child); 63 void (*pmu_wakeup)(struct device *child); 64 int __must_check (*load_fw)(struct device *child, u8 *firmware_name, u8 openfile); 65 int (*cmd52_read)(struct device *child, u32 addr, u32 *value); 66 int (*cmd52_write)(struct device *child, u32 addr, u32 value); 67 bool (*support_scatter)(struct device *child); 68 int (*rw_scatter)(struct device *child, struct sdio_scatter_req *scat_req); 69 bool (*is_ready)(struct device *child); 70 int (*write_sram)(struct device *child, u32 addr, u8 *data, u32 size); 71 void (*interface_reset)(struct device *child); 72 }; 73 struct ssv6xxx_if_debug { 74 struct device *dev; 75 struct platform_device *pdev; 76 }; 77 struct ssv6xxx_platform_data { 78 atomic_t irq_handling; 79 bool is_enabled; 80 unsigned short vendor; 81 unsigned short device; 82 struct ssv6xxx_hwif_ops *ops; 83 }; 84 #endif 85