xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822bs/hal/hal_intf.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2017 Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  *****************************************************************************/
15 
16 #define _HAL_INTF_C_
17 
18 #include <drv_types.h>
19 #include <hal_data.h>
20 
21 const u32 _chip_type_to_odm_ic_type[] = {
22 	0,
23 	ODM_RTL8188E,
24 	ODM_RTL8192E,
25 	ODM_RTL8812,
26 	ODM_RTL8821,
27 	ODM_RTL8723B,
28 	ODM_RTL8814A,
29 	ODM_RTL8703B,
30 	ODM_RTL8188F,
31 	ODM_RTL8188F,
32 	ODM_RTL8822B,
33 	ODM_RTL8723D,
34 	ODM_RTL8821C,
35 	ODM_RTL8710B,
36 	ODM_RTL8192F,
37 	ODM_RTL8822C,
38 	ODM_RTL8814B,
39 	0,
40 };
41 
rtw_hal_chip_configure(_adapter * padapter)42 void rtw_hal_chip_configure(_adapter *padapter)
43 {
44 	padapter->hal_func.intf_chip_configure(padapter);
45 }
46 
47 /*
48  * Description:
49  *	Read chip internal ROM data
50  *
51  * Return:
52  *	_SUCCESS success
53  *	_FAIL	 fail
54  */
rtw_hal_read_chip_info(_adapter * padapter)55 u8 rtw_hal_read_chip_info(_adapter *padapter)
56 {
57 	u8 rtn = _SUCCESS;
58 	u8 hci_type = rtw_get_intf_type(padapter);
59 	systime start = rtw_get_current_time();
60 
61 	/*  before access eFuse, make sure card enable has been called */
62 	if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI)
63 	    && !rtw_is_hw_init_completed(padapter))
64 		rtw_hal_power_on(padapter);
65 
66 	rtn = padapter->hal_func.read_adapter_info(padapter);
67 
68 	if ((hci_type == RTW_SDIO || hci_type == RTW_GSPI)
69 	    && !rtw_is_hw_init_completed(padapter))
70 		rtw_hal_power_off(padapter);
71 
72 	RTW_INFO("%s in %d ms\n", __func__, rtw_get_passing_time_ms(start));
73 
74 	return rtn;
75 }
76 
rtw_hal_read_chip_version(_adapter * padapter)77 void rtw_hal_read_chip_version(_adapter *padapter)
78 {
79 	padapter->hal_func.read_chip_version(padapter);
80 	rtw_odm_init_ic_type(padapter);
81 }
82 
rtw_init_wireless_mode(_adapter * padapter)83 static void rtw_init_wireless_mode(_adapter *padapter)
84 {
85 	u8 proto_wireless_mode = 0;
86 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(padapter);
87 	if(hal_spec->proto_cap & PROTO_CAP_11B)
88 		proto_wireless_mode |= WIRELESS_11B;
89 
90 	if(hal_spec->proto_cap & PROTO_CAP_11G)
91 		proto_wireless_mode |= WIRELESS_11G;
92 #ifdef CONFIG_80211AC_VHT
93 	if(hal_spec->band_cap & BAND_CAP_5G)
94 		proto_wireless_mode |= WIRELESS_11A;
95 #endif
96 
97 #ifdef CONFIG_80211N_HT
98 	if(hal_spec->proto_cap & PROTO_CAP_11N) {
99 
100 		if(hal_spec->band_cap & BAND_CAP_2G)
101 			proto_wireless_mode |= WIRELESS_11_24N;
102 		if(hal_spec->band_cap & BAND_CAP_5G)
103 			proto_wireless_mode |= WIRELESS_11_5N;
104 	}
105 #endif
106 
107 #ifdef CONFIG_80211AC_VHT
108 	if(hal_spec->proto_cap & PROTO_CAP_11AC)
109 		proto_wireless_mode |= WIRELESS_11AC;
110 #endif
111 	padapter->registrypriv.wireless_mode &= proto_wireless_mode;
112 }
113 
rtw_hal_def_value_init(_adapter * padapter)114 void rtw_hal_def_value_init(_adapter *padapter)
115 {
116 	if (is_primary_adapter(padapter)) {
117 		/*init fw_psmode_iface_id*/
118 		adapter_to_pwrctl(padapter)->fw_psmode_iface_id = 0xff;
119 		/*wireless_mode*/
120 		rtw_init_wireless_mode(padapter);
121 		padapter->hal_func.init_default_value(padapter);
122 
123 		rtw_init_hal_com_default_value(padapter);
124 
125 		#ifdef CONFIG_FW_MULTI_PORT_SUPPORT
126 		adapter_to_dvobj(padapter)->dft.port_id = 0xFF;
127 		adapter_to_dvobj(padapter)->dft.mac_id = 0xFF;
128 		#endif
129 		#ifdef CONFIG_HW_P0_TSF_SYNC
130 		adapter_to_dvobj(padapter)->p0_tsf.sync_port = MAX_HW_PORT;
131 		adapter_to_dvobj(padapter)->p0_tsf.offset = 0;
132 		#endif
133 
134 		GET_HAL_DATA(padapter)->rx_tsf_addr_filter_config = 0;
135 	}
136 }
137 
rtw_hal_data_init(_adapter * padapter)138 u8 rtw_hal_data_init(_adapter *padapter)
139 {
140 	if (is_primary_adapter(padapter)) {
141 		padapter->hal_data_sz = sizeof(HAL_DATA_TYPE);
142 		padapter->HalData = rtw_zvmalloc(padapter->hal_data_sz);
143 		if (padapter->HalData == NULL) {
144 			RTW_INFO("cant not alloc memory for HAL DATA\n");
145 			return _FAIL;
146 		}
147 		rtw_phydm_priv_init(padapter);
148 	}
149 	return _SUCCESS;
150 }
151 
rtw_hal_data_deinit(_adapter * padapter)152 void rtw_hal_data_deinit(_adapter *padapter)
153 {
154 	if (is_primary_adapter(padapter)) {
155 		if (padapter->HalData) {
156 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
157 			phy_free_filebuf(padapter);
158 #endif
159 			rtw_vmfree(padapter->HalData, padapter->hal_data_sz);
160 			padapter->HalData = NULL;
161 			padapter->hal_data_sz = 0;
162 		}
163 	}
164 }
165 
rtw_hal_free_data(_adapter * padapter)166 void	rtw_hal_free_data(_adapter *padapter)
167 {
168 	/* free HAL Data	 */
169 	rtw_hal_data_deinit(padapter);
170 }
rtw_hal_dm_init(_adapter * padapter)171 void rtw_hal_dm_init(_adapter *padapter)
172 {
173 	if (is_primary_adapter(padapter)) {
174 		PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(padapter);
175 
176 		padapter->hal_func.dm_init(padapter);
177 
178 		_rtw_spinlock_init(&pHalData->IQKSpinLock);
179 
180 		#ifdef CONFIG_TXPWR_PG_WITH_PWR_IDX
181 		if (pHalData->txpwr_pg_mode == TXPWR_PG_WITH_PWR_IDX)
182 			hal_load_txpwr_info(padapter);
183 		#endif
184 		phy_load_tx_power_ext_info(padapter, 1);
185 	}
186 }
rtw_hal_dm_deinit(_adapter * padapter)187 void rtw_hal_dm_deinit(_adapter *padapter)
188 {
189 	if (is_primary_adapter(padapter)) {
190 		PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(padapter);
191 
192 		padapter->hal_func.dm_deinit(padapter);
193 
194 		_rtw_spinlock_free(&pHalData->IQKSpinLock);
195 	}
196 }
197 
rtw_chip_rftype_to_hal_rftype(_adapter * adapter,u8 limit)198 enum rf_type rtw_chip_rftype_to_hal_rftype(_adapter *adapter, u8 limit)
199 {
200 	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
201 	u8 tx_num = 0, rx_num = 0;
202 
203 	/*get RF PATH from version_id.RF_TYPE */
204 	if (IS_1T1R(hal_data->version_id)) {
205 		tx_num = 1;
206 		rx_num = 1;
207 	} else if (IS_1T2R(hal_data->version_id)) {
208 		tx_num = 1;
209 		rx_num = 2;
210 	} else if (IS_2T2R(hal_data->version_id)) {
211 		tx_num = 2;
212 		rx_num = 2;
213 	} else if (IS_2T3R(hal_data->version_id)) {
214 		tx_num = 2;
215 		rx_num = 3;
216 	} else if (IS_2T4R(hal_data->version_id)) {
217 		tx_num = 2;
218 		rx_num = 4;
219 	} else if (IS_3T3R(hal_data->version_id)) {
220 		tx_num = 3;
221 		rx_num = 3;
222 	} else if (IS_3T4R(hal_data->version_id)) {
223 		tx_num = 3;
224 		rx_num = 4;
225 	} else if (IS_4T4R(hal_data->version_id)) {
226 		tx_num = 4;
227 		rx_num = 4;
228 	}
229 
230 	if (limit) {
231 		tx_num = rtw_min(tx_num, limit);
232 		rx_num = rtw_min(rx_num, limit);
233 	}
234 
235 	return trx_num_to_rf_type(tx_num, rx_num);
236 }
237 
dump_hal_runtime_trx_mode(void * sel,_adapter * adapter)238 void dump_hal_runtime_trx_mode(void *sel, _adapter *adapter)
239 {
240 	struct registry_priv *regpriv = &adapter->registrypriv;
241 	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
242 	int i;
243 
244 	RTW_PRINT_SEL(sel, "txpath=0x%x, rxpath=0x%x\n", hal_data->txpath, hal_data->rxpath);
245 	for (i = 0; i < hal_data->tx_nss; i++)
246 		RTW_PRINT_SEL(sel, "txpath_%uss:0x%x, num:%u\n"
247 			, i + 1, hal_data->txpath_nss[i]
248 			, hal_data->txpath_num_nss[i]);
249 }
250 
dump_hal_trx_mode(void * sel,_adapter * adapter)251 void dump_hal_trx_mode(void *sel, _adapter *adapter)
252 {
253 	struct registry_priv *regpriv = &adapter->registrypriv;
254 	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
255 
256 	RTW_PRINT_SEL(sel, "trx_path_bmp:0x%02x(%s), NumTotalRFPath:%u, max_tx_cnt:%u\n"
257 		, hal_data->trx_path_bmp
258 		, rf_type_to_rfpath_str(hal_data->rf_type)
259 		, hal_data->NumTotalRFPath
260 		, hal_data->max_tx_cnt
261 	);
262 	RTW_PRINT_SEL(sel, "tx_nss:%u, rx_nss:%u\n"
263 		, hal_data->tx_nss, hal_data->rx_nss);
264 	RTW_PRINT_SEL(sel, "\n");
265 
266 	dump_hal_runtime_trx_mode(sel, adapter);
267 }
268 
_dump_rf_path(void * sel,_adapter * adapter)269 void _dump_rf_path(void *sel, _adapter *adapter)
270 {
271 	struct registry_priv *regpriv = &adapter->registrypriv;
272 	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
273 
274 	RTW_PRINT_SEL(sel, "[RF_PATH] ver_id.RF_TYPE:%s, rf_reg_path_num:%u, max_tx_cnt:%u\n"
275 		, rf_type_to_rfpath_str(rtw_chip_rftype_to_hal_rftype(adapter, 0))
276 		, GET_HAL_SPEC(adapter)->rf_reg_path_num
277 		, GET_HAL_SPEC(adapter)->max_tx_cnt);
278 	RTW_PRINT_SEL(sel, "[RF_PATH] PG's trx_path_bmp:0x%02x, max_tx_cnt:%u\n"
279 		, hal_data->eeprom_trx_path_bmp, hal_data->eeprom_max_tx_cnt);
280 
281 	RTW_PRINT_SEL(sel, "[RF_PATH] Registry's RF PATH:%s\n"
282 		, rf_type_to_rfpath_str(regpriv->rf_path));
283 
284 	RTW_PRINT_SEL(sel, "[RF_PATH] HALDATA's trx_path_bmp:0x%02x, max_tx_cnt:%u\n"
285 		, hal_data->trx_path_bmp, hal_data->max_tx_cnt);
286 	RTW_PRINT_SEL(sel, "[RF_PATH] HALDATA's rf_type:%s\n"
287 		, rf_type_to_rfpath_str(hal_data->rf_type));
288 	RTW_PRINT_SEL(sel, "[RF_PATH] NumTotalRFPath:%d\n"
289 		, hal_data->NumTotalRFPath);
290 }
291 
292 #ifdef CONFIG_RTL8814A
293 extern enum rf_type rtl8814a_rfpath_decision(_adapter *adapter);
294 #endif
295 
rtw_hal_rfpath_init(_adapter * adapter)296 u8 rtw_hal_rfpath_init(_adapter *adapter)
297 {
298 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
299 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
300 
301 #ifdef CONFIG_RTL8814A
302 if (IS_HARDWARE_TYPE_8814A(adapter)) {
303 	enum bb_path tx_bmp, rx_bmp;
304 	hal_data->rf_type = rtl8814a_rfpath_decision(adapter);
305 	rf_type_to_default_trx_bmp(hal_data->rf_type, &tx_bmp, &rx_bmp);
306 	hal_data->trx_path_bmp = (tx_bmp << 4) | rx_bmp;
307 	hal_data->NumTotalRFPath = 4;
308 	hal_data->max_tx_cnt = hal_spec->max_tx_cnt;
309 	hal_data->max_tx_cnt = rtw_min(hal_data->max_tx_cnt, rf_type_to_rf_tx_cnt(hal_data->rf_type));
310 } else
311 #endif
312 {
313 	struct registry_priv *regpriv = &adapter->registrypriv;
314 	enum rf_type ic_cap;
315 	enum rf_type type;
316 	u8 tx_path_num;
317 	u8 rx_path_num;
318 	int i;
319 
320 	ic_cap = rtw_chip_rftype_to_hal_rftype(adapter, hal_spec->rf_reg_path_num);
321 	if (!RF_TYPE_VALID(ic_cap)) {
322 		RTW_ERR("%s rtw_chip_rftype_to_hal_rftype failed\n", __func__);
323 		return _FAIL;
324 	}
325 	type = ic_cap;
326 
327 	if (RF_TYPE_VALID(regpriv->rf_path)) {
328 		if (rf_type_is_a_in_b(regpriv->rf_path, ic_cap))
329 			type = regpriv->rf_path;
330 		else
331 			RTW_WARN("%s invalid regpriv:%s > ic_cap:%s\n", __func__
332 				, rf_type_to_rfpath_str(regpriv->rf_path)
333 				, rf_type_to_rfpath_str(ic_cap));
334 	}
335 
336 	if (hal_data->eeprom_trx_path_bmp != 0x00) {
337 		/* specific trx path is defined, restrict it with rftype(TX and RX num) */
338 		u8 trx_path_bmp = rtw_restrict_trx_path_bmp_by_rftype(
339 							hal_data->eeprom_trx_path_bmp, type, &tx_path_num, &rx_path_num);
340 		if (!trx_path_bmp) {
341 			RTW_ERR("%s rtw_restrict_trx_path_bmp_by_rftype(0x%x, %s) failed\n"
342 				, __func__, hal_data->eeprom_trx_path_bmp
343 				, rf_type_to_rfpath_str(type));
344 			return _FAIL;
345 		}
346 		hal_data->trx_path_bmp = trx_path_bmp;
347 		hal_data->rf_type = trx_bmp_to_rf_type((trx_path_bmp & 0xF0) >> 4
348 			, trx_path_bmp & 0x0F);
349 	} else {
350 		/* no specific trx path is defined, use default trx_bmp */
351 		enum bb_path tx_bmp, rx_bmp;
352 
353 		rf_type_to_default_trx_bmp(type, &tx_bmp, &rx_bmp);
354 		hal_data->trx_path_bmp = (tx_bmp << 4) | rx_bmp;
355 		hal_data->rf_type = type;
356 		tx_path_num = rf_type_to_rf_tx_cnt(hal_data->rf_type);
357 		rx_path_num = rf_type_to_rf_rx_cnt(hal_data->rf_type);
358 	}
359 
360 	hal_data->NumTotalRFPath = tx_path_num;
361 	if (hal_data->NumTotalRFPath < rx_path_num)
362 		hal_data->NumTotalRFPath = rx_path_num;
363 
364 	hal_data->max_tx_cnt = hal_spec->max_tx_cnt;
365 	hal_data->max_tx_cnt = rtw_min(hal_data->max_tx_cnt, tx_path_num);
366 	if (hal_data->eeprom_max_tx_cnt)
367 		hal_data->max_tx_cnt = rtw_min(hal_data->max_tx_cnt, hal_data->eeprom_max_tx_cnt);
368 
369 	if (1)
370 		_dump_rf_path(RTW_DBGDUMP, adapter);
371 }
372 
373 	RTW_INFO("%s trx_path_bmp:0x%02x(%s), NumTotalRFPath:%u, max_tx_cnt:%u\n"
374 		, __func__
375 		, hal_data->trx_path_bmp
376 		, rf_type_to_rfpath_str(hal_data->rf_type)
377 		, hal_data->NumTotalRFPath
378 		, hal_data->max_tx_cnt);
379 
380 	return _SUCCESS;
381 }
382 
_dump_trx_nss(void * sel,_adapter * adapter)383 void _dump_trx_nss(void *sel, _adapter *adapter)
384 {
385 	struct registry_priv *regpriv = &adapter->registrypriv;
386 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
387 
388 	RTW_PRINT_SEL(sel, "[TRX_Nss] HALSPEC - tx_nss :%d, rx_nss:%d\n", hal_spec->tx_nss_num, hal_spec->rx_nss_num);
389 	RTW_PRINT_SEL(sel, "[TRX_Nss] Registry - tx_nss :%d, rx_nss:%d\n", regpriv->tx_nss, regpriv->rx_nss);
390 	RTW_PRINT_SEL(sel, "[TRX_Nss] HALDATA - tx_nss :%d, rx_nss:%d\n", GET_HAL_TX_NSS(adapter), GET_HAL_RX_NSS(adapter));
391 
392 }
393 #define NSS_VALID(nss) (nss > 0)
394 
rtw_hal_trxnss_init(_adapter * adapter)395 u8 rtw_hal_trxnss_init(_adapter *adapter)
396 {
397 	struct registry_priv *regpriv = &adapter->registrypriv;
398 	struct hal_spec_t *hal_spec = GET_HAL_SPEC(adapter);
399 	PHAL_DATA_TYPE hal_data = GET_HAL_DATA(adapter);
400 	enum rf_type rf_path = GET_HAL_RFPATH(adapter);
401 
402 	hal_data->tx_nss = hal_spec->tx_nss_num;
403 	hal_data->rx_nss = hal_spec->rx_nss_num;
404 
405 	if (NSS_VALID(regpriv->tx_nss))
406 		hal_data->tx_nss = rtw_min(hal_data->tx_nss, regpriv->tx_nss);
407 	hal_data->tx_nss = rtw_min(hal_data->tx_nss, hal_data->max_tx_cnt);
408 	if (NSS_VALID(regpriv->rx_nss))
409 		hal_data->rx_nss = rtw_min(hal_data->rx_nss, regpriv->rx_nss);
410 	hal_data->rx_nss = rtw_min(hal_data->rx_nss, rf_type_to_rf_rx_cnt(rf_path));
411 
412 	if (1)
413 		_dump_trx_nss(RTW_DBGDUMP, adapter);
414 
415 	RTW_INFO("%s tx_nss:%u, rx_nss:%u\n", __func__
416 		, hal_data->tx_nss, hal_data->rx_nss);
417 
418 	return _SUCCESS;
419 }
420 
421 #ifdef CONFIG_RTW_SW_LED
rtw_hal_sw_led_init(_adapter * padapter)422 void rtw_hal_sw_led_init(_adapter *padapter)
423 {
424 	struct led_priv *ledpriv = adapter_to_led(padapter);
425 
426 	if (ledpriv->bRegUseLed == _FALSE)
427 		return;
428 
429 	if (!is_primary_adapter(padapter))
430 		return;
431 
432 	if (padapter->hal_func.InitSwLeds) {
433 		padapter->hal_func.InitSwLeds(padapter);
434 		rtw_led_set_ctl_en_mask_primary(padapter);
435 		rtw_led_set_iface_en(padapter, 1);
436 	}
437 }
438 
rtw_hal_sw_led_deinit(_adapter * padapter)439 void rtw_hal_sw_led_deinit(_adapter *padapter)
440 {
441 	struct led_priv *ledpriv = adapter_to_led(padapter);
442 
443 	if (ledpriv->bRegUseLed == _FALSE)
444 		return;
445 
446 	if (!is_primary_adapter(padapter))
447 		return;
448 
449 	if (padapter->hal_func.DeInitSwLeds)
450 		padapter->hal_func.DeInitSwLeds(padapter);
451 }
452 #endif
453 
rtw_hal_power_on(_adapter * padapter)454 u32 rtw_hal_power_on(_adapter *padapter)
455 {
456 	u32 ret = 0;
457 	PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter);
458 
459 	ret = padapter->hal_func.hal_power_on(padapter);
460 
461 #ifdef CONFIG_BT_COEXIST
462 	if ((ret == _SUCCESS) && (pHalData->EEPROMBluetoothCoexist == _TRUE))
463 		rtw_btcoex_PowerOnSetting(padapter);
464 #endif
465 
466 	return ret;
467 }
rtw_hal_power_off(_adapter * padapter)468 void rtw_hal_power_off(_adapter *padapter)
469 {
470 	struct macid_ctl_t *macid_ctl = &padapter->dvobj->macid_ctl;
471 
472 	_rtw_memset(macid_ctl->h2c_msr, 0, MACID_NUM_SW_LIMIT);
473 	_rtw_memset(macid_ctl->op_num, 0, H2C_MSR_ROLE_MAX);
474 
475 #ifdef CONFIG_LPS_1T1R
476 	GET_HAL_DATA(padapter)->lps_1t1r = 0;
477 #endif
478 
479 #ifdef CONFIG_BT_COEXIST
480 	rtw_btcoex_PowerOffSetting(padapter);
481 #endif
482 
483 	padapter->hal_func.hal_power_off(padapter);
484 }
485 
486 
rtw_hal_init_opmode(_adapter * padapter)487 void rtw_hal_init_opmode(_adapter *padapter)
488 {
489 	NDIS_802_11_NETWORK_INFRASTRUCTURE networkType = Ndis802_11InfrastructureMax;
490 	struct  mlme_priv *pmlmepriv = &(padapter->mlmepriv);
491 	sint fw_state;
492 
493 	fw_state = get_fwstate(pmlmepriv);
494 
495 	if (fw_state & WIFI_ADHOC_STATE)
496 		networkType = Ndis802_11IBSS;
497 	else if (fw_state & WIFI_STATION_STATE)
498 		networkType = Ndis802_11Infrastructure;
499 #ifdef CONFIG_AP_MODE
500 	else if (fw_state & WIFI_AP_STATE)
501 		networkType = Ndis802_11APMode;
502 #endif
503 #ifdef CONFIG_RTW_MESH
504 	else if (fw_state & WIFI_MESH_STATE)
505 		networkType = Ndis802_11_mesh;
506 #endif
507 	else
508 		return;
509 
510 	rtw_setopmode_cmd(padapter, networkType, RTW_CMDF_DIRECTLY);
511 }
512 
513 #ifdef CONFIG_NEW_NETDEV_HDL
rtw_hal_iface_init(_adapter * adapter)514 uint rtw_hal_iface_init(_adapter *adapter)
515 {
516 	uint status = _SUCCESS;
517 
518 	rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter_mac_addr(adapter));
519 	#ifdef RTW_HALMAC
520 	rtw_hal_hw_port_enable(adapter);
521 	#endif
522 	rtw_sec_restore_wep_key(adapter);
523 	rtw_hal_init_opmode(adapter);
524 	rtw_hal_start_thread(adapter);
525 	return status;
526 }
rtw_hal_init(_adapter * padapter)527 uint rtw_hal_init(_adapter *padapter)
528 {
529 	uint status = _SUCCESS;
530 
531 	halrf_set_rfsupportability(adapter_to_phydm(padapter));
532 
533 	status = padapter->hal_func.hal_init(padapter);
534 
535 	if (status == _SUCCESS) {
536 		rtw_set_hw_init_completed(padapter, _TRUE);
537 		if (padapter->registrypriv.notch_filter == 1)
538 			rtw_hal_notch_filter(padapter, 1);
539 		rtw_led_control(padapter, LED_CTL_POWER_ON);
540 		init_hw_mlme_ext(padapter);
541 		#ifdef CONFIG_RF_POWER_TRIM
542 		rtw_bb_rf_gain_offset(padapter);
543 		#endif /*CONFIG_RF_POWER_TRIM*/
544 		GET_PRIMARY_ADAPTER(padapter)->bup = _TRUE; /*temporary*/
545 		#ifdef CONFIG_MI_WITH_MBSSID_CAM
546 		rtw_mi_set_mbid_cam(padapter);
547 		#endif
548 		#ifdef CONFIG_SUPPORT_MULTI_BCN
549 		rtw_ap_multi_bcn_cfg(padapter);
550 		#endif
551 		#if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
552 		#ifdef CONFIG_DYNAMIC_SOML
553 		rtw_dyn_soml_config(padapter);
554 		#endif
555 		#endif
556 		#ifdef CONFIG_TDMADIG
557 		rtw_phydm_tdmadig(padapter, TDMADIG_INIT);
558 		#endif/*CONFIG_TDMADIG*/
559 	} else {
560 		rtw_set_hw_init_completed(padapter, _FALSE);
561 		RTW_ERR("%s: hal_init fail\n", __func__);
562 	}
563 	return status;
564 }
565 #else
rtw_hal_init(_adapter * padapter)566 uint	 rtw_hal_init(_adapter *padapter)
567 {
568 	uint	status = _SUCCESS;
569 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
570 	int i;
571 
572 	halrf_set_rfsupportability(adapter_to_phydm(padapter));
573 
574 	status = padapter->hal_func.hal_init(padapter);
575 
576 	if (status == _SUCCESS) {
577 		rtw_set_hw_init_completed(padapter, _TRUE);
578 		rtw_mi_set_mac_addr(padapter);/*set mac addr of all ifaces*/
579 		#ifdef RTW_HALMAC
580 		rtw_restore_hw_port_cfg(padapter);
581 		#endif
582 		if (padapter->registrypriv.notch_filter == 1)
583 			rtw_hal_notch_filter(padapter, 1);
584 
585 		for (i = 0; i < dvobj->iface_nums; i++)
586 			rtw_sec_restore_wep_key(dvobj->padapters[i]);
587 
588 		rtw_led_control(padapter, LED_CTL_POWER_ON);
589 
590 		init_hw_mlme_ext(padapter);
591 
592 		rtw_hal_init_opmode(padapter);
593 
594 		#ifdef CONFIG_RF_POWER_TRIM
595 		rtw_bb_rf_gain_offset(padapter);
596 		#endif /*CONFIG_RF_POWER_TRIM*/
597 
598 		#ifdef CONFIG_SUPPORT_MULTI_BCN
599 		rtw_ap_multi_bcn_cfg(padapter);
600 		#endif
601 
602 #if (RTL8822B_SUPPORT == 1) || (RTL8192F_SUPPORT == 1)
603 #ifdef CONFIG_DYNAMIC_SOML
604 		rtw_dyn_soml_config(padapter);
605 #endif
606 #endif
607 		#ifdef CONFIG_TDMADIG
608 		rtw_phydm_tdmadig(padapter, TDMADIG_INIT);
609 		#endif/*CONFIG_TDMADIG*/
610 
611 	} else {
612 		rtw_set_hw_init_completed(padapter, _FALSE);
613 		RTW_ERR("%s: fail\n", __func__);
614 	}
615 
616 
617 	return status;
618 
619 }
620 #endif
621 
rtw_hal_deinit(_adapter * padapter)622 uint rtw_hal_deinit(_adapter *padapter)
623 {
624 	uint	status = _SUCCESS;
625 
626 	status = padapter->hal_func.hal_deinit(padapter);
627 
628 	if (status == _SUCCESS) {
629 		rtw_led_control(padapter, LED_CTL_POWER_OFF);
630 		rtw_set_hw_init_completed(padapter, _FALSE);
631 	} else
632 		RTW_INFO("\n rtw_hal_deinit: hal_init fail\n");
633 
634 
635 	return status;
636 }
637 
rtw_hal_set_hwreg(_adapter * padapter,u8 variable,u8 * val)638 u8 rtw_hal_set_hwreg(_adapter *padapter, u8 variable, u8 *val)
639 {
640 	return padapter->hal_func.set_hw_reg_handler(padapter, variable, val);
641 }
642 
rtw_hal_get_hwreg(_adapter * padapter,u8 variable,u8 * val)643 void rtw_hal_get_hwreg(_adapter *padapter, u8 variable, u8 *val)
644 {
645 	padapter->hal_func.GetHwRegHandler(padapter, variable, val);
646 }
647 
rtw_hal_set_def_var(_adapter * padapter,HAL_DEF_VARIABLE eVariable,void * pValue)648 u8 rtw_hal_set_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue)
649 {
650 	return padapter->hal_func.SetHalDefVarHandler(padapter, eVariable, pValue);
651 }
rtw_hal_get_def_var(_adapter * padapter,HAL_DEF_VARIABLE eVariable,void * pValue)652 u8 rtw_hal_get_def_var(_adapter *padapter, HAL_DEF_VARIABLE eVariable, void *pValue)
653 {
654 	return padapter->hal_func.get_hal_def_var_handler(padapter, eVariable, pValue);
655 }
656 
rtw_hal_set_odm_var(_adapter * padapter,HAL_ODM_VARIABLE eVariable,void * pValue1,BOOLEAN bSet)657 void rtw_hal_set_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, BOOLEAN bSet)
658 {
659 	padapter->hal_func.SetHalODMVarHandler(padapter, eVariable, pValue1, bSet);
660 }
rtw_hal_get_odm_var(_adapter * padapter,HAL_ODM_VARIABLE eVariable,void * pValue1,void * pValue2)661 void	rtw_hal_get_odm_var(_adapter *padapter, HAL_ODM_VARIABLE eVariable, void *pValue1, void *pValue2)
662 {
663 	padapter->hal_func.GetHalODMVarHandler(padapter, eVariable, pValue1, pValue2);
664 }
665 
666 /* FOR SDIO & PCIE */
rtw_hal_enable_interrupt(_adapter * padapter)667 void rtw_hal_enable_interrupt(_adapter *padapter)
668 {
669 #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
670 	padapter->hal_func.enable_interrupt(padapter);
671 #endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
672 }
673 
674 /* FOR SDIO & PCIE */
rtw_hal_disable_interrupt(_adapter * padapter)675 void rtw_hal_disable_interrupt(_adapter *padapter)
676 {
677 #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
678 	padapter->hal_func.disable_interrupt(padapter);
679 #endif /* #if defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
680 }
681 
682 
rtw_hal_check_ips_status(_adapter * padapter)683 u8 rtw_hal_check_ips_status(_adapter *padapter)
684 {
685 	u8 val = _FALSE;
686 	if (padapter->hal_func.check_ips_status)
687 		val = padapter->hal_func.check_ips_status(padapter);
688 	else
689 		RTW_INFO("%s: hal_func.check_ips_status is NULL!\n", __FUNCTION__);
690 
691 	return val;
692 }
693 
rtw_hal_fw_dl(_adapter * padapter,u8 wowlan)694 s32 rtw_hal_fw_dl(_adapter *padapter, u8 wowlan)
695 {
696 	s32 ret;
697 
698 	ret = padapter->hal_func.fw_dl(padapter, wowlan);
699 
700 #ifdef CONFIG_LPS_1T1R
701 	GET_HAL_DATA(padapter)->lps_1t1r = 0;
702 #endif
703 
704 	return ret;
705 }
706 
707 #ifdef RTW_HALMAC
rtw_hal_fw_mem_dl(_adapter * padapter,enum fw_mem mem)708 s32 rtw_hal_fw_mem_dl(_adapter *padapter, enum fw_mem mem)
709 {
710 	systime dlfw_start_time = rtw_get_current_time();
711 	struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
712 	struct debug_priv *pdbgpriv = &dvobj->drv_dbg;
713 	s32 rst = _FALSE;
714 
715 	rst = padapter->hal_func.fw_mem_dl(padapter, mem);
716 	RTW_INFO("%s in %dms\n", __func__, rtw_get_passing_time_ms(dlfw_start_time));
717 
718 	if (rst == _FALSE)
719 		pdbgpriv->dbg_fw_mem_dl_error_cnt++;
720 	if (1)
721 		RTW_INFO("%s dbg_fw_mem_dl_error_cnt:%d\n", __func__, pdbgpriv->dbg_fw_mem_dl_error_cnt);
722 	return rst;
723 }
724 #endif
725 
726 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
rtw_hal_clear_interrupt(_adapter * padapter)727 void rtw_hal_clear_interrupt(_adapter *padapter)
728 {
729 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
730 	padapter->hal_func.clear_interrupt(padapter);
731 #endif
732 }
733 #endif
734 
735 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
rtw_hal_inirp_init(_adapter * padapter)736 u32	rtw_hal_inirp_init(_adapter *padapter)
737 {
738 	if (is_primary_adapter(padapter))
739 		return padapter->hal_func.inirp_init(padapter);
740 	return _SUCCESS;
741 }
rtw_hal_inirp_deinit(_adapter * padapter)742 u32	rtw_hal_inirp_deinit(_adapter *padapter)
743 {
744 
745 	if (is_primary_adapter(padapter))
746 		return padapter->hal_func.inirp_deinit(padapter);
747 
748 	return _SUCCESS;
749 }
750 #endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */
751 
752 #if defined(CONFIG_PCI_HCI)
rtw_hal_irp_reset(_adapter * padapter)753 void	rtw_hal_irp_reset(_adapter *padapter)
754 {
755 	padapter->hal_func.irp_reset(GET_PRIMARY_ADAPTER(padapter));
756 }
757 
rtw_hal_pci_dbi_write(_adapter * padapter,u16 addr,u8 data)758 void rtw_hal_pci_dbi_write(_adapter *padapter, u16 addr, u8 data)
759 {
760 	u16 cmd[2];
761 
762 	cmd[0] = addr;
763 	cmd[1] = data;
764 
765 	padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_DBI, (u8 *) cmd);
766 }
767 
rtw_hal_pci_dbi_read(_adapter * padapter,u16 addr)768 u8 rtw_hal_pci_dbi_read(_adapter *padapter, u16 addr)
769 {
770 	padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_DBI, (u8 *)(&addr));
771 
772 	return (u8)addr;
773 }
774 
rtw_hal_pci_mdio_write(_adapter * padapter,u8 addr,u16 data)775 void rtw_hal_pci_mdio_write(_adapter *padapter, u8 addr, u16 data)
776 {
777 	u16 cmd[2];
778 
779 	cmd[0] = (u16)addr;
780 	cmd[1] = data;
781 
782 	padapter->hal_func.set_hw_reg_handler(padapter, HW_VAR_MDIO, (u8 *) cmd);
783 }
784 
rtw_hal_pci_mdio_read(_adapter * padapter,u8 addr)785 u16 rtw_hal_pci_mdio_read(_adapter *padapter, u8 addr)
786 {
787 	padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_MDIO, &addr);
788 
789 	return (u8)addr;
790 }
791 
rtw_hal_pci_l1off_nic_support(_adapter * padapter)792 u8 rtw_hal_pci_l1off_nic_support(_adapter *padapter)
793 {
794 	u8 l1off;
795 
796 	padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_NIC_SUPPORT, &l1off);
797 	return l1off;
798 }
799 
rtw_hal_pci_l1off_capability(_adapter * padapter)800 u8 rtw_hal_pci_l1off_capability(_adapter *padapter)
801 {
802 	u8 l1off;
803 
804 	padapter->hal_func.GetHwRegHandler(padapter, HW_VAR_L1OFF_CAPABILITY, &l1off);
805 	return l1off;
806 }
807 
808 
809 #endif /* #if defined(CONFIG_PCI_HCI) */
810 
811 /* for USB Auto-suspend */
rtw_hal_intf_ps_func(_adapter * padapter,HAL_INTF_PS_FUNC efunc_id,u8 * val)812 u8	rtw_hal_intf_ps_func(_adapter *padapter, HAL_INTF_PS_FUNC efunc_id, u8 *val)
813 {
814 	if (padapter->hal_func.interface_ps_func)
815 		return padapter->hal_func.interface_ps_func(padapter, efunc_id, val);
816 	return _FAIL;
817 }
818 
rtw_hal_xmitframe_enqueue(_adapter * padapter,struct xmit_frame * pxmitframe)819 s32	rtw_hal_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe)
820 {
821 	return padapter->hal_func.hal_xmitframe_enqueue(padapter, pxmitframe);
822 }
823 
rtw_hal_xmit(_adapter * padapter,struct xmit_frame * pxmitframe)824 s32	rtw_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe)
825 {
826 	return padapter->hal_func.hal_xmit(padapter, pxmitframe);
827 }
828 
829 /*
830  * [IMPORTANT] This function would be run in interrupt context.
831  */
rtw_hal_mgnt_xmit(_adapter * padapter,struct xmit_frame * pmgntframe)832 s32	rtw_hal_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe)
833 {
834 	s32 ret = _FAIL;
835 
836 	update_mgntframe_attrib_addr(padapter, pmgntframe);
837 
838 #if defined(CONFIG_IEEE80211W) || defined(CONFIG_RTW_MESH)
839 	if ((!MLME_IS_MESH(padapter) && SEC_IS_BIP_KEY_INSTALLED(&padapter->securitypriv) == _TRUE)
840 		#ifdef CONFIG_RTW_MESH
841 		|| (MLME_IS_MESH(padapter) && padapter->mesh_info.mesh_auth_id)
842 		#endif
843 	)
844 		rtw_mgmt_xmitframe_coalesce(padapter, pmgntframe->pkt, pmgntframe);
845 #endif
846 
847 	ret = padapter->hal_func.mgnt_xmit(padapter, pmgntframe);
848 	return ret;
849 }
850 
rtw_hal_init_xmit_priv(_adapter * padapter)851 s32	rtw_hal_init_xmit_priv(_adapter *padapter)
852 {
853 	return padapter->hal_func.init_xmit_priv(padapter);
854 }
rtw_hal_free_xmit_priv(_adapter * padapter)855 void	rtw_hal_free_xmit_priv(_adapter *padapter)
856 {
857 	padapter->hal_func.free_xmit_priv(padapter);
858 }
859 
rtw_hal_init_recv_priv(_adapter * padapter)860 s32	rtw_hal_init_recv_priv(_adapter *padapter)
861 {
862 	return padapter->hal_func.init_recv_priv(padapter);
863 }
rtw_hal_free_recv_priv(_adapter * padapter)864 void	rtw_hal_free_recv_priv(_adapter *padapter)
865 {
866 	padapter->hal_func.free_recv_priv(padapter);
867 }
868 
rtw_sta_ra_registed(_adapter * padapter,struct sta_info * psta)869 void rtw_sta_ra_registed(_adapter *padapter, struct sta_info *psta)
870 {
871 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
872 
873 	if (psta == NULL) {
874 		RTW_ERR(FUNC_ADPT_FMT" sta is NULL\n", FUNC_ADPT_ARG(padapter));
875 		rtw_warn_on(1);
876 		return;
877 	}
878 
879 #ifdef CONFIG_AP_MODE
880 	if (MLME_IS_AP(padapter) || MLME_IS_MESH(padapter)) {
881 		if (psta->cmn.aid > padapter->stapriv.max_aid) {
882 			RTW_ERR("station aid %d exceed the max number\n", psta->cmn.aid);
883 			rtw_warn_on(1);
884 			return;
885 		}
886 		rtw_ap_update_sta_ra_info(padapter, psta);
887 	}
888 #endif
889 
890 	psta->cmn.ra_info.ra_bw_mode = rtw_get_tx_bw_mode(padapter, psta);
891 	/*set correct initial date rate for each mac_id */
892 	hal_data->INIDATA_RATE[psta->cmn.mac_id] = psta->init_rate;
893 
894 	rtw_phydm_ra_registed(padapter, psta);
895 }
896 
rtw_hal_update_ra_mask(struct sta_info * psta)897 void rtw_hal_update_ra_mask(struct sta_info *psta)
898 {
899 	_adapter *padapter;
900 
901 	if (!psta)
902 		return;
903 
904 	padapter = psta->padapter;
905 	rtw_sta_ra_registed(padapter, psta);
906 }
907 
908 /*	Start specifical interface thread		*/
rtw_hal_start_thread(_adapter * padapter)909 void	rtw_hal_start_thread(_adapter *padapter)
910 {
911 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
912 #ifndef CONFIG_SDIO_TX_TASKLET
913 	padapter->hal_func.run_thread(padapter);
914 #endif
915 #endif
916 }
917 /*	Start specifical interface thread		*/
rtw_hal_stop_thread(_adapter * padapter)918 void	rtw_hal_stop_thread(_adapter *padapter)
919 {
920 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
921 #ifndef CONFIG_SDIO_TX_TASKLET
922 
923 	padapter->hal_func.cancel_thread(padapter);
924 
925 #endif
926 #endif
927 }
928 
rtw_hal_read_bbreg(_adapter * padapter,u32 RegAddr,u32 BitMask)929 u32	rtw_hal_read_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask)
930 {
931 	u32 data = 0;
932 	if (padapter->hal_func.read_bbreg)
933 		data = padapter->hal_func.read_bbreg(padapter, RegAddr, BitMask);
934 	return data;
935 }
rtw_hal_write_bbreg(_adapter * padapter,u32 RegAddr,u32 BitMask,u32 Data)936 void	rtw_hal_write_bbreg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
937 {
938 	if (padapter->hal_func.write_bbreg)
939 		padapter->hal_func.write_bbreg(padapter, RegAddr, BitMask, Data);
940 }
941 
rtw_hal_read_rfreg(_adapter * padapter,enum rf_path eRFPath,u32 RegAddr,u32 BitMask)942 u32 rtw_hal_read_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask)
943 {
944 	u32 data = 0;
945 
946 	if (padapter->hal_func.read_rfreg) {
947 		data = padapter->hal_func.read_rfreg(padapter, eRFPath, RegAddr, BitMask);
948 
949 		#ifdef DBG_IO
950 		if (match_rf_read_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) {
951 			RTW_INFO("DBG_IO rtw_hal_read_rfreg(%u, 0x%04x, 0x%08x) read:0x%08x(0x%08x)\n"
952 				, eRFPath, RegAddr, BitMask, (data << PHY_CalculateBitShift(BitMask)), data);
953 		}
954 		#endif
955 	}
956 
957 	return data;
958 }
959 
rtw_hal_write_rfreg(_adapter * padapter,enum rf_path eRFPath,u32 RegAddr,u32 BitMask,u32 Data)960 void rtw_hal_write_rfreg(_adapter *padapter, enum rf_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data)
961 {
962 	if (padapter->hal_func.write_rfreg) {
963 
964 		#ifdef DBG_IO
965 		if (match_rf_write_sniff_ranges(padapter, eRFPath, RegAddr, BitMask)) {
966 			RTW_INFO("DBG_IO rtw_hal_write_rfreg(%u, 0x%04x, 0x%08x) write:0x%08x(0x%08x)\n"
967 				, eRFPath, RegAddr, BitMask, (Data << PHY_CalculateBitShift(BitMask)), Data);
968 		}
969 		#endif
970 
971 		padapter->hal_func.write_rfreg(padapter, eRFPath, RegAddr, BitMask, Data);
972 
973 #ifdef CONFIG_PCI_HCI
974 		if (!IS_HARDWARE_TYPE_JAGUAR_AND_JAGUAR2(padapter)) /*For N-Series IC, suggest by Jenyu*/
975 			rtw_udelay_os(2);
976 #endif
977 	}
978 }
979 
980 #ifdef CONFIG_SYSON_INDIRECT_ACCESS
rtw_hal_read_syson_reg(PADAPTER padapter,u32 RegAddr,u32 BitMask)981 u32 rtw_hal_read_syson_reg(PADAPTER padapter, u32 RegAddr, u32 BitMask)
982 {
983 	u32 data = 0;
984 	if (padapter->hal_func.read_syson_reg)
985 		data = padapter->hal_func.read_syson_reg(padapter, RegAddr, BitMask);
986 
987 	return data;
988 }
989 
rtw_hal_write_syson_reg(_adapter * padapter,u32 RegAddr,u32 BitMask,u32 Data)990 void rtw_hal_write_syson_reg(_adapter *padapter, u32 RegAddr, u32 BitMask, u32 Data)
991 {
992 	if (padapter->hal_func.write_syson_reg)
993 		padapter->hal_func.write_syson_reg(padapter, RegAddr, BitMask, Data);
994 }
995 #endif
996 
997 #if defined(CONFIG_PCI_HCI)
rtw_hal_interrupt_handler(_adapter * padapter)998 s32	rtw_hal_interrupt_handler(_adapter *padapter)
999 {
1000 	s32 ret = _FAIL;
1001 	ret = padapter->hal_func.interrupt_handler(padapter);
1002 	return ret;
1003 }
1004 
rtw_hal_unmap_beacon_icf(_adapter * padapter)1005 void	rtw_hal_unmap_beacon_icf(_adapter *padapter)
1006 {
1007 	padapter->hal_func.unmap_beacon_icf(padapter);
1008 }
1009 #endif
1010 #if defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT)
rtw_hal_interrupt_handler(_adapter * padapter,u16 pkt_len,u8 * pbuf)1011 void	rtw_hal_interrupt_handler(_adapter *padapter, u16 pkt_len, u8 *pbuf)
1012 {
1013 	padapter->hal_func.interrupt_handler(padapter, pkt_len, pbuf);
1014 }
1015 #endif
1016 
rtw_hal_set_chnl_bw(_adapter * padapter,u8 channel,enum channel_width Bandwidth,u8 Offset40,u8 Offset80)1017 void	rtw_hal_set_chnl_bw(_adapter *padapter, u8 channel, enum channel_width Bandwidth, u8 Offset40, u8 Offset80)
1018 {
1019 	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(padapter);
1020 	/*u8 cch_160 = Bandwidth == CHANNEL_WIDTH_160 ? channel : 0;*/
1021 	u8 cch_80 = Bandwidth == CHANNEL_WIDTH_80 ? channel : 0;
1022 	u8 cch_40 = Bandwidth == CHANNEL_WIDTH_40 ? channel : 0;
1023 	u8 cch_20 = Bandwidth == CHANNEL_WIDTH_20 ? channel : 0;
1024 
1025 	if (rtw_phydm_is_iqk_in_progress(padapter))
1026 		RTW_ERR("%s, %d, IQK may race condition\n", __func__, __LINE__);
1027 
1028 #ifdef CONFIG_MP_INCLUDED
1029 	/* MP mode channel don't use secondary channel */
1030 	if (rtw_mp_mode_check(padapter) == _FALSE)
1031 #endif
1032 	{
1033 		#if 0
1034 		if (cch_160 != 0)
1035 			cch_80 = rtw_get_scch_by_cch_offset(cch_160, CHANNEL_WIDTH_160, Offset80);
1036 		#endif
1037 		if (cch_80 != 0)
1038 			cch_40 = rtw_get_scch_by_cch_offset(cch_80, CHANNEL_WIDTH_80, Offset80);
1039 		if (cch_40 != 0)
1040 			cch_20 = rtw_get_scch_by_cch_offset(cch_40, CHANNEL_WIDTH_40, Offset40);
1041 	}
1042 
1043 	pHalData->cch_80 = cch_80;
1044 	pHalData->cch_40 = cch_40;
1045 	pHalData->cch_20 = cch_20;
1046 
1047 	if (0)
1048 		RTW_INFO("%s cch:%u, %s, offset40:%u, offset80:%u (%u, %u, %u)\n", __func__
1049 			, channel, ch_width_str(Bandwidth), Offset40, Offset80
1050 			, pHalData->cch_80, pHalData->cch_40, pHalData->cch_20);
1051 
1052 	padapter->hal_func.set_chnl_bw_handler(padapter, channel, Bandwidth, Offset40, Offset80);
1053 }
1054 
rtw_hal_dm_watchdog(_adapter * padapter)1055 void	rtw_hal_dm_watchdog(_adapter *padapter)
1056 {
1057 
1058 	rtw_hal_turbo_edca(padapter);
1059 	padapter->hal_func.hal_dm_watchdog(padapter);
1060 }
1061 
1062 #ifdef CONFIG_LPS_LCLK_WD_TIMER
rtw_hal_dm_watchdog_in_lps(_adapter * padapter)1063 void	rtw_hal_dm_watchdog_in_lps(_adapter *padapter)
1064 {
1065 #if defined(CONFIG_CONCURRENT_MODE)
1066 #ifndef CONFIG_FW_MULTI_PORT_SUPPORT
1067 	if (padapter->hw_port != HW_PORT0)
1068 		return;
1069 #endif
1070 #endif
1071 
1072 	if (adapter_to_pwrctl(padapter)->bFwCurrentInPSMode == _TRUE)
1073 		rtw_phydm_watchdog_in_lps_lclk(padapter);/* this function caller is in interrupt context */
1074 }
1075 #endif /*CONFIG_LPS_LCLK_WD_TIMER*/
1076 
rtw_hal_bcn_related_reg_setting(_adapter * padapter)1077 void rtw_hal_bcn_related_reg_setting(_adapter *padapter)
1078 {
1079 	padapter->hal_func.SetBeaconRelatedRegistersHandler(padapter);
1080 }
1081 
1082 #ifdef CONFIG_HOSTAPD_MLME
rtw_hal_hostap_mgnt_xmit_entry(_adapter * padapter,_pkt * pkt)1083 s32	rtw_hal_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt)
1084 {
1085 	if (padapter->hal_func.hostap_mgnt_xmit_entry)
1086 		return padapter->hal_func.hostap_mgnt_xmit_entry(padapter, pkt);
1087 	return _FAIL;
1088 }
1089 #endif /* CONFIG_HOSTAPD_MLME */
1090 
1091 #ifdef DBG_CONFIG_ERROR_DETECT
rtw_hal_sreset_init(_adapter * padapter)1092 void	rtw_hal_sreset_init(_adapter *padapter)
1093 {
1094 	padapter->hal_func.sreset_init_value(padapter);
1095 }
rtw_hal_sreset_reset(_adapter * padapter)1096 void rtw_hal_sreset_reset(_adapter *padapter)
1097 {
1098 	padapter = GET_PRIMARY_ADAPTER(padapter);
1099 	padapter->hal_func.silentreset(padapter);
1100 }
1101 
rtw_hal_sreset_reset_value(_adapter * padapter)1102 void rtw_hal_sreset_reset_value(_adapter *padapter)
1103 {
1104 	padapter->hal_func.sreset_reset_value(padapter);
1105 }
1106 
rtw_hal_sreset_xmit_status_check(_adapter * padapter)1107 void rtw_hal_sreset_xmit_status_check(_adapter *padapter)
1108 {
1109 	padapter->hal_func.sreset_xmit_status_check(padapter);
1110 }
rtw_hal_sreset_linked_status_check(_adapter * padapter)1111 void rtw_hal_sreset_linked_status_check(_adapter *padapter)
1112 {
1113 	padapter->hal_func.sreset_linked_status_check(padapter);
1114 }
rtw_hal_sreset_get_wifi_status(_adapter * padapter)1115 u8   rtw_hal_sreset_get_wifi_status(_adapter *padapter)
1116 {
1117 	return padapter->hal_func.sreset_get_wifi_status(padapter);
1118 }
1119 
rtw_hal_sreset_inprogress(_adapter * padapter)1120 bool rtw_hal_sreset_inprogress(_adapter *padapter)
1121 {
1122 	padapter = GET_PRIMARY_ADAPTER(padapter);
1123 	return padapter->hal_func.sreset_inprogress(padapter);
1124 }
1125 #endif /* DBG_CONFIG_ERROR_DETECT */
1126 
1127 #ifdef CONFIG_IOL
rtw_hal_iol_cmd(ADAPTER * adapter,struct xmit_frame * xmit_frame,u32 max_waiting_ms,u32 bndy_cnt)1128 int rtw_hal_iol_cmd(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_waiting_ms, u32 bndy_cnt)
1129 {
1130 	if (adapter->hal_func.IOL_exec_cmds_sync)
1131 		return adapter->hal_func.IOL_exec_cmds_sync(adapter, xmit_frame, max_waiting_ms, bndy_cnt);
1132 	return _FAIL;
1133 }
1134 #endif
1135 
1136 #ifdef CONFIG_XMIT_THREAD_MODE
rtw_hal_xmit_thread_handler(_adapter * padapter)1137 s32 rtw_hal_xmit_thread_handler(_adapter *padapter)
1138 {
1139 	return padapter->hal_func.xmit_thread_handler(padapter);
1140 }
1141 #endif
1142 
1143 #ifdef CONFIG_RECV_THREAD_MODE
rtw_hal_recv_hdl(_adapter * adapter)1144 s32 rtw_hal_recv_hdl(_adapter *adapter)
1145 {
1146 	return adapter->hal_func.recv_hdl(adapter);
1147 }
1148 #endif
1149 
rtw_hal_notch_filter(_adapter * adapter,bool enable)1150 void rtw_hal_notch_filter(_adapter *adapter, bool enable)
1151 {
1152 	if (adapter->hal_func.hal_notch_filter)
1153 		adapter->hal_func.hal_notch_filter(adapter, enable);
1154 }
1155 
1156 #ifdef CONFIG_FW_C2H_REG
rtw_hal_c2h_valid(_adapter * adapter,u8 * buf)1157 inline bool rtw_hal_c2h_valid(_adapter *adapter, u8 *buf)
1158 {
1159 	HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
1160 	bool ret = _FAIL;
1161 
1162 	ret = C2H_ID_88XX(buf) || C2H_PLEN_88XX(buf);
1163 
1164 	return ret;
1165 }
1166 
rtw_hal_c2h_evt_read(_adapter * adapter,u8 * buf)1167 inline s32 rtw_hal_c2h_evt_read(_adapter *adapter, u8 *buf)
1168 {
1169 	HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
1170 	s32 ret = _FAIL;
1171 
1172 	ret = c2h_evt_read_88xx(adapter, buf);
1173 
1174 	return ret;
1175 }
1176 
rtw_hal_c2h_reg_hdr_parse(_adapter * adapter,u8 * buf,u8 * id,u8 * seq,u8 * plen,u8 ** payload)1177 bool rtw_hal_c2h_reg_hdr_parse(_adapter *adapter, u8 *buf, u8 *id, u8 *seq, u8 *plen, u8 **payload)
1178 {
1179 	HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
1180 	bool ret = _FAIL;
1181 
1182 	*id = C2H_ID_88XX(buf);
1183 	*seq = C2H_SEQ_88XX(buf);
1184 	*plen = C2H_PLEN_88XX(buf);
1185 	*payload = C2H_PAYLOAD_88XX(buf);
1186 	ret = _SUCCESS;
1187 
1188 	return ret;
1189 }
1190 #endif /* CONFIG_FW_C2H_REG */
1191 
1192 #ifdef CONFIG_FW_C2H_PKT
rtw_hal_c2h_pkt_hdr_parse(_adapter * adapter,u8 * buf,u16 len,u8 * id,u8 * seq,u8 * plen,u8 ** payload)1193 bool rtw_hal_c2h_pkt_hdr_parse(_adapter *adapter, u8 *buf, u16 len, u8 *id, u8 *seq, u8 *plen, u8 **payload)
1194 {
1195 	HAL_DATA_TYPE *HalData = GET_HAL_DATA(adapter);
1196 	bool ret = _FAIL;
1197 
1198 	if (!buf || len > 256 || len < 3)
1199 		goto exit;
1200 
1201 	*id = C2H_ID_88XX(buf);
1202 	*seq = C2H_SEQ_88XX(buf);
1203 	*plen = len - 2;
1204 	*payload = C2H_PAYLOAD_88XX(buf);
1205 	ret = _SUCCESS;
1206 
1207 exit:
1208 	return ret;
1209 }
1210 #endif /* CONFIG_FW_C2H_PKT */
1211 
1212 #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
1213 #include <rtw_bt_mp.h> /* for MPTBT_FwC2hBtMpCtrl */
1214 #endif
c2h_handler(_adapter * adapter,u8 id,u8 seq,u8 plen,u8 * payload)1215 s32 c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
1216 {
1217 	u8 sub_id = 0;
1218 	s32 ret = _SUCCESS;
1219 
1220 	switch (id) {
1221 	case C2H_FW_SCAN_COMPLETE:
1222 		RTW_INFO("[C2H], FW Scan Complete\n");
1223 		break;
1224 
1225 #ifdef CONFIG_BT_COEXIST
1226 	case C2H_BT_INFO:
1227 		rtw_btcoex_BtInfoNotify(adapter, plen, payload);
1228 		break;
1229 	case C2H_BT_MP_INFO:
1230 		#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_RTL8723B)
1231 		MPTBT_FwC2hBtMpCtrl(adapter, payload, plen);
1232 		#endif
1233 		rtw_btcoex_BtMpRptNotify(adapter, plen, payload);
1234 		break;
1235 	case C2H_MAILBOX_STATUS:
1236 		RTW_DBG_DUMP("C2H_MAILBOX_STATUS: ", payload, plen);
1237 		break;
1238 	case C2H_WLAN_INFO:
1239 		rtw_btcoex_WlFwDbgInfoNotify(adapter, payload, plen);
1240 		break;
1241 #endif /* CONFIG_BT_COEXIST */
1242 
1243 	case C2H_IQK_FINISH:
1244 		c2h_iqk_offload(adapter, payload, plen);
1245 		break;
1246 
1247 #if defined(CONFIG_TDLS) && defined(CONFIG_TDLS_CH_SW)
1248 	case C2H_FW_CHNL_SWITCH_COMPLETE:
1249 		rtw_tdls_chsw_oper_done(adapter);
1250 		break;
1251 	case C2H_BCN_EARLY_RPT:
1252 		rtw_tdls_ch_sw_back_to_base_chnl(adapter);
1253 		break;
1254 #endif
1255 
1256 #ifdef CONFIG_MCC_MODE
1257 	case C2H_MCC:
1258 		rtw_hal_mcc_c2h_handler(adapter, plen, payload);
1259 		break;
1260 #endif
1261 
1262 #ifdef CONFIG_RTW_MAC_HIDDEN_RPT
1263 	case C2H_MAC_HIDDEN_RPT:
1264 		c2h_mac_hidden_rpt_hdl(adapter, payload, plen);
1265 		break;
1266 	case C2H_MAC_HIDDEN_RPT_2:
1267 		c2h_mac_hidden_rpt_2_hdl(adapter, payload, plen);
1268 		break;
1269 #endif
1270 
1271 	case C2H_DEFEATURE_DBG:
1272 		c2h_defeature_dbg_hdl(adapter, payload, plen);
1273 		break;
1274 
1275 #ifdef CONFIG_RTW_CUSTOMER_STR
1276 	case C2H_CUSTOMER_STR_RPT:
1277 		c2h_customer_str_rpt_hdl(adapter, payload, plen);
1278 		break;
1279 	case C2H_CUSTOMER_STR_RPT_2:
1280 		c2h_customer_str_rpt_2_hdl(adapter, payload, plen);
1281 		break;
1282 #endif
1283 #ifdef RTW_PER_CMD_SUPPORT_FW
1284 	case C2H_PER_RATE_RPT:
1285 		c2h_per_rate_rpt_hdl(adapter, payload, plen);
1286 		break;
1287 #endif
1288 #ifdef CONFIG_LPS_ACK
1289 	case C2H_LPS_STATUS_RPT:
1290 		c2h_lps_status_rpt(adapter, payload, plen);
1291 		break;
1292 #endif
1293 	case C2H_EXTEND:
1294 		sub_id = payload[0];
1295 		/* no handle, goto default */
1296 		/* fall through */
1297 	default:
1298 		if (phydm_c2H_content_parsing(adapter_to_phydm(adapter), id, plen, payload) != TRUE)
1299 			ret = _FAIL;
1300 		break;
1301 	}
1302 
1303 	if (ret != _SUCCESS) {
1304 		if (id == C2H_EXTEND)
1305 			RTW_WARN("%s: unknown C2H(0x%02x, 0x%02x)\n", __func__, id, sub_id);
1306 		else
1307 			RTW_WARN("%s: unknown C2H(0x%02x)\n", __func__, id);
1308 	}
1309 
1310 	return ret;
1311 }
1312 
1313 #ifndef RTW_HALMAC
rtw_hal_c2h_handler(_adapter * adapter,u8 id,u8 seq,u8 plen,u8 * payload)1314 s32 rtw_hal_c2h_handler(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
1315 {
1316 	s32 ret = _FAIL;
1317 
1318 	ret = adapter->hal_func.c2h_handler(adapter, id, seq, plen, payload);
1319 	if (ret != _SUCCESS)
1320 		ret = c2h_handler(adapter, id, seq, plen, payload);
1321 
1322 	return ret;
1323 }
1324 
rtw_hal_c2h_id_handle_directly(_adapter * adapter,u8 id,u8 seq,u8 plen,u8 * payload)1325 s32 rtw_hal_c2h_id_handle_directly(_adapter *adapter, u8 id, u8 seq, u8 plen, u8 *payload)
1326 {
1327 	switch (id) {
1328 	case C2H_CCX_TX_RPT:
1329 	case C2H_BT_MP_INFO:
1330 	case C2H_FW_CHNL_SWITCH_COMPLETE:
1331 	case C2H_IQK_FINISH:
1332 	case C2H_MCC:
1333 	case C2H_BCN_EARLY_RPT:
1334 	case C2H_AP_REQ_TXRPT:
1335 	case C2H_SPC_STAT:
1336 		return _TRUE;
1337 	default:
1338 		return _FALSE;
1339 	}
1340 }
1341 #endif /* !RTW_HALMAC */
1342 
rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter)1343 s32 rtw_hal_is_disable_sw_channel_plan(PADAPTER padapter)
1344 {
1345 	return GET_HAL_DATA(padapter)->bDisableSWChannelPlan;
1346 }
1347 
1348 #ifdef CONFIG_PROTSEL_MACSLEEP
_rtw_hal_macid_sleep(_adapter * adapter,u8 macid,u8 sleep)1349 static s32 _rtw_hal_macid_sleep(_adapter *adapter, u8 macid, u8 sleep)
1350 {
1351 	struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
1352 	u16 reg_sleep_info = macid_ctl->reg_sleep_info;
1353 	u16 reg_sleep_ctrl = macid_ctl->reg_sleep_ctrl;
1354 	const u32 sel_mask_sel = BIT(0) | BIT(1) | BIT(2);
1355 	u8 bit_shift;
1356 	u32 val32;
1357 	s32 ret = _FAIL;
1358 
1359 	if (macid >= macid_ctl->num) {
1360 		RTW_ERR(ADPT_FMT" %s invalid macid(%u)\n"
1361 			, ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" , macid);
1362 		goto exit;
1363 	}
1364 
1365 	if (macid < 32) {
1366 		bit_shift = macid;
1367 	#if (MACID_NUM_SW_LIMIT > 32)
1368 	} else if (macid < 64) {
1369 		bit_shift = macid - 32;
1370 	#endif
1371 	#if (MACID_NUM_SW_LIMIT > 64)
1372 	} else if (macid < 96) {
1373 		bit_shift = macid - 64;
1374 	#endif
1375 	#if (MACID_NUM_SW_LIMIT > 96)
1376 	} else if (macid < 128) {
1377 		bit_shift = macid - 96;
1378 	#endif
1379 	} else {
1380 		rtw_warn_on(1);
1381 		goto exit;
1382 	}
1383 
1384 	if (!reg_sleep_ctrl || !reg_sleep_info) {
1385 		rtw_warn_on(1);
1386 		goto exit;
1387 	}
1388 
1389 	val32 = rtw_read32(adapter, reg_sleep_ctrl);
1390 	val32 = (val32 &~sel_mask_sel) | ((macid / 32) & sel_mask_sel);
1391 	rtw_write32(adapter, reg_sleep_ctrl, val32);
1392 
1393 	val32 = rtw_read32(adapter, reg_sleep_info);
1394 	RTW_INFO(ADPT_FMT" %s macid=%d, ori reg_0x%03x=0x%08x\n"
1395 		, ADPT_ARG(adapter), sleep ? "sleep" : "wakeup"
1396 		, macid, reg_sleep_info, val32);
1397 
1398 	ret = _SUCCESS;
1399 
1400 	if (sleep) {
1401 		if (val32 & BIT(bit_shift))
1402 			goto exit;
1403 		val32 |= BIT(bit_shift);
1404 	} else {
1405 		if (!(val32 & BIT(bit_shift)))
1406 			goto exit;
1407 		val32 &= ~BIT(bit_shift);
1408 	}
1409 
1410 	rtw_write32(adapter, reg_sleep_info, val32);
1411 
1412 exit:
1413 	return ret;
1414 }
1415 #else
_rtw_hal_macid_sleep(_adapter * adapter,u8 macid,u8 sleep)1416 static s32 _rtw_hal_macid_sleep(_adapter *adapter, u8 macid, u8 sleep)
1417 {
1418 	struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
1419 	u16 reg_sleep;
1420 	u8 bit_shift;
1421 	u32 val32;
1422 	s32 ret = _FAIL;
1423 
1424 	if (macid >= macid_ctl->num) {
1425 		RTW_ERR(ADPT_FMT" %s invalid macid(%u)\n"
1426 			, ADPT_ARG(adapter), sleep ? "sleep" : "wakeup" , macid);
1427 		goto exit;
1428 	}
1429 
1430 	if (macid < 32) {
1431 		reg_sleep = macid_ctl->reg_sleep_m0;
1432 		bit_shift = macid;
1433 	#if (MACID_NUM_SW_LIMIT > 32)
1434 	} else if (macid < 64) {
1435 		reg_sleep = macid_ctl->reg_sleep_m1;
1436 		bit_shift = macid - 32;
1437 	#endif
1438 	#if (MACID_NUM_SW_LIMIT > 64)
1439 	} else if (macid < 96) {
1440 		reg_sleep = macid_ctl->reg_sleep_m2;
1441 		bit_shift = macid - 64;
1442 	#endif
1443 	#if (MACID_NUM_SW_LIMIT > 96)
1444 	} else if (macid < 128) {
1445 		reg_sleep = macid_ctl->reg_sleep_m3;
1446 		bit_shift = macid - 96;
1447 	#endif
1448 	} else {
1449 		rtw_warn_on(1);
1450 		goto exit;
1451 	}
1452 
1453 	if (!reg_sleep) {
1454 		rtw_warn_on(1);
1455 		goto exit;
1456 	}
1457 
1458 	val32 = rtw_read32(adapter, reg_sleep);
1459 	RTW_INFO(ADPT_FMT" %s macid=%d, ori reg_0x%03x=0x%08x\n"
1460 		, ADPT_ARG(adapter), sleep ? "sleep" : "wakeup"
1461 		, macid, reg_sleep, val32);
1462 
1463 	ret = _SUCCESS;
1464 
1465 	if (sleep) {
1466 		if (val32 & BIT(bit_shift))
1467 			goto exit;
1468 		val32 |= BIT(bit_shift);
1469 	} else {
1470 		if (!(val32 & BIT(bit_shift)))
1471 			goto exit;
1472 		val32 &= ~BIT(bit_shift);
1473 	}
1474 
1475 	rtw_write32(adapter, reg_sleep, val32);
1476 
1477 exit:
1478 	return ret;
1479 }
1480 #endif
1481 
rtw_hal_macid_sleep(_adapter * adapter,u8 macid)1482 inline s32 rtw_hal_macid_sleep(_adapter *adapter, u8 macid)
1483 {
1484 	return _rtw_hal_macid_sleep(adapter, macid, 1);
1485 }
1486 
rtw_hal_macid_wakeup(_adapter * adapter,u8 macid)1487 inline s32 rtw_hal_macid_wakeup(_adapter *adapter, u8 macid)
1488 {
1489 	return _rtw_hal_macid_sleep(adapter, macid, 0);
1490 }
1491 
1492 #ifdef CONFIG_PROTSEL_MACSLEEP
_rtw_hal_macid_bmp_sleep(_adapter * adapter,struct macid_bmp * bmp,u8 sleep)1493 static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8 sleep)
1494 {
1495 	struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
1496 	u16 reg_sleep_info = macid_ctl->reg_sleep_info;
1497 	u16 reg_sleep_ctrl = macid_ctl->reg_sleep_ctrl;
1498 	const u32 sel_mask_sel = BIT(0) | BIT(1) | BIT(2);
1499 	u32 m;
1500 	u8 mid = 0;
1501 	u32 val32;
1502 
1503 	do {
1504 		if (mid == 0) {
1505 			m = bmp->m0;
1506 		#if (MACID_NUM_SW_LIMIT > 32)
1507 		} else if (mid == 1) {
1508 			m = bmp->m1;
1509 		#endif
1510 		#if (MACID_NUM_SW_LIMIT > 64)
1511 		} else if (mid == 2) {
1512 			m = bmp->m2;
1513 		#endif
1514 		#if (MACID_NUM_SW_LIMIT > 96)
1515 		} else if (mid == 3) {
1516 			m = bmp->m3;
1517 		#endif
1518 		} else {
1519 			rtw_warn_on(1);
1520 			break;
1521 		}
1522 
1523 		if (m == 0)
1524 			goto move_next;
1525 
1526 		if (!reg_sleep_ctrl || !reg_sleep_info) {
1527 			rtw_warn_on(1);
1528 			break;
1529 		}
1530 
1531 		val32 = rtw_read32(adapter, reg_sleep_ctrl);
1532 		val32 = (val32 &~sel_mask_sel) | (mid & sel_mask_sel);
1533 		rtw_write32(adapter, reg_sleep_ctrl, val32);
1534 
1535 		val32 = rtw_read32(adapter, reg_sleep_info);
1536 		RTW_INFO(ADPT_FMT" %s m%u=0x%08x, ori reg_0x%03x=0x%08x\n"
1537 			, ADPT_ARG(adapter), sleep ? "sleep" : "wakeup"
1538 			, mid, m, reg_sleep_info, val32);
1539 
1540 		if (sleep) {
1541 			if ((val32 & m) == m)
1542 				goto move_next;
1543 			val32 |= m;
1544 		} else {
1545 			if ((val32 & m) == 0)
1546 				goto move_next;
1547 			val32 &= ~m;
1548 		}
1549 
1550 		rtw_write32(adapter, reg_sleep_info, val32);
1551 
1552 move_next:
1553 		mid++;
1554 	} while (mid * 32 < MACID_NUM_SW_LIMIT);
1555 
1556 	return _SUCCESS;
1557 }
1558 #else
_rtw_hal_macid_bmp_sleep(_adapter * adapter,struct macid_bmp * bmp,u8 sleep)1559 static s32 _rtw_hal_macid_bmp_sleep(_adapter *adapter, struct macid_bmp *bmp, u8 sleep)
1560 {
1561 	struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
1562 	u16 reg_sleep;
1563 	u32 m;
1564 	u8 mid = 0;
1565 	u32 val32;
1566 
1567 	do {
1568 		if (mid == 0) {
1569 			m = bmp->m0;
1570 			reg_sleep = macid_ctl->reg_sleep_m0;
1571 		#if (MACID_NUM_SW_LIMIT > 32)
1572 		} else if (mid == 1) {
1573 			m = bmp->m1;
1574 			reg_sleep = macid_ctl->reg_sleep_m1;
1575 		#endif
1576 		#if (MACID_NUM_SW_LIMIT > 64)
1577 		} else if (mid == 2) {
1578 			m = bmp->m2;
1579 			reg_sleep = macid_ctl->reg_sleep_m2;
1580 		#endif
1581 		#if (MACID_NUM_SW_LIMIT > 96)
1582 		} else if (mid == 3) {
1583 			m = bmp->m3;
1584 			reg_sleep = macid_ctl->reg_sleep_m3;
1585 		#endif
1586 		} else {
1587 			rtw_warn_on(1);
1588 			break;
1589 		}
1590 
1591 		if (m == 0)
1592 			goto move_next;
1593 
1594 		if (!reg_sleep) {
1595 			rtw_warn_on(1);
1596 			break;
1597 		}
1598 
1599 		val32 = rtw_read32(adapter, reg_sleep);
1600 		RTW_INFO(ADPT_FMT" %s m%u=0x%08x, ori reg_0x%03x=0x%08x\n"
1601 			, ADPT_ARG(adapter), sleep ? "sleep" : "wakeup"
1602 			, mid, m, reg_sleep, val32);
1603 
1604 		if (sleep) {
1605 			if ((val32 & m) == m)
1606 				goto move_next;
1607 			val32 |= m;
1608 		} else {
1609 			if ((val32 & m) == 0)
1610 				goto move_next;
1611 			val32 &= ~m;
1612 		}
1613 
1614 		rtw_write32(adapter, reg_sleep, val32);
1615 
1616 move_next:
1617 		mid++;
1618 	} while (mid * 32 < MACID_NUM_SW_LIMIT);
1619 
1620 	return _SUCCESS;
1621 }
1622 #endif
1623 
rtw_hal_macid_sleep_all_used(_adapter * adapter)1624 inline s32 rtw_hal_macid_sleep_all_used(_adapter *adapter)
1625 {
1626 	struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
1627 
1628 	return _rtw_hal_macid_bmp_sleep(adapter, &macid_ctl->used, 1);
1629 }
1630 
rtw_hal_macid_wakeup_all_used(_adapter * adapter)1631 inline s32 rtw_hal_macid_wakeup_all_used(_adapter *adapter)
1632 {
1633 	struct macid_ctl_t *macid_ctl = adapter_to_macidctl(adapter);
1634 
1635 	return _rtw_hal_macid_bmp_sleep(adapter, &macid_ctl->used, 0);
1636 }
1637 
rtw_hal_fill_h2c_cmd(PADAPTER padapter,u8 ElementID,u32 CmdLen,u8 * pCmdBuffer)1638 s32 rtw_hal_fill_h2c_cmd(PADAPTER padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer)
1639 {
1640 	_adapter *pri_adapter = GET_PRIMARY_ADAPTER(padapter);
1641 
1642 	if (GET_HAL_DATA(pri_adapter)->bFWReady == _TRUE)
1643 		return padapter->hal_func.fill_h2c_cmd(padapter, ElementID, CmdLen, pCmdBuffer);
1644 	else if (padapter->registrypriv.mp_mode == 0)
1645 		RTW_PRINT(FUNC_ADPT_FMT" FW doesn't exit when no MP mode, by pass H2C id:0x%02x\n"
1646 			  , FUNC_ADPT_ARG(padapter), ElementID);
1647 	return _FAIL;
1648 }
1649 
rtw_hal_fill_fake_txdesc(_adapter * padapter,u8 * pDesc,u32 BufferLen,u8 IsPsPoll,u8 IsBTQosNull,u8 bDataFrame)1650 void rtw_hal_fill_fake_txdesc(_adapter *padapter, u8 *pDesc, u32 BufferLen,
1651 			      u8 IsPsPoll, u8 IsBTQosNull, u8 bDataFrame)
1652 {
1653 	padapter->hal_func.fill_fake_txdesc(padapter, pDesc, BufferLen, IsPsPoll, IsBTQosNull, bDataFrame);
1654 
1655 }
1656 
rtw_hal_get_txbuff_rsvd_page_num(_adapter * adapter,bool wowlan)1657 u8 rtw_hal_get_txbuff_rsvd_page_num(_adapter *adapter, bool wowlan)
1658 {
1659 	u8 num = 0;
1660 
1661 
1662 	if (adapter->hal_func.hal_get_tx_buff_rsvd_page_num) {
1663 		num = adapter->hal_func.hal_get_tx_buff_rsvd_page_num(adapter, wowlan);
1664 	} else {
1665 #ifdef RTW_HALMAC
1666 		num = GET_HAL_DATA(adapter)->drv_rsvd_page_number;
1667 #endif /* RTW_HALMAC */
1668 	}
1669 
1670 	return num;
1671 }
1672 
1673 #ifdef CONFIG_GPIO_API
rtw_hal_update_hisr_hsisr_ind(_adapter * padapter,u32 flag)1674 void rtw_hal_update_hisr_hsisr_ind(_adapter *padapter, u32 flag)
1675 {
1676 	if (padapter->hal_func.update_hisr_hsisr_ind)
1677 		padapter->hal_func.update_hisr_hsisr_ind(padapter, flag);
1678 }
1679 
rtw_hal_gpio_func_check(_adapter * padapter,u8 gpio_num)1680 int rtw_hal_gpio_func_check(_adapter *padapter, u8 gpio_num)
1681 {
1682 	int ret = _SUCCESS;
1683 
1684 	if (padapter->hal_func.hal_gpio_func_check)
1685 		ret = padapter->hal_func.hal_gpio_func_check(padapter, gpio_num);
1686 
1687 	return ret;
1688 }
1689 
rtw_hal_gpio_multi_func_reset(_adapter * padapter,u8 gpio_num)1690 void rtw_hal_gpio_multi_func_reset(_adapter *padapter, u8 gpio_num)
1691 {
1692 	if (padapter->hal_func.hal_gpio_multi_func_reset)
1693 		padapter->hal_func.hal_gpio_multi_func_reset(padapter, gpio_num);
1694 }
1695 #endif
1696 
1697 #ifdef CONFIG_FW_CORRECT_BCN
rtw_hal_fw_correct_bcn(_adapter * padapter)1698 void rtw_hal_fw_correct_bcn(_adapter *padapter)
1699 {
1700 	if (padapter->hal_func.fw_correct_bcn)
1701 		padapter->hal_func.fw_correct_bcn(padapter);
1702 }
1703 #endif
1704 
rtw_hal_set_tx_power_level(_adapter * adapter,u8 channel)1705 void rtw_hal_set_tx_power_level(_adapter *adapter, u8 channel)
1706 {
1707 	if (phy_chk_ch_setting_consistency(adapter, channel) != _SUCCESS)
1708 		return;
1709 
1710 	adapter->hal_func.set_tx_power_level_handler(adapter, channel);
1711 	rtw_hal_set_txpwr_done(adapter);
1712 }
1713 
rtw_hal_update_txpwr_level(_adapter * adapter)1714 void rtw_hal_update_txpwr_level(_adapter *adapter)
1715 {
1716 	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
1717 
1718 	rtw_hal_set_tx_power_level(adapter, hal_data->current_channel);
1719 }
1720 
rtw_hal_set_txpwr_done(_adapter * adapter)1721 void rtw_hal_set_txpwr_done(_adapter *adapter)
1722 {
1723 	if (adapter->hal_func.set_txpwr_done)
1724 		adapter->hal_func.set_txpwr_done(adapter);
1725 }
1726 
rtw_hal_set_tx_power_index(_adapter * adapter,u32 powerindex,enum rf_path rfpath,u8 rate)1727 void rtw_hal_set_tx_power_index(_adapter *adapter, u32 powerindex
1728 	, enum rf_path rfpath, u8 rate)
1729 {
1730 	adapter->hal_func.set_tx_power_index_handler(adapter, powerindex, rfpath, rate);
1731 }
1732 
rtw_hal_get_tx_power_index(_adapter * adapter,enum rf_path rfpath,RATE_SECTION rs,enum MGN_RATE rate,enum channel_width bw,BAND_TYPE band,u8 cch,u8 opch,struct txpwr_idx_comp * tic)1733 u8 rtw_hal_get_tx_power_index(_adapter *adapter, enum rf_path rfpath
1734 	, RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch, u8 opch
1735 	, struct txpwr_idx_comp *tic)
1736 {
1737 	return adapter->hal_func.get_tx_power_index_handler(adapter, rfpath
1738 		, rs, rate, bw, band, cch, opch, tic);
1739 }
1740 
rtw_hal_get_txpwr_target_extra_bias(_adapter * adapter,enum rf_path rfpath,RATE_SECTION rs,enum MGN_RATE rate,enum channel_width bw,BAND_TYPE band,u8 cch)1741 s8 rtw_hal_get_txpwr_target_extra_bias(_adapter *adapter, enum rf_path rfpath
1742 	, RATE_SECTION rs, enum MGN_RATE rate, enum channel_width bw, BAND_TYPE band, u8 cch)
1743 {
1744 	s8 val = 0;
1745 
1746 	if (adapter->hal_func.get_txpwr_target_extra_bias) {
1747 		val = adapter->hal_func.get_txpwr_target_extra_bias(adapter
1748 				, rfpath, rs, rate, bw, band, cch);
1749 	}
1750 
1751 	return val;
1752 }
1753 
1754 #ifdef RTW_HALMAC
1755 /*
1756  * Description:
1757  *	Initialize MAC registers
1758  *
1759  * Return:
1760  *	_TRUE	success
1761  *	_FALSE	fail
1762  */
rtw_hal_init_mac_register(PADAPTER adapter)1763 u8 rtw_hal_init_mac_register(PADAPTER adapter)
1764 {
1765 	return adapter->hal_func.init_mac_register(adapter);
1766 }
1767 
1768 /*
1769  * Description:
1770  *	Initialize PHY(BB/RF) related functions
1771  *
1772  * Return:
1773  *	_TRUE	success
1774  *	_FALSE	fail
1775  */
rtw_hal_init_phy(PADAPTER adapter)1776 u8 rtw_hal_init_phy(PADAPTER adapter)
1777 {
1778 	return adapter->hal_func.init_phy(adapter);
1779 }
1780 #endif /* RTW_HALMAC */
1781 
1782 #ifdef CONFIG_RFKILL_POLL
rtw_hal_rfkill_poll(_adapter * adapter,u8 * valid)1783 bool rtw_hal_rfkill_poll(_adapter *adapter, u8 *valid)
1784 {
1785 	bool ret;
1786 
1787 	if (adapter->hal_func.hal_radio_onoff_check)
1788 		ret = adapter->hal_func.hal_radio_onoff_check(adapter, valid);
1789 	else {
1790 		*valid = 0;
1791 		ret = _FALSE;
1792 	}
1793 	return ret;
1794 }
1795 #endif
1796 
1797 #define rtw_hal_error_msg(ops_fun)		\
1798 	RTW_PRINT("### %s - Error : Please hook hal_func.%s ###\n", __FUNCTION__, ops_fun)
1799 
rtw_hal_ops_check(_adapter * padapter)1800 u8 rtw_hal_ops_check(_adapter *padapter)
1801 {
1802 	u8 ret = _SUCCESS;
1803 #if 1
1804 	/*** initialize section ***/
1805 	if (NULL == padapter->hal_func.read_chip_version) {
1806 		rtw_hal_error_msg("read_chip_version");
1807 		ret = _FAIL;
1808 	}
1809 	if (NULL == padapter->hal_func.init_default_value) {
1810 		rtw_hal_error_msg("init_default_value");
1811 		ret = _FAIL;
1812 	}
1813 	if (NULL == padapter->hal_func.intf_chip_configure) {
1814 		rtw_hal_error_msg("intf_chip_configure");
1815 		ret = _FAIL;
1816 	}
1817 	if (NULL == padapter->hal_func.read_adapter_info) {
1818 		rtw_hal_error_msg("read_adapter_info");
1819 		ret = _FAIL;
1820 	}
1821 
1822 	if (NULL == padapter->hal_func.hal_power_on) {
1823 		rtw_hal_error_msg("hal_power_on");
1824 		ret = _FAIL;
1825 	}
1826 	if (NULL == padapter->hal_func.hal_power_off) {
1827 		rtw_hal_error_msg("hal_power_off");
1828 		ret = _FAIL;
1829 	}
1830 
1831 	if (NULL == padapter->hal_func.hal_init) {
1832 		rtw_hal_error_msg("hal_init");
1833 		ret = _FAIL;
1834 	}
1835 	if (NULL == padapter->hal_func.hal_deinit) {
1836 		rtw_hal_error_msg("hal_deinit");
1837 		ret = _FAIL;
1838 	}
1839 
1840 	/*** xmit section ***/
1841 	if (NULL == padapter->hal_func.init_xmit_priv) {
1842 		rtw_hal_error_msg("init_xmit_priv");
1843 		ret = _FAIL;
1844 	}
1845 	if (NULL == padapter->hal_func.free_xmit_priv) {
1846 		rtw_hal_error_msg("free_xmit_priv");
1847 		ret = _FAIL;
1848 	}
1849 	if (NULL == padapter->hal_func.hal_xmit) {
1850 		rtw_hal_error_msg("hal_xmit");
1851 		ret = _FAIL;
1852 	}
1853 	if (NULL == padapter->hal_func.mgnt_xmit) {
1854 		rtw_hal_error_msg("mgnt_xmit");
1855 		ret = _FAIL;
1856 	}
1857 #ifdef CONFIG_XMIT_THREAD_MODE
1858 	if (NULL == padapter->hal_func.xmit_thread_handler) {
1859 		rtw_hal_error_msg("xmit_thread_handler");
1860 		ret = _FAIL;
1861 	}
1862 #endif
1863 	if (NULL == padapter->hal_func.hal_xmitframe_enqueue) {
1864 		rtw_hal_error_msg("hal_xmitframe_enqueue");
1865 		ret = _FAIL;
1866 	}
1867 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
1868 #ifndef CONFIG_SDIO_TX_TASKLET
1869 	if (NULL == padapter->hal_func.run_thread) {
1870 		rtw_hal_error_msg("run_thread");
1871 		ret = _FAIL;
1872 	}
1873 	if (NULL == padapter->hal_func.cancel_thread) {
1874 		rtw_hal_error_msg("cancel_thread");
1875 		ret = _FAIL;
1876 	}
1877 #endif
1878 #endif
1879 
1880 	/*** recv section ***/
1881 	if (NULL == padapter->hal_func.init_recv_priv) {
1882 		rtw_hal_error_msg("init_recv_priv");
1883 		ret = _FAIL;
1884 	}
1885 	if (NULL == padapter->hal_func.free_recv_priv) {
1886 		rtw_hal_error_msg("free_recv_priv");
1887 		ret = _FAIL;
1888 	}
1889 #ifdef CONFIG_RECV_THREAD_MODE
1890 	if (NULL == padapter->hal_func.recv_hdl) {
1891 		rtw_hal_error_msg("recv_hdl");
1892 		ret = _FAIL;
1893 	}
1894 #endif
1895 #if defined(CONFIG_USB_HCI) || defined(CONFIG_PCI_HCI)
1896 	if (NULL == padapter->hal_func.inirp_init) {
1897 		rtw_hal_error_msg("inirp_init");
1898 		ret = _FAIL;
1899 	}
1900 	if (NULL == padapter->hal_func.inirp_deinit) {
1901 		rtw_hal_error_msg("inirp_deinit");
1902 		ret = _FAIL;
1903 	}
1904 #endif /* #if defined(CONFIG_USB_HCI) || defined (CONFIG_PCI_HCI) */
1905 
1906 
1907 	/*** interrupt hdl section ***/
1908 #if defined(CONFIG_PCI_HCI)
1909 	if (NULL == padapter->hal_func.irp_reset) {
1910 		rtw_hal_error_msg("irp_reset");
1911 		ret = _FAIL;
1912 	}
1913 #endif/*#if defined(CONFIG_PCI_HCI)*/
1914 #if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))
1915 	if (NULL == padapter->hal_func.interrupt_handler) {
1916 		rtw_hal_error_msg("interrupt_handler");
1917 		ret = _FAIL;
1918 	}
1919 #endif /*#if (defined(CONFIG_PCI_HCI)) || (defined(CONFIG_USB_HCI) && defined(CONFIG_SUPPORT_USB_INT))*/
1920 
1921 #if defined(CONFIG_PCI_HCI) || defined(CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI)
1922 	if (NULL == padapter->hal_func.enable_interrupt) {
1923 		rtw_hal_error_msg("enable_interrupt");
1924 		ret = _FAIL;
1925 	}
1926 	if (NULL == padapter->hal_func.disable_interrupt) {
1927 		rtw_hal_error_msg("disable_interrupt");
1928 		ret = _FAIL;
1929 	}
1930 #endif /* defined(CONFIG_PCI_HCI) || defined (CONFIG_SDIO_HCI) || defined (CONFIG_GSPI_HCI) */
1931 
1932 
1933 	/*** DM section ***/
1934 	if (NULL == padapter->hal_func.dm_init) {
1935 		rtw_hal_error_msg("dm_init");
1936 		ret = _FAIL;
1937 	}
1938 	if (NULL == padapter->hal_func.dm_deinit) {
1939 		rtw_hal_error_msg("dm_deinit");
1940 		ret = _FAIL;
1941 	}
1942 	if (NULL == padapter->hal_func.hal_dm_watchdog) {
1943 		rtw_hal_error_msg("hal_dm_watchdog");
1944 		ret = _FAIL;
1945 	}
1946 
1947 	/*** xxx section ***/
1948 	if (NULL == padapter->hal_func.set_chnl_bw_handler) {
1949 		rtw_hal_error_msg("set_chnl_bw_handler");
1950 		ret = _FAIL;
1951 	}
1952 
1953 	if (NULL == padapter->hal_func.set_hw_reg_handler) {
1954 		rtw_hal_error_msg("set_hw_reg_handler");
1955 		ret = _FAIL;
1956 	}
1957 	if (NULL == padapter->hal_func.GetHwRegHandler) {
1958 		rtw_hal_error_msg("GetHwRegHandler");
1959 		ret = _FAIL;
1960 	}
1961 	if (NULL == padapter->hal_func.get_hal_def_var_handler) {
1962 		rtw_hal_error_msg("get_hal_def_var_handler");
1963 		ret = _FAIL;
1964 	}
1965 	if (NULL == padapter->hal_func.SetHalDefVarHandler) {
1966 		rtw_hal_error_msg("SetHalDefVarHandler");
1967 		ret = _FAIL;
1968 	}
1969 	if (NULL == padapter->hal_func.GetHalODMVarHandler) {
1970 		rtw_hal_error_msg("GetHalODMVarHandler");
1971 		ret = _FAIL;
1972 	}
1973 	if (NULL == padapter->hal_func.SetHalODMVarHandler) {
1974 		rtw_hal_error_msg("SetHalODMVarHandler");
1975 		ret = _FAIL;
1976 	}
1977 
1978 	if (NULL == padapter->hal_func.SetBeaconRelatedRegistersHandler) {
1979 		rtw_hal_error_msg("SetBeaconRelatedRegistersHandler");
1980 		ret = _FAIL;
1981 	}
1982 
1983 	if (NULL == padapter->hal_func.fill_h2c_cmd) {
1984 		rtw_hal_error_msg("fill_h2c_cmd");
1985 		ret = _FAIL;
1986 	}
1987 
1988 #ifdef RTW_HALMAC
1989 	if (NULL == padapter->hal_func.hal_mac_c2h_handler) {
1990 		rtw_hal_error_msg("hal_mac_c2h_handler");
1991 		ret = _FAIL;
1992 	}
1993 #elif !defined(CONFIG_RTL8188E)
1994 	if (NULL == padapter->hal_func.c2h_handler) {
1995 		rtw_hal_error_msg("c2h_handler");
1996 		ret = _FAIL;
1997 	}
1998 #endif
1999 
2000 #if defined(CONFIG_LPS) || defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
2001 	if (NULL == padapter->hal_func.fill_fake_txdesc) {
2002 		rtw_hal_error_msg("fill_fake_txdesc");
2003 		ret = _FAIL;
2004 	}
2005 #endif
2006 
2007 #ifndef RTW_HALMAC
2008 	if (NULL == padapter->hal_func.hal_get_tx_buff_rsvd_page_num) {
2009 		rtw_hal_error_msg("hal_get_tx_buff_rsvd_page_num");
2010 		ret = _FAIL;
2011 	}
2012 #endif /* !RTW_HALMAC */
2013 
2014 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN)
2015 #if defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI)
2016 	if (NULL == padapter->hal_func.clear_interrupt) {
2017 		rtw_hal_error_msg("clear_interrupt");
2018 		ret = _FAIL;
2019 	}
2020 #endif
2021 #endif /* CONFIG_WOWLAN */
2022 
2023 	if (NULL == padapter->hal_func.fw_dl) {
2024 		rtw_hal_error_msg("fw_dl");
2025 		ret = _FAIL;
2026 	}
2027 
2028 	#ifdef CONFIG_FW_CORRECT_BCN
2029 	if (IS_HARDWARE_TYPE_8814A(padapter)
2030 	    && NULL == padapter->hal_func.fw_correct_bcn) {
2031 		rtw_hal_error_msg("fw_correct_bcn");
2032 		ret = _FAIL;
2033 	}
2034 	#endif
2035 
2036 	if (!padapter->hal_func.set_tx_power_level_handler) {
2037 		rtw_hal_error_msg("set_tx_power_level_handler");
2038 		ret = _FAIL;
2039 	}
2040 	if (!padapter->hal_func.set_tx_power_index_handler) {
2041 		rtw_hal_error_msg("set_tx_power_index_handler");
2042 		ret = _FAIL;
2043 	}
2044 	if (!padapter->hal_func.get_tx_power_index_handler) {
2045 		rtw_hal_error_msg("get_tx_power_index_handler");
2046 		ret = _FAIL;
2047 	}
2048 
2049 	/*** SReset section ***/
2050 #ifdef DBG_CONFIG_ERROR_DETECT
2051 	if (NULL == padapter->hal_func.sreset_init_value) {
2052 		rtw_hal_error_msg("sreset_init_value");
2053 		ret = _FAIL;
2054 	}
2055 	if (NULL == padapter->hal_func.sreset_reset_value) {
2056 		rtw_hal_error_msg("sreset_reset_value");
2057 		ret = _FAIL;
2058 	}
2059 	if (NULL == padapter->hal_func.silentreset) {
2060 		rtw_hal_error_msg("silentreset");
2061 		ret = _FAIL;
2062 	}
2063 	if (NULL == padapter->hal_func.sreset_xmit_status_check) {
2064 		rtw_hal_error_msg("sreset_xmit_status_check");
2065 		ret = _FAIL;
2066 	}
2067 	if (NULL == padapter->hal_func.sreset_linked_status_check) {
2068 		rtw_hal_error_msg("sreset_linked_status_check");
2069 		ret = _FAIL;
2070 	}
2071 	if (NULL == padapter->hal_func.sreset_get_wifi_status) {
2072 		rtw_hal_error_msg("sreset_get_wifi_status");
2073 		ret = _FAIL;
2074 	}
2075 	if (NULL == padapter->hal_func.sreset_inprogress) {
2076 		rtw_hal_error_msg("sreset_inprogress");
2077 		ret = _FAIL;
2078 	}
2079 #endif  /* #ifdef DBG_CONFIG_ERROR_DETECT */
2080 
2081 #ifdef RTW_HALMAC
2082 	if (NULL == padapter->hal_func.init_mac_register) {
2083 		rtw_hal_error_msg("init_mac_register");
2084 		ret = _FAIL;
2085 	}
2086 	if (NULL == padapter->hal_func.init_phy) {
2087 		rtw_hal_error_msg("init_phy");
2088 		ret = _FAIL;
2089 	}
2090 #endif /* RTW_HALMAC */
2091 
2092 #ifdef CONFIG_RFKILL_POLL
2093 	if (padapter->hal_func.hal_radio_onoff_check == NULL) {
2094 		rtw_hal_error_msg("hal_radio_onoff_check");
2095 		ret = _FAIL;
2096 	}
2097 #endif
2098 #endif
2099 	return  ret;
2100 }
2101