1 /****************************************************************************** 2 * 3 * Copyright(c) 2015 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 ******************************************************************************/ 19 #ifdef CONFIG_MCC_MODE 20 21 #ifndef _RTW_MCC_H_ 22 #define _RTW_MCC_H_ 23 24 #include <drv_types.h> /* PADAPTER */ 25 26 #define MCC_STATUS_PROCESS_MCC_START_SETTING BIT0 27 #define MCC_STATUS_PROCESS_MCC_STOP_SETTING BIT1 28 #define MCC_STATUS_NEED_MCC BIT2 29 #define MCC_STATUS_DOING_MCC BIT3 30 31 32 #define MCC_DURATION 35 /* ms */ 33 #define MCC_SWCH_FW_EARLY_TIME 10 /* ms */ 34 #define MCC_EXPIRE_TIME 50 /* ms */ 35 #define MCC_TOLERANCE_TIME 2 /* 2*2 = 4s */ 36 37 #define MCC_ROLE_STA_GC_MGMT_QUEUE_MACID 0 38 #define MCC_ROLE_SOFTAP_GO_MGMT_QUEUE_MACID 1 39 40 /* Lower for stop, Higher for start */ 41 #define MCC_SETCMD_STATUS_STOP_DISCONNECT 0x0 42 #define MCC_SETCMD_STATUS_STOP_SCAN_START 0x1 43 #define MCC_SETCMD_STATUS_START_CONNECT 0x80 44 #define MCC_SETCMD_STATUS_START_SCAN_DONE 0x81 45 46 /* 47 * depenad platform or customer requirement(TP unit:Mbps), 48 * must be provided by PM or sales or product document 49 * too large value means not to limit tx bytes (current for ap mode) 50 * NOTE: following values ref from test results 51 */ 52 #define MCC_AP_BW20_TARGET_TX_TP (300) 53 #define MCC_AP_BW40_TARGET_TX_TP (300) 54 #define MCC_AP_BW80_TARGET_TX_TP (300) 55 #define MCC_STA_BW20_TARGET_TX_TP (35) 56 #define MCC_STA_BW40_TARGET_TX_TP (70) 57 #define MCC_STA_BW80_TARGET_TX_TP (140) 58 #define MCC_SINGLE_TX_CRITERIA 5 /* Mbps */ 59 60 #define MAX_MCC_NUM 2 61 62 #define MCC_STOP(adapter) (adapter->mcc_adapterpriv.mcc_tx_stop) 63 #define MCC_EN(adapter) (adapter->registrypriv.en_mcc) 64 65 /* Represent Channel Tx Null setting */ 66 enum mcc_channel_tx_null { 67 MCC_ENABLE_TX_NULL = 0, 68 MCC_DISABLE_TX_NULL = 1, 69 }; 70 71 /* Represent C2H Report setting */ 72 enum mcc_c2h_report { 73 MCC_C2H_REPORT_DISABLE = 0, 74 MCC_C2H_REPORT_FAIL_STATUS = 1, 75 MCC_C2H_REPORT_ALL_STATUS = 2, 76 }; 77 78 /* Represent Channel Scan */ 79 enum mcc_channel_scan { 80 MCC_CHIDX = 0, 81 MCC_SCANCH_RSVD_LOC = 1, 82 }; 83 84 /* Represent FW status report of channel switch */ 85 enum mcc_status_rpt { 86 MCC_RPT_SUCCESS = 0, 87 MCC_RPT_TXNULL_FAIL = 1, 88 MCC_RPT_STOPMCC = 2, 89 MCC_RPT_READY = 3, 90 MCC_RPT_SWICH_CHANNEL_NOTIFY = 7, 91 MCC_RPT_MAX, 92 }; 93 94 enum MCC_ROLE { 95 MCC_ROLE_STA = 0, 96 MCC_ROLE_AP = 1, 97 MCC_ROLE_GC = 2, 98 MCC_ROLE_GO = 3, 99 MCC_ROLE_MAX, 100 }; 101 102 struct mcc_iqk_backup { 103 u16 TX_X; 104 u16 TX_Y; 105 u16 RX_X; 106 u16 RX_Y; 107 }; 108 109 /* mcc data for adapter */ 110 struct mcc_adapter_priv { 111 u8 order; /* FW document, softap/AP must be 0 */ 112 u8 role; /* MCC role(AP,STA,GO,GC) */ 113 u8 mcc_duration; /* channel stay period, UNIT:1TU */ 114 115 /* flow control */ 116 u8 mcc_tx_stop; /* check if tp stop or not */ 117 u8 mcc_tp_limit; /* check if tp limit or not */ 118 u32 mcc_target_tx_bytes_to_port; /* customer require */ 119 u32 mcc_tx_bytes_to_port; /* already tx to tx fifo (write port) */ 120 121 /* data from kernel to check if enqueue data or netif stop queue */ 122 u32 mcc_tp; 123 u64 mcc_tx_bytes_from_kernel; 124 u64 mcc_last_tx_bytes_from_kernel; 125 126 /* Backup IQK value for MCC */ 127 struct mcc_iqk_backup mcc_iqk_arr[MAX_RF_PATH]; 128 129 /* mgmt queue macid to avoid RA issue */ 130 u8 mgmt_queue_macid; 131 132 /* set macid bitmap to let fw know which macid should be tx pause */ 133 /* all interface share total 16 macid */ 134 u16 mcc_macid_bitmap; 135 }; 136 137 struct mcc_obj_priv { 138 u8 duration; /* channel stay period, UNIT:1TU */ 139 u8 mcc_c2h_status; 140 u8 cur_mcc_success_cnt; /* used for check mcc switch channel success */ 141 u8 prev_mcc_success_cnt; /* used for check mcc switch channel success */ 142 u8 mcc_tolerance_time; /* used for detect mcc switch channel success */ 143 u8 mcc_loc_rsvd_paga[MAX_MCC_NUM]; /* mcc rsvd page */ 144 u8 mcc_status; /* mcc status stop or start .... */ 145 u32 mcc_launch_time; /* mcc launch time, used for starting detect mcc switch channel success */ 146 _mutex mcc_mutex; 147 _lock mcc_lock; 148 PADAPTER iface[MAX_MCC_NUM]; /* by order, use for mcc parameter cmd */ 149 struct submit_ctx mcc_sctx; 150 }; 151 152 /* backup IQK val */ 153 void rtw_hal_mcc_backup_IQK_val(PADAPTER padapter); 154 155 /* check mcc status */ 156 u8 rtw_hal_check_mcc_status(PADAPTER padapter, u8 mcc_status); 157 158 /* set mcc status */ 159 void rtw_hal_set_mcc_status(PADAPTER padapter, u8 mcc_status); 160 161 /* clear mcc status */ 162 void rtw_hal_clear_mcc_status(PADAPTER padapter, u8 mcc_status); 163 164 /* dl mcc rsvd page */ 165 u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index 166 , u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len, RSVDPAGE_LOC *rsvd_page_loc); 167 168 /* handle C2H */ 169 void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf); 170 171 /* switch channel successfully or not */ 172 void rtw_hal_mcc_sw_status_check(PADAPTER padapter); 173 174 /* change some scan flags under site survey */ 175 u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset); 176 177 /* record data kernel TX to driver to check MCC concurrent TX */ 178 void rtw_hal_mcc_calc_tx_bytes_from_kernel(PADAPTER padapter, u32 len); 179 180 /* record data to port to let driver do flow ctrl */ 181 void rtw_hal_mcc_calc_tx_bytes_to_port(PADAPTER padapter, u32 len); 182 183 /* check stop write port or not */ 184 u8 rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter); 185 186 u8 rtw_hal_set_mcc_setting_scan_start(PADAPTER padapter); 187 188 u8 rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter); 189 190 u8 rtw_hal_set_mcc_setting_start_bss_network(PADAPTER padapter, u8 chbw_grouped); 191 192 u8 rtw_hal_set_mcc_setting_disconnect(PADAPTER padapter); 193 194 u8 rtw_hal_set_mcc_setting_join_done_chk_ch(PADAPTER padapter); 195 196 u8 rtw_hal_set_mcc_setting_chk_start_clnt_join(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset, u8 chbw_allow); 197 198 void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj); 199 200 void update_mcc_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib); 201 202 u8 rtw_hal_mcc_link_status_chk(_adapter *padapter, const char *msg); 203 204 void rtw_hal_mcc_issue_null_data(_adapter *padapter, u8 chbw_allow, u8 ps_mode); 205 206 #endif /* _RTW_MCC_H_ */ 207 #endif /* CONFIG_MCC_MODE */ 208