1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2013 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 #ifndef __RTL8192E_HAL_H__ 21 #define __RTL8192E_HAL_H__ 22 23 /* #include "hal_com.h" */ 24 25 #include "hal_data.h" 26 27 /* include HAL Related header after HAL Related compiling flags */ 28 #include "rtl8192e_spec.h" 29 #include "rtl8192e_rf.h" 30 #include "rtl8192e_dm.h" 31 #include "rtl8192e_recv.h" 32 #include "rtl8192e_xmit.h" 33 #include "rtl8192e_cmd.h" 34 #include "rtl8192e_led.h" 35 #include "Hal8192EPwrSeq.h" 36 #include "Hal8192EPhyReg.h" 37 #include "Hal8192EPhyCfg.h" 38 39 40 #ifdef DBG_CONFIG_ERROR_DETECT 41 #include "rtl8192e_sreset.h" 42 #endif 43 44 45 /* --------------------------------------------------------------------- 46 * RTL8192E From header 47 * --------------------------------------------------------------------- */ 48 #define RTL8192E_FW_IMG "rtl8192e/FW_NIC.bin" 49 #define RTL8192E_FW_WW_IMG "rtl8192e/FW_WoWLAN.bin" 50 #define RTL8192E_PHY_REG "rtl8192e/PHY_REG.txt" 51 #define RTL8192E_PHY_RADIO_A "rtl8192e/RadioA.txt" 52 #define RTL8192E_PHY_RADIO_B "rtl8192e/RadioB.txt" 53 #define RTL8192E_TXPWR_TRACK "rtl8192e/TxPowerTrack.txt" 54 #define RTL8192E_AGC_TAB "rtl8192e/AGC_TAB.txt" 55 #define RTL8192E_PHY_MACREG "rtl8192e/MAC_REG.txt" 56 #define RTL8192E_PHY_REG_PG "rtl8192e/PHY_REG_PG.txt" 57 #define RTL8192E_PHY_REG_MP "rtl8192e/PHY_REG_MP.txt" 58 #define RTL8192E_TXPWR_LMT "rtl8192e/TXPWR_LMT.txt" 59 #define RTL8192E_WIFI_ANT_ISOLATION "rtl8192e/wifi_ant_isolation.txt" 60 61 /* --------------------------------------------------------------------- 62 * RTL8192E Power Configuration CMDs for PCIe interface 63 * --------------------------------------------------------------------- */ 64 #define Rtl8192E_NIC_PWR_ON_FLOW rtl8192E_power_on_flow 65 #define Rtl8192E_NIC_RF_OFF_FLOW rtl8192E_radio_off_flow 66 #define Rtl8192E_NIC_DISABLE_FLOW rtl8192E_card_disable_flow 67 #define Rtl8192E_NIC_ENABLE_FLOW rtl8192E_card_enable_flow 68 #define Rtl8192E_NIC_SUSPEND_FLOW rtl8192E_suspend_flow 69 #define Rtl8192E_NIC_RESUME_FLOW rtl8192E_resume_flow 70 #define Rtl8192E_NIC_PDN_FLOW rtl8192E_hwpdn_flow 71 #define Rtl8192E_NIC_LPS_ENTER_FLOW rtl8192E_enter_lps_flow 72 #define Rtl8192E_NIC_LPS_LEAVE_FLOW rtl8192E_leave_lps_flow 73 74 75 #if 1 /* download firmware related data structure */ 76 #define FW_SIZE_8192E 0x8000 /* Compatible with RTL8192e Maximal RAM code size 32k */ 77 #define FW_START_ADDRESS 0x1000 78 #define FW_END_ADDRESS 0x5FFF 79 80 81 #define IS_FW_HEADER_EXIST_8192E(_pFwHdr) ((GET_FIRMWARE_HDR_SIGNATURE_8192E(_pFwHdr) & 0xFFF0) == 0x92E0) 82 83 84 85 typedef struct _RT_FIRMWARE_8192E { 86 FIRMWARE_SOURCE eFWSource; 87 #ifdef CONFIG_EMBEDDED_FWIMG 88 u8 *szFwBuffer; 89 #else 90 u8 szFwBuffer[FW_SIZE_8192E]; 91 #endif 92 u32 ulFwLength; 93 } RT_FIRMWARE_8192E, *PRT_FIRMWARE_8192E; 94 95 /* 96 * This structure must be cared byte-ordering 97 * 98 * Added by tynli. 2009.12.04. */ 99 100 /* ***************************************************** 101 * Firmware Header(8-byte alinment required) 102 * ***************************************************** 103 * --- LONG WORD 0 ---- */ 104 #define GET_FIRMWARE_HDR_SIGNATURE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 0, 16) /* 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut */ 105 #define GET_FIRMWARE_HDR_CATEGORY_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 16, 8) /* AP/NIC and USB/PCI */ 106 #define GET_FIRMWARE_HDR_FUNCTION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr, 24, 8) /* Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions */ 107 #define GET_FIRMWARE_HDR_VERSION_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 0, 16)/* FW Version */ 108 #define GET_FIRMWARE_HDR_SUB_VER_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 16, 8) /* FW Subversion, default 0x00 */ 109 #define GET_FIRMWARE_HDR_RSVD1_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+4, 24, 8) 110 111 /* --- LONG WORD 1 ---- */ 112 #define GET_FIRMWARE_HDR_MONTH_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 0, 8) /* Release time Month field */ 113 #define GET_FIRMWARE_HDR_DATE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 8, 8) /* Release time Date field */ 114 #define GET_FIRMWARE_HDR_HOUR_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 16, 8)/* Release time Hour field */ 115 #define GET_FIRMWARE_HDR_MINUTE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+8, 24, 8)/* Release time Minute field */ 116 #define GET_FIRMWARE_HDR_ROMCODE_SIZE_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 0, 16)/* The size of RAM code */ 117 #define GET_FIRMWARE_HDR_RSVD2_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+12, 16, 16) 118 119 /* --- LONG WORD 2 ---- */ 120 #define GET_FIRMWARE_HDR_SVN_IDX_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+16, 0, 32)/* The SVN entry index */ 121 #define GET_FIRMWARE_HDR_RSVD3_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+20, 0, 32) 122 123 /* --- LONG WORD 3 ---- */ 124 #define GET_FIRMWARE_HDR_RSVD4_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+24, 0, 32) 125 #define GET_FIRMWARE_HDR_RSVD5_8192E(__FwHdr) LE_BITS_TO_4BYTE(__FwHdr+28, 0, 32) 126 127 #endif /* download firmware related data structure */ 128 129 #define DRIVER_EARLY_INT_TIME_8192E 0x05 130 #define BCN_DMA_ATIME_INT_TIME_8192E 0x02 131 #define RX_DMA_SIZE_8192E 0x4000 /* 16K*/ 132 133 #ifdef CONFIG_WOWLAN 134 #define RESV_FMWF (WKFMCAM_SIZE * MAX_WKFM_NUM) /* 16 entries, for each is 24 bytes*/ 135 #else 136 #define RESV_FMWF 0 137 #endif 138 139 #ifdef CONFIG_FW_C2H_DEBUG 140 #define RX_DMA_RESERVED_SIZE_8192E 0x100 /* 256B, reserved for c2h debug message*/ 141 #else 142 #define RX_DMA_RESERVED_SIZE_8192E 0x40 /* 64B, reserved for c2h event(16bytes) or ccx(8 Bytes)*/ 143 #endif 144 #define MAX_RX_DMA_BUFFER_SIZE_8192E (RX_DMA_SIZE_8192E-RX_DMA_RESERVED_SIZE_8192E) /*RX 16K*/ 145 146 /* For General Reserved Page Number(Beacon Queue is reserved page) 147 * if (CONFIG_2BCN_EN) Beacon:4, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 148 * Beacon:2, PS-Poll:1, Null Data:1,Prob Rsp:1,Qos Null Data:1 */ 149 #define RSVD_PAGE_NUM_8192E 0x08 150 /* For WoWLan , more reserved page 151 * ARP Rsp:1, RWC:1, GTK Info:1,GTK RSP:2,GTK EXT MEM:2, PNO: 6 */ 152 #ifdef CONFIG_WOWLAN 153 #define WOWLAN_PAGE_NUM_8192E 0x07 154 #else 155 #define WOWLAN_PAGE_NUM_8192E 0x00 156 #endif 157 158 #ifdef CONFIG_PNO_SUPPORT 159 #undef WOWLAN_PAGE_NUM_8192E 160 #define WOWLAN_PAGE_NUM_8192E 0x0d 161 #endif 162 163 /* Note: 164 Tx FIFO Size : 64KB 165 Tx page Size : 256B 166 Total page numbers : 256(0x100) 167 */ 168 169 #define TOTAL_RSVD_PAGE_NUMBER_8192E (RSVD_PAGE_NUM_8192E + WOWLAN_PAGE_NUM_8192E) 170 171 #define TOTAL_PAGE_NUMBER_8192E (0x100) 172 #define TX_TOTAL_PAGE_NUMBER_8192E (TOTAL_PAGE_NUMBER_8192E - TOTAL_RSVD_PAGE_NUMBER_8192E) 173 174 #define TX_PAGE_BOUNDARY_8192E (TX_TOTAL_PAGE_NUMBER_8192E) /* beacon header start address */ 175 176 177 #define PAGE_SIZE_TX_92E PAGE_SIZE_256 178 #define RSVD_PKT_LEN_92E (TOTAL_RSVD_PAGE_NUMBER_8192E * PAGE_SIZE_TX_92E) 179 180 #define TX_PAGE_LOAD_FW_BOUNDARY_8192E 0x47 /* 0xA5 */ 181 #define TX_PAGE_BOUNDARY_WOWLAN_8192E 0xE0 182 183 /* For Normal Chip Setting 184 * (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER_92C */ 185 186 #define NORMAL_PAGE_NUM_HPQ_8192E 0x10 187 #define NORMAL_PAGE_NUM_LPQ_8192E 0x10 188 #define NORMAL_PAGE_NUM_NPQ_8192E 0x10 189 #define NORMAL_PAGE_NUM_EPQ_8192E 0x00 190 191 192 /* Note: For WMM Normal Chip Setting ,modify later */ 193 #define WMM_NORMAL_PAGE_NUM_HPQ_8192E NORMAL_PAGE_NUM_HPQ_8192E 194 #define WMM_NORMAL_PAGE_NUM_LPQ_8192E NORMAL_PAGE_NUM_LPQ_8192E 195 #define WMM_NORMAL_PAGE_NUM_NPQ_8192E NORMAL_PAGE_NUM_NPQ_8192E 196 197 198 /* ------------------------------------------------------------------------- 199 * Chip specific 200 * ------------------------------------------------------------------------- */ 201 202 /* pic buffer descriptor */ 203 #define RTL8192EE_SEG_NUM TX_BUFFER_SEG_NUM 204 #define TX_DESC_NUM_92E 128 205 #define RX_DESC_NUM_92E 128 206 207 /* ------------------------------------------------------------------------- 208 * Channel Plan 209 * ------------------------------------------------------------------------- */ 210 211 #define HWSET_MAX_SIZE_8192E 512 212 213 #define EFUSE_REAL_CONTENT_LEN_8192E 512 214 215 #define EFUSE_MAP_LEN_8192E 512 216 #define EFUSE_MAX_SECTION_8192E 64 217 #define EFUSE_MAX_WORD_UNIT_8192E 4 218 #define EFUSE_IC_ID_OFFSET_8192E 506 /* For some inferiority IC purpose. added by Roger, 2009.09.02. */ 219 #define AVAILABLE_EFUSE_ADDR_8192E(addr) (addr < EFUSE_REAL_CONTENT_LEN_8192E) 220 /* 221 * <Roger_Notes> To prevent out of boundary programming case, leave 1byte and program full section 222 * 9bytes + 1byt + 5bytes and pre 1byte. 223 * For worst case: 224 * | 1byte|----8bytes----|1byte|--5bytes--| 225 * | | Reserved(14bytes) | 226 * */ 227 #define EFUSE_OOB_PROTECT_BYTES_8192E 15 /* PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. */ 228 229 230 231 /* ******************************************************** 232 * EFUSE for BT definition 233 * ******************************************************** */ 234 #define EFUSE_BT_REAL_BANK_CONTENT_LEN_8192E 512 235 #define EFUSE_BT_REAL_CONTENT_LEN_8192E 1024 /* 512*2 */ 236 #define EFUSE_BT_MAP_LEN_8192E 1024 /* 1k bytes */ 237 #define EFUSE_BT_MAX_SECTION_8192E 128 /* 1024/8 */ 238 239 #define EFUSE_PROTECT_BYTES_BANK_8192E 16 240 #define EFUSE_MAX_BANK_8192E 3 241 /* *********************************************************** */ 242 243 #define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) 244 #define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) 245 246 /* #define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) */ 247 248 /* #define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) */ 249 250 /* rtl8812_hal_init.c */ 251 void _8051Reset8192E(PADAPTER padapter); 252 s32 FirmwareDownload8192E(PADAPTER Adapter, BOOLEAN bUsedWoWLANFw); 253 void InitializeFirmwareVars8192E(PADAPTER padapter); 254 255 s32 InitLLTTable8192E(PADAPTER padapter, u8 txpktbuf_bndy); 256 257 /* EFuse */ 258 u8 GetEEPROMSize8192E(PADAPTER padapter); 259 void hal_InitPGData_8192E(PADAPTER padapter, u8 *PROMContent); 260 void Hal_EfuseParseIDCode8192E(PADAPTER padapter, u8 *hwinfo); 261 void Hal_ReadPROMVersion8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 262 void Hal_ReadPowerSavingMode8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 263 void Hal_ReadTxPowerInfo8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 264 void Hal_ReadBoardType8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 265 void Hal_ReadThermalMeter_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 266 void Hal_ReadChannelPlan8192E(PADAPTER padapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 267 void Hal_EfuseParseXtal_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 268 void Hal_ReadAntennaDiversity8192E(PADAPTER pAdapter, u8 *PROMContent, BOOLEAN AutoLoadFail); 269 void Hal_ReadPAType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 270 void Hal_ReadAmplifierType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 271 void Hal_ReadRFEType_8192E(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); 272 void Hal_EfuseParseBTCoexistInfo8192E(PADAPTER Adapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 273 void Hal_EfuseParseKFreeData_8192E(PADAPTER pAdapter, u8 *hwinfo, BOOLEAN AutoLoadFail); 274 275 u8 Hal_CrystalAFEAdjust(_adapter *Adapter); 276 277 BOOLEAN HalDetectPwrDownMode8192E(PADAPTER Adapter); 278 279 #if defined(CONFIG_WOWLAN) || defined(CONFIG_AP_WOWLAN) 280 void Hal_DetectWoWMode(PADAPTER pAdapter); 281 #endif /* CONFIG_WOWLAN */ 282 283 /***********************************************************/ 284 /* RTL8192E-MAC Setting */ 285 VOID _InitQueueReservedPage_8192E(IN PADAPTER Adapter); 286 VOID _InitQueuePriority_8192E(IN PADAPTER Adapter); 287 VOID _InitTxBufferBoundary_8192E(IN PADAPTER Adapter, IN u8 txpktbuf_bndy); 288 VOID _InitPageBoundary_8192E(IN PADAPTER Adapter); 289 /* VOID _InitTransferPageSize_8192E(IN PADAPTER Adapter); */ 290 VOID _InitDriverInfoSize_8192E(IN PADAPTER Adapter, IN u8 drvInfoSize); 291 VOID _InitRDGSetting_8192E(PADAPTER Adapter); 292 void _InitID_8192E(IN PADAPTER Adapter); 293 VOID _InitNetworkType_8192E(IN PADAPTER Adapter); 294 VOID _InitWMACSetting_8192E(IN PADAPTER Adapter); 295 VOID _InitAdaptiveCtrl_8192E(IN PADAPTER Adapter); 296 VOID _InitRateFallback_8192E(IN PADAPTER Adapter); 297 VOID _InitEDCA_8192E(IN PADAPTER Adapter); 298 VOID _InitRetryFunction_8192E(IN PADAPTER Adapter); 299 VOID _BBTurnOnBlock_8192E(IN PADAPTER Adapter); 300 VOID _InitBeaconParameters_8192E(IN PADAPTER Adapter); 301 VOID _InitBeaconMaxError_8192E( 302 IN PADAPTER Adapter, 303 IN BOOLEAN InfraMode 304 ); 305 void SetBeaconRelatedRegisters8192E(PADAPTER padapter); 306 VOID hal_ReadRFType_8192E(PADAPTER Adapter); 307 /* RTL8192E-MAC Setting 308 ***********************************************************/ 309 310 void SetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val); 311 void GetHwReg8192E(PADAPTER Adapter, u8 variable, u8 *val); 312 u8 313 SetHalDefVar8192E( 314 IN PADAPTER Adapter, 315 IN HAL_DEF_VARIABLE eVariable, 316 IN PVOID pValue 317 ); 318 u8 319 GetHalDefVar8192E( 320 IN PADAPTER Adapter, 321 IN HAL_DEF_VARIABLE eVariable, 322 IN PVOID pValue 323 ); 324 325 void rtl8192e_set_hal_ops(struct hal_ops *pHalFunc); 326 void init_hal_spec_8192e(_adapter *adapter); 327 void rtl8192e_init_default_value(_adapter *padapter); 328 /* register */ 329 void SetBcnCtrlReg(PADAPTER padapter, u8 SetBits, u8 ClearBits); 330 331 void rtl8192e_start_thread(_adapter *padapter); 332 void rtl8192e_stop_thread(_adapter *padapter); 333 334 #ifdef CONFIG_PCI_HCI 335 BOOLEAN InterruptRecognized8192EE(PADAPTER Adapter); 336 u16 get_txdesc_buf_addr(u16 ff_hwaddr); 337 #endif 338 339 #ifdef CONFIG_SDIO_HCI 340 #ifdef CONFIG_SDIO_TX_ENABLE_AVAL_INT 341 void _init_available_page_threshold(PADAPTER padapter, u8 numHQ, u8 numNQ, u8 numLQ, u8 numPubQ); 342 #endif 343 #endif 344 345 #ifdef CONFIG_BT_COEXIST 346 void rtl8192e_combo_card_WifiOnlyHwInit(PADAPTER Adapter); 347 #endif 348 349 #endif /* __RTL8192E_HAL_H__ */ 350