1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20 #ifndef __HAL_COMMON_H__
21 #define __HAL_COMMON_H__
22
23 #include "HalVerDef.h"
24 #include "hal_pg.h"
25 #include "hal_phy.h"
26 #include "hal_phy_reg.h"
27 #include "hal_com_reg.h"
28 #include "hal_com_phycfg.h"
29 #include "../hal/hal_com_c2h.h"
30
31 /*------------------------------ Tx Desc definition Macro ------------------------*/
32 /* #pragma mark -- Tx Desc related definition. -- */
33 /* ----------------------------------------------------------------------------
34 * -----------------------------------------------------------
35 * Rate
36 * -----------------------------------------------------------
37 * CCK Rates, TxHT = 0 */
38 #define DESC_RATE1M 0x00
39 #define DESC_RATE2M 0x01
40 #define DESC_RATE5_5M 0x02
41 #define DESC_RATE11M 0x03
42
43 /* OFDM Rates, TxHT = 0 */
44 #define DESC_RATE6M 0x04
45 #define DESC_RATE9M 0x05
46 #define DESC_RATE12M 0x06
47 #define DESC_RATE18M 0x07
48 #define DESC_RATE24M 0x08
49 #define DESC_RATE36M 0x09
50 #define DESC_RATE48M 0x0a
51 #define DESC_RATE54M 0x0b
52
53 /* MCS Rates, TxHT = 1 */
54 #define DESC_RATEMCS0 0x0c
55 #define DESC_RATEMCS1 0x0d
56 #define DESC_RATEMCS2 0x0e
57 #define DESC_RATEMCS3 0x0f
58 #define DESC_RATEMCS4 0x10
59 #define DESC_RATEMCS5 0x11
60 #define DESC_RATEMCS6 0x12
61 #define DESC_RATEMCS7 0x13
62 #define DESC_RATEMCS8 0x14
63 #define DESC_RATEMCS9 0x15
64 #define DESC_RATEMCS10 0x16
65 #define DESC_RATEMCS11 0x17
66 #define DESC_RATEMCS12 0x18
67 #define DESC_RATEMCS13 0x19
68 #define DESC_RATEMCS14 0x1a
69 #define DESC_RATEMCS15 0x1b
70 #define DESC_RATEMCS16 0x1C
71 #define DESC_RATEMCS17 0x1D
72 #define DESC_RATEMCS18 0x1E
73 #define DESC_RATEMCS19 0x1F
74 #define DESC_RATEMCS20 0x20
75 #define DESC_RATEMCS21 0x21
76 #define DESC_RATEMCS22 0x22
77 #define DESC_RATEMCS23 0x23
78 #define DESC_RATEMCS24 0x24
79 #define DESC_RATEMCS25 0x25
80 #define DESC_RATEMCS26 0x26
81 #define DESC_RATEMCS27 0x27
82 #define DESC_RATEMCS28 0x28
83 #define DESC_RATEMCS29 0x29
84 #define DESC_RATEMCS30 0x2A
85 #define DESC_RATEMCS31 0x2B
86 #define DESC_RATEVHTSS1MCS0 0x2C
87 #define DESC_RATEVHTSS1MCS1 0x2D
88 #define DESC_RATEVHTSS1MCS2 0x2E
89 #define DESC_RATEVHTSS1MCS3 0x2F
90 #define DESC_RATEVHTSS1MCS4 0x30
91 #define DESC_RATEVHTSS1MCS5 0x31
92 #define DESC_RATEVHTSS1MCS6 0x32
93 #define DESC_RATEVHTSS1MCS7 0x33
94 #define DESC_RATEVHTSS1MCS8 0x34
95 #define DESC_RATEVHTSS1MCS9 0x35
96 #define DESC_RATEVHTSS2MCS0 0x36
97 #define DESC_RATEVHTSS2MCS1 0x37
98 #define DESC_RATEVHTSS2MCS2 0x38
99 #define DESC_RATEVHTSS2MCS3 0x39
100 #define DESC_RATEVHTSS2MCS4 0x3A
101 #define DESC_RATEVHTSS2MCS5 0x3B
102 #define DESC_RATEVHTSS2MCS6 0x3C
103 #define DESC_RATEVHTSS2MCS7 0x3D
104 #define DESC_RATEVHTSS2MCS8 0x3E
105 #define DESC_RATEVHTSS2MCS9 0x3F
106 #define DESC_RATEVHTSS3MCS0 0x40
107 #define DESC_RATEVHTSS3MCS1 0x41
108 #define DESC_RATEVHTSS3MCS2 0x42
109 #define DESC_RATEVHTSS3MCS3 0x43
110 #define DESC_RATEVHTSS3MCS4 0x44
111 #define DESC_RATEVHTSS3MCS5 0x45
112 #define DESC_RATEVHTSS3MCS6 0x46
113 #define DESC_RATEVHTSS3MCS7 0x47
114 #define DESC_RATEVHTSS3MCS8 0x48
115 #define DESC_RATEVHTSS3MCS9 0x49
116 #define DESC_RATEVHTSS4MCS0 0x4A
117 #define DESC_RATEVHTSS4MCS1 0x4B
118 #define DESC_RATEVHTSS4MCS2 0x4C
119 #define DESC_RATEVHTSS4MCS3 0x4D
120 #define DESC_RATEVHTSS4MCS4 0x4E
121 #define DESC_RATEVHTSS4MCS5 0x4F
122 #define DESC_RATEVHTSS4MCS6 0x50
123 #define DESC_RATEVHTSS4MCS7 0x51
124 #define DESC_RATEVHTSS4MCS8 0x52
125 #define DESC_RATEVHTSS4MCS9 0x53
126
127 #define HDATA_RATE(rate)\
128 (rate == DESC_RATE1M) ? "CCK_1M" :\
129 (rate == DESC_RATE2M) ? "CCK_2M" :\
130 (rate == DESC_RATE5_5M) ? "CCK5_5M" :\
131 (rate == DESC_RATE11M) ? "CCK_11M" :\
132 (rate == DESC_RATE6M) ? "OFDM_6M" :\
133 (rate == DESC_RATE9M) ? "OFDM_9M" :\
134 (rate == DESC_RATE12M) ? "OFDM_12M" :\
135 (rate == DESC_RATE18M) ? "OFDM_18M" :\
136 (rate == DESC_RATE24M) ? "OFDM_24M" :\
137 (rate == DESC_RATE36M) ? "OFDM_36M" :\
138 (rate == DESC_RATE48M) ? "OFDM_48M" :\
139 (rate == DESC_RATE54M) ? "OFDM_54M" :\
140 (rate == DESC_RATEMCS0) ? "MCS0" :\
141 (rate == DESC_RATEMCS1) ? "MCS1" :\
142 (rate == DESC_RATEMCS2) ? "MCS2" :\
143 (rate == DESC_RATEMCS3) ? "MCS3" :\
144 (rate == DESC_RATEMCS4) ? "MCS4" :\
145 (rate == DESC_RATEMCS5) ? "MCS5" :\
146 (rate == DESC_RATEMCS6) ? "MCS6" :\
147 (rate == DESC_RATEMCS7) ? "MCS7" :\
148 (rate == DESC_RATEMCS8) ? "MCS8" :\
149 (rate == DESC_RATEMCS9) ? "MCS9" :\
150 (rate == DESC_RATEMCS10) ? "MCS10" :\
151 (rate == DESC_RATEMCS11) ? "MCS11" :\
152 (rate == DESC_RATEMCS12) ? "MCS12" :\
153 (rate == DESC_RATEMCS13) ? "MCS13" :\
154 (rate == DESC_RATEMCS14) ? "MCS14" :\
155 (rate == DESC_RATEMCS15) ? "MCS15" :\
156 (rate == DESC_RATEMCS16) ? "MCS16" :\
157 (rate == DESC_RATEMCS17) ? "MCS17" :\
158 (rate == DESC_RATEMCS18) ? "MCS18" :\
159 (rate == DESC_RATEMCS19) ? "MCS19" :\
160 (rate == DESC_RATEMCS20) ? "MCS20" :\
161 (rate == DESC_RATEMCS21) ? "MCS21" :\
162 (rate == DESC_RATEMCS22) ? "MCS22" :\
163 (rate == DESC_RATEMCS23) ? "MCS23" :\
164 (rate == DESC_RATEVHTSS1MCS0) ? "VHTSS1MCS0" :\
165 (rate == DESC_RATEVHTSS1MCS1) ? "VHTSS1MCS1" :\
166 (rate == DESC_RATEVHTSS1MCS2) ? "VHTSS1MCS2" :\
167 (rate == DESC_RATEVHTSS1MCS3) ? "VHTSS1MCS3" :\
168 (rate == DESC_RATEVHTSS1MCS4) ? "VHTSS1MCS4" :\
169 (rate == DESC_RATEVHTSS1MCS5) ? "VHTSS1MCS5" :\
170 (rate == DESC_RATEVHTSS1MCS6) ? "VHTSS1MCS6" :\
171 (rate == DESC_RATEVHTSS1MCS7) ? "VHTSS1MCS7" :\
172 (rate == DESC_RATEVHTSS1MCS8) ? "VHTSS1MCS8" :\
173 (rate == DESC_RATEVHTSS1MCS9) ? "VHTSS1MCS9" :\
174 (rate == DESC_RATEVHTSS2MCS0) ? "VHTSS2MCS0" :\
175 (rate == DESC_RATEVHTSS2MCS1) ? "VHTSS2MCS1" :\
176 (rate == DESC_RATEVHTSS2MCS2) ? "VHTSS2MCS2" :\
177 (rate == DESC_RATEVHTSS2MCS3) ? "VHTSS2MCS3" :\
178 (rate == DESC_RATEVHTSS2MCS4) ? "VHTSS2MCS4" :\
179 (rate == DESC_RATEVHTSS2MCS5) ? "VHTSS2MCS5" :\
180 (rate == DESC_RATEVHTSS2MCS6) ? "VHTSS2MCS6" :\
181 (rate == DESC_RATEVHTSS2MCS7) ? "VHTSS2MCS7" :\
182 (rate == DESC_RATEVHTSS2MCS8) ? "VHTSS2MCS8" :\
183 (rate == DESC_RATEVHTSS2MCS9) ? "VHTSS2MCS9" :\
184 (rate == DESC_RATEVHTSS3MCS0) ? "VHTSS3MCS0" :\
185 (rate == DESC_RATEVHTSS3MCS1) ? "VHTSS3MCS1" :\
186 (rate == DESC_RATEVHTSS3MCS2) ? "VHTSS3MCS2" :\
187 (rate == DESC_RATEVHTSS3MCS3) ? "VHTSS3MCS3" :\
188 (rate == DESC_RATEVHTSS3MCS4) ? "VHTSS3MCS4" :\
189 (rate == DESC_RATEVHTSS3MCS5) ? "VHTSS3MCS5" :\
190 (rate == DESC_RATEVHTSS3MCS6) ? "VHTSS3MCS6" :\
191 (rate == DESC_RATEVHTSS3MCS7) ? "VHTSS3MCS7" :\
192 (rate == DESC_RATEVHTSS3MCS8) ? "VHTSS3MCS8" :\
193 (rate == DESC_RATEVHTSS3MCS9) ? "VHTSS3MCS9" : "UNKNOWN"
194
195 #define HDATA_BW(bw)\
196 (bw == CHANNEL_WIDTH_20) ? "20M" :\
197 (bw == CHANNEL_WIDTH_40) ? "40M" :\
198 (bw == CHANNEL_WIDTH_80) ? "80M" :\
199 (bw == CHANNEL_WIDTH_160) ? "160M" : "UNKNOWN"
200
201 enum {
202 UP_LINK,
203 DOWN_LINK,
204 };
205 typedef enum _RT_MEDIA_STATUS {
206 RT_MEDIA_DISCONNECT = 0,
207 RT_MEDIA_CONNECT = 1
208 } RT_MEDIA_STATUS;
209
210 #define MAX_DLFW_PAGE_SIZE 4096 /* @ page : 4k bytes */
211 typedef enum _FIRMWARE_SOURCE {
212 FW_SOURCE_IMG_FILE = 0,
213 FW_SOURCE_HEADER_FILE = 1, /* from header file */
214 } FIRMWARE_SOURCE, *PFIRMWARE_SOURCE;
215
216 typedef enum _CH_SW_USE_CASE {
217 CH_SW_USE_CASE_TDLS = 0,
218 CH_SW_USE_CASE_MCC = 1
219 } CH_SW_USE_CASE;
220
221 /*
222 * Queue Select Value in TxDesc
223 * */
224 #define QSLT_BK 0x2/* 0x01 */
225 #define QSLT_BE 0x0
226 #define QSLT_VI 0x5/* 0x4 */
227 #define QSLT_VO 0x7/* 0x6 */
228 #define QSLT_BEACON 0x10
229 #define QSLT_HIGH 0x11
230 #define QSLT_MGNT 0x12
231 #define QSLT_CMD 0x13
232
233 /* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON.
234 * #define MAX_TX_QUEUE 9 */
235
236 #define TX_SELE_HQ BIT(0) /* High Queue */
237 #define TX_SELE_LQ BIT(1) /* Low Queue */
238 #define TX_SELE_NQ BIT(2) /* Normal Queue */
239 #define TX_SELE_EQ BIT(3) /* Extern Queue */
240
241 #define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len) & 0x7F ? 1 : 0))
242 #define PageNum_256(_Len) (u32)(((_Len)>>8) + ((_Len) & 0xFF ? 1 : 0))
243 #define PageNum_512(_Len) (u32)(((_Len)>>9) + ((_Len) & 0x1FF ? 1 : 0))
244 #define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1 : 0))
245
246 struct dbg_rx_counter {
247 u32 rx_pkt_ok;
248 u32 rx_pkt_crc_error;
249 u32 rx_pkt_drop;
250 u32 rx_ofdm_fa;
251 u32 rx_cck_fa;
252 u32 rx_ht_fa;
253 };
254
255 #ifdef CONFIG_MBSSID_CAM
256 #define DBG_MBID_CAM_DUMP
257
258 void rtw_mbid_cam_init(struct dvobj_priv *dvobj);
259 void rtw_mbid_cam_deinit(struct dvobj_priv *dvobj);
260 void rtw_mbid_cam_reset(_adapter *adapter);
261 u8 rtw_get_max_mbid_cam_id(_adapter *adapter);
262 u8 rtw_get_mbid_cam_entry_num(_adapter *adapter);
263 int rtw_mbid_cam_cache_dump(void *sel, const char *fun_name , _adapter *adapter);
264 int rtw_mbid_cam_dump(void *sel, const char *fun_name, _adapter *adapter);
265 void rtw_mbid_cam_restore(_adapter *adapter);
266 #endif
267
268 #ifdef CONFIG_MI_WITH_MBSSID_CAM
269 void rtw_hal_set_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
270 void rtw_hal_change_macaddr_mbid(_adapter *adapter, u8 *mac_addr);
271 #endif
272
273 void rtw_dump_mac_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
274 void rtw_dump_phy_rx_counters(_adapter *padapter, struct dbg_rx_counter *rx_counter);
275 void rtw_reset_mac_rx_counters(_adapter *padapter);
276 void rtw_reset_phy_rx_counters(_adapter *padapter);
277 void rtw_reset_phy_trx_ok_counters(_adapter *padapter);
278
279 #ifdef DBG_RX_COUNTER_DUMP
280 #define DUMP_DRV_RX_COUNTER BIT0
281 #define DUMP_MAC_RX_COUNTER BIT1
282 #define DUMP_PHY_RX_COUNTER BIT2
283 #define DUMP_DRV_TRX_COUNTER_DATA BIT3
284
285 void rtw_dump_phy_rxcnts_preprocess(_adapter *padapter, u8 rx_cnt_mode);
286 void rtw_dump_rx_counters(_adapter *padapter);
287 #endif
288
289 void dump_chip_info(HAL_VERSION ChipVersion);
290 void rtw_hal_config_rftype(PADAPTER padapter);
291
292 #define BAND_CAP_2G BIT0
293 #define BAND_CAP_5G BIT1
294 #define BAND_CAP_BIT_NUM 2
295
296 #define BW_CAP_5M BIT0
297 #define BW_CAP_10M BIT1
298 #define BW_CAP_20M BIT2
299 #define BW_CAP_40M BIT3
300 #define BW_CAP_80M BIT4
301 #define BW_CAP_160M BIT5
302 #define BW_CAP_80_80M BIT6
303 #define BW_CAP_BIT_NUM 7
304
305 #define PROTO_CAP_11B BIT0
306 #define PROTO_CAP_11G BIT1
307 #define PROTO_CAP_11N BIT2
308 #define PROTO_CAP_11AC BIT3
309 #define PROTO_CAP_BIT_NUM 4
310
311 #define WL_FUNC_P2P BIT0
312 #define WL_FUNC_MIRACAST BIT1
313 #define WL_FUNC_TDLS BIT2
314 #define WL_FUNC_FTM BIT3
315 #define WL_FUNC_BIT_NUM 4
316
317 int hal_spec_init(_adapter *adapter);
318 void dump_hal_spec(void *sel, _adapter *adapter);
319
320 bool hal_chk_band_cap(_adapter *adapter, u8 cap);
321 bool hal_chk_bw_cap(_adapter *adapter, u8 cap);
322 bool hal_chk_proto_cap(_adapter *adapter, u8 cap);
323 bool hal_is_band_support(_adapter *adapter, u8 band);
324 bool hal_is_bw_support(_adapter *adapter, u8 bw);
325 bool hal_is_wireless_mode_support(_adapter *adapter, u8 mode);
326 u8 hal_largest_bw(_adapter *adapter, u8 in_bw);
327
328 bool hal_chk_wl_func(_adapter *adapter, u8 func);
329
330 u8 hal_com_config_channel_plan(
331 IN PADAPTER padapter,
332 IN char *hw_alpha2,
333 IN u8 hw_chplan,
334 IN char *sw_alpha2,
335 IN u8 sw_chplan,
336 IN u8 def_chplan,
337 IN BOOLEAN AutoLoadFail
338 );
339
340 int hal_config_macaddr(_adapter *adapter, bool autoload_fail);
341
342 BOOLEAN
343 HAL_IsLegalChannel(
344 IN PADAPTER Adapter,
345 IN u32 Channel
346 );
347
348 u8 MRateToHwRate(u8 rate);
349
350 u8 HwRateToMRate(u8 rate);
351
352 void HalSetBrateCfg(
353 IN PADAPTER Adapter,
354 IN u8 *mBratesOS,
355 OUT u16 *pBrateCfg);
356
357 BOOLEAN
358 Hal_MappingOutPipe(
359 IN PADAPTER pAdapter,
360 IN u8 NumOutPipe
361 );
362
363
364 void rtw_restore_mac_addr(_adapter *adapter);/*set mac addr when hal_init for all iface*/
365 void rtw_hal_dump_macaddr(void *sel, _adapter *adapter);
366
367 void rtw_init_hal_com_default_value(PADAPTER Adapter);
368
369 void c2h_evt_clear(_adapter *adapter);
370 s32 c2h_evt_read(_adapter *adapter, u8 *buf);
371 s32 c2h_evt_read_88xx(_adapter *adapter, u8 *buf);
372
373 u8 rtw_hal_networktype_to_raid(_adapter *adapter, struct sta_info *psta);
374 u8 rtw_get_mgntframe_raid(_adapter *adapter, unsigned char network_type);
375 void rtw_hal_update_sta_rate_mask(PADAPTER padapter, struct sta_info *psta);
376
377 /* access HW only */
378 u32 rtw_sec_read_cam(_adapter *adapter, u8 addr);
379 void rtw_sec_write_cam(_adapter *adapter, u8 addr, u32 wdata);
380 void rtw_sec_read_cam_ent(_adapter *adapter, u8 id, u8 *ctrl, u8 *mac, u8 *key);
381 void rtw_sec_write_cam_ent(_adapter *adapter, u8 id, u16 ctrl, u8 *mac, u8 *key);
382 void rtw_sec_clr_cam_ent(_adapter *adapter, u8 id);
383 bool rtw_sec_read_cam_is_gk(_adapter *adapter, u8 id);
384
385 void rtw_hal_set_msr(_adapter *adapter, u8 net_type);
386 void rtw_hal_set_macaddr_port(_adapter *adapter, u8 *val);
387 void rtw_hal_get_macaddr_port(_adapter *adapter, u8 *mac_addr);
388
389 void rtw_hal_set_bssid(_adapter *adapter, u8 *val);
390
391 void hw_var_port_switch(_adapter *adapter);
392
393 void SetHwReg(PADAPTER padapter, u8 variable, u8 *val);
394 void GetHwReg(PADAPTER padapter, u8 variable, u8 *val);
395 void rtw_hal_check_rxfifo_full(_adapter *adapter);
396 void rtw_hal_reqtxrpt(_adapter *padapter, u8 macid);
397
398 u8 SetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
399 u8 GetHalDefVar(_adapter *adapter, HAL_DEF_VARIABLE variable, void *value);
400
401 BOOLEAN
402 eqNByte(
403 u8 *str1,
404 u8 *str2,
405 u32 num
406 );
407
408 u32
409 MapCharToHexDigit(
410 IN char chTmp
411 );
412
413 BOOLEAN
414 GetHexValueFromString(
415 IN char *szStr,
416 IN OUT u32 *pu4bVal,
417 IN OUT u32 *pu4bMove
418 );
419
420 BOOLEAN
421 GetFractionValueFromString(
422 IN char *szStr,
423 IN OUT u8 *pInteger,
424 IN OUT u8 *pFraction,
425 IN OUT u32 *pu4bMove
426 );
427
428 BOOLEAN
429 IsCommentString(
430 IN char *szStr
431 );
432
433 BOOLEAN
434 ParseQualifiedString(
435 IN char *In,
436 IN OUT u32 *Start,
437 OUT char *Out,
438 IN char LeftQualifier,
439 IN char RightQualifier
440 );
441
442 BOOLEAN
443 GetU1ByteIntegerFromStringInDecimal(
444 IN char *Str,
445 IN OUT u8 *pInt
446 );
447
448 BOOLEAN
449 isAllSpaceOrTab(
450 u8 *data,
451 u8 size
452 );
453
454 void linked_info_dump(_adapter *padapter, u8 benable);
455 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
456 void rtw_get_raw_rssi_info(void *sel, _adapter *padapter);
457 void rtw_dump_raw_rssi_info(_adapter *padapter, void *sel);
458 #endif
459
460 #ifdef DBG_RX_DFRAME_RAW_DATA
461 void rtw_dump_rx_dframe_info(_adapter *padapter, void *sel);
462 #endif
463 void rtw_store_phy_info(_adapter *padapter, union recv_frame *prframe);
464 #define HWSET_MAX_SIZE 1024
465 #ifdef CONFIG_EFUSE_CONFIG_FILE
466 #define EFUSE_FILE_COLUMN_NUM 16
467 u32 Hal_readPGDataFromConfigFile(PADAPTER padapter);
468 u32 Hal_ReadMACAddrFromFile(PADAPTER padapter, u8 *mac_addr);
469 #endif /* CONFIG_EFUSE_CONFIG_FILE */
470
471 int check_phy_efuse_tx_power_info_valid(PADAPTER padapter);
472 int hal_efuse_macaddr_offset(_adapter *adapter);
473 int Hal_GetPhyEfuseMACAddr(PADAPTER padapter, u8 *mac_addr);
474 void rtw_dump_cur_efuse(PADAPTER padapter);
475
476 #ifdef CONFIG_RF_POWER_TRIM
477 void rtw_bb_rf_gain_offset(_adapter *padapter);
478 #endif /*CONFIG_RF_POWER_TRIM*/
479
480 void dm_DynamicUsbTxAgg(_adapter *padapter, u8 from_timer);
481 u8 rtw_hal_busagg_qsel_check(_adapter *padapter, u8 pre_qsel, u8 next_qsel);
482 void GetHalODMVar(
483 PADAPTER Adapter,
484 HAL_ODM_VARIABLE eVariable,
485 PVOID pValue1,
486 PVOID pValue2);
487 void SetHalODMVar(
488 PADAPTER Adapter,
489 HAL_ODM_VARIABLE eVariable,
490 PVOID pValue1,
491 BOOLEAN bSet);
492
493 #ifdef CONFIG_BACKGROUND_NOISE_MONITOR
494 struct noise_info {
495 u8 bPauseDIG;
496 u8 IGIValue;
497 u32 max_time;/* ms */
498 u8 chan;
499 };
500 #endif
501
502 void rtw_get_noise(_adapter *padapter);
503 u8 rtw_get_current_tx_rate(_adapter *padapter, u8 macid);
504 u8 rtw_get_current_tx_sgi(_adapter *padapter, u8 macid);
505 void rtw_hal_construct_NullFunctionData(PADAPTER, u8 *pframe, u32 *pLength, u8 *StaAddr, u8 bQoS, u8 AC, u8 bEosp, u8 bForcePowerSave);
506
507 void rtw_hal_set_fw_rsvd_page(_adapter *adapter, bool finished);
508
509 #ifdef CONFIG_TDLS
510 #ifdef CONFIG_TDLS_CH_SW
511 s32 rtw_hal_ch_sw_oper_offload(_adapter *padapter, u8 channel, u8 channel_offset, u16 bwmode);
512 #endif
513 #endif
514
515 #ifdef CONFIG_BT_COEXIST
516 s32 rtw_hal_set_wifi_port_id_cmd(_adapter *adapter);
517 #endif
518
519 #ifdef CONFIG_GPIO_API
520 u8 rtw_hal_get_gpio(_adapter *adapter, u8 gpio_num);
521 int rtw_hal_set_gpio_output_value(_adapter *adapter, u8 gpio_num, bool isHigh);
522 int rtw_hal_config_gpio(_adapter *adapter, u8 gpio_num, bool isOutput);
523 int rtw_hal_register_gpio_interrupt(_adapter *adapter, int gpio_num, void(*callback)(u8 level));
524 int rtw_hal_disable_gpio_interrupt(_adapter *adapter, int gpio_num);
525 #endif
526
527 s8 rtw_hal_ch_sw_iqk_info_search(_adapter *padapter, u8 central_chnl, u8 bw_mode);
528 void rtw_hal_ch_sw_iqk_info_backup(_adapter *adapter);
529 void rtw_hal_ch_sw_iqk_info_restore(_adapter *padapter, u8 ch_sw_use_case);
530
531 #ifdef CONFIG_GPIO_WAKEUP
532 void rtw_hal_switch_gpio_wl_ctrl(_adapter *padapter, u8 index, u8 enable);
533 void rtw_hal_set_output_gpio(_adapter *padapter, u8 index, u8 outputval);
534 #endif
535
536 typedef enum _HAL_PHYDM_OPS {
537 HAL_PHYDM_DIS_ALL_FUNC,
538 HAL_PHYDM_FUNC_SET,
539 HAL_PHYDM_FUNC_CLR,
540 HAL_PHYDM_ABILITY_BK,
541 HAL_PHYDM_ABILITY_RESTORE,
542 HAL_PHYDM_ABILITY_SET,
543 HAL_PHYDM_ABILITY_GET,
544 } HAL_PHYDM_OPS;
545
546
547 #define DYNAMIC_FUNC_DISABLE (0x0)
548 u32 rtw_phydm_ability_ops(_adapter *adapter, HAL_PHYDM_OPS ops, u32 ability);
549
550 #define rtw_phydm_func_disable_all(adapter) \
551 rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0)
552
553 #define rtw_phydm_func_for_offchannel(adapter) \
554 do { \
555 rtw_phydm_ability_ops(adapter, HAL_PHYDM_DIS_ALL_FUNC, 0); \
556 if (rtw_odm_adaptivity_needed(adapter)) \
557 rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ODM_BB_ADAPTIVITY); \
558 } while (0)
559
560 #define rtw_phydm_func_set(adapter, ability) \
561 rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_SET, ability)
562
563 #define rtw_phydm_func_clr(adapter, ability) \
564 rtw_phydm_ability_ops(adapter, HAL_PHYDM_FUNC_CLR, ability)
565
566 #define rtw_phydm_ability_backup(adapter) \
567 rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_BK, 0)
568
569 #define rtw_phydm_ability_restore(adapter) \
570 rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_RESTORE, 0)
571
572 #define rtw_phydm_ability_set(adapter, ability) \
573 rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_SET, ability)
574
rtw_phydm_ability_get(_adapter * adapter)575 static inline u32 rtw_phydm_ability_get(_adapter *adapter)
576 {
577 return rtw_phydm_ability_ops(adapter, HAL_PHYDM_ABILITY_GET, 0);
578 }
579
580 #ifdef CONFIG_LOAD_PHY_PARA_FROM_FILE
581 extern char *rtw_phy_file_path;
582 extern char rtw_phy_para_file_path[PATH_LENGTH_MAX];
583 #define GetLineFromBuffer(buffer) strsep(&buffer, "\r\n")
584 #endif
585
586 #ifdef CONFIG_FW_C2H_DEBUG
587 void Debug_FwC2H(PADAPTER padapter, u8 *pdata, u8 len);
588 #endif
589 /*CONFIG_FW_C2H_DEBUG*/
590
591 void update_IOT_info(_adapter *padapter);
592
593 #ifdef CONFIG_AUTO_CHNL_SEL_NHM
594 void rtw_acs_start(_adapter *padapter, bool bStart);
595 #endif
596
597 void hal_set_crystal_cap(_adapter *adapter, u8 crystal_cap);
598 void rtw_hal_correct_tsf(_adapter *padapter, u8 hw_port, u64 tsf);
599
600 void ResumeTxBeacon(_adapter *padapter);
601 void StopTxBeacon(_adapter *padapter);
602 #ifdef CONFIG_MI_WITH_MBSSID_CAM /*HW port0 - MBSS*/
603 void hw_var_set_opmode_mbid(_adapter *Adapter, u8 mode);
604 u8 rtw_mbid_camid_alloc(_adapter *adapter, u8 *mac_addr);
605 #endif
606
607 #ifdef CONFIG_ANTENNA_DIVERSITY
608 u8 rtw_hal_antdiv_before_linked(_adapter *padapter);
609 void rtw_hal_antdiv_rssi_compared(_adapter *padapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src);
610 #endif
611
612 #ifdef DBG_SEC_CAM_MOVE
613 void rtw_hal_move_sta_gk_to_dk(_adapter *adapter);
614 void rtw_hal_read_sta_dk_key(_adapter *adapter, u8 key_id);
615 #endif
616
617 #ifdef CONFIG_LPS_PG
618 u8 rtw_hal_set_lps_pg_info(_adapter *adapter);
619 #endif
620
621 #endif /* __HAL_COMMON_H__ */
622