xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/include/Hal8192EPhyCfg.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  *
19  ******************************************************************************/
20 #ifndef __INC_HAL8192EPHYCFG_H__
21 #define __INC_HAL8192EPHYCFG_H__
22 
23 
24 /*--------------------------Define Parameters-------------------------------*/
25 #define LOOP_LIMIT				5
26 #define MAX_STALL_TIME			50		/* us */
27 #define AntennaDiversityValue	0x80	/* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */
28 #define MAX_TXPWR_IDX_NMODE_92S	63
29 #define Reset_Cnt_Limit			3
30 
31 #ifdef CONFIG_PCI_HCI
32 	#define MAX_AGGR_NUM	0x0B
33 #else
34 	#define MAX_AGGR_NUM	0x07
35 #endif /* CONFIG_PCI_HCI */
36 
37 
38 /*--------------------------Define Parameters-------------------------------*/
39 
40 /*------------------------------Define structure----------------------------*/
41 
42 /* BB/RF related */
43 
44 /*------------------------------Define structure----------------------------*/
45 
46 
47 /*------------------------Export global variable----------------------------*/
48 /*------------------------Export global variable----------------------------*/
49 
50 
51 /*------------------------Export Marco Definition---------------------------*/
52 /*------------------------Export Marco Definition---------------------------*/
53 
54 
55 /*--------------------------Exported Function prototype---------------------*/
56 /*
57  * BB and RF register read/write
58  *   */
59 u32	PHY_QueryBBReg8192E(IN	PADAPTER	Adapter,
60 			    IN	u32			RegAddr,
61 			    IN	u32			BitMask);
62 void	PHY_SetBBReg8192E(IN	PADAPTER		Adapter,
63 			  IN	u32			RegAddr,
64 			  IN	u32			BitMask,
65 			  IN	u32			Data);
66 u32	PHY_QueryRFReg8192E(IN	PADAPTER	Adapter,
67 			    IN	u8			eRFPath,
68 			    IN	u32			RegAddr,
69 			    IN	u32			BitMask);
70 void	PHY_SetRFReg8192E(IN	PADAPTER		Adapter,
71 			  IN	u8			eRFPath,
72 			  IN	u32			RegAddr,
73 			  IN	u32			BitMask,
74 			  IN	u32			Data);
75 
76 /*
77  * Initialization related function
78  *
79  * MAC/BB/RF HAL config */
80 int	PHY_MACConfig8192E(IN PADAPTER	Adapter);
81 int	PHY_BBConfig8192E(IN PADAPTER	Adapter);
82 int	PHY_RFConfig8192E(IN PADAPTER	Adapter);
83 
84 /* RF config */
85 
86 
87 /*
88  * BB TX Power R/W
89  *   */
90 void	PHY_GetTxPowerLevel8192E(IN PADAPTER	Adapter, OUT s32	*powerlevel);
91 void	PHY_SetTxPowerLevel8192E(IN PADAPTER	Adapter, IN u8	channel);
92 BOOLEAN	PHY_UpdateTxPowerDbm8192E(IN PADAPTER	Adapter, IN int	powerInDbm);
93 
94 VOID
95 PHY_SetTxPowerIndex_8192E(
96 	IN	PADAPTER			Adapter,
97 	IN	u32					PowerIndex,
98 	IN	u8					RFPath,
99 	IN	u8					Rate
100 );
101 
102 u8
103 PHY_GetTxPowerIndex_8192E(
104 	IN	PADAPTER			pAdapter,
105 	IN	u8					RFPath,
106 	IN	u8					Rate,
107 	IN	CHANNEL_WIDTH		BandWidth,
108 	IN	u8					Channel
109 );
110 
111 /*
112  * Switch bandwidth for 8192S
113  *   */
114 VOID
115 PHY_SetBWMode8192E(
116 	IN	PADAPTER			pAdapter,
117 	IN	CHANNEL_WIDTH	Bandwidth,
118 	IN	u8					Offset
119 );
120 
121 /*
122  * channel switch related funciton
123  *   */
124 VOID
125 PHY_SwChnl8192E(
126 	IN	PADAPTER	Adapter,
127 	IN	u8			channel
128 );
129 
130 
131 VOID
132 PHY_SetSwChnlBWMode8192E(
133 	IN	PADAPTER			Adapter,
134 	IN	u8					channel,
135 	IN	CHANNEL_WIDTH	Bandwidth,
136 	IN	u8					Offset40,
137 	IN	u8					Offset80
138 );
139 
140 VOID
141 PHY_SetRFEReg_8192E(
142 	IN PADAPTER		Adapter
143 );
144 
145 void
146 phy_SpurCalibration_8192E(
147 	IN	PADAPTER			Adapter,
148 	IN	SPUR_CAL_METHOD	Method
149 );
150 void PHY_SpurCalibration_8192E(IN PADAPTER Adapter);
151 
152 #ifdef CONFIG_SPUR_CAL_NBI
153 void
154 phy_SpurCalibration_8192E_NBI(
155 	IN	PADAPTER			Adapter
156 );
157 #endif
158 /*
159  * BB/MAC/RF other monitor API
160  *   */
161 
162 VOID
163 PHY_SetRFPathSwitch_8192E(
164 	IN	PADAPTER	pAdapter,
165 	IN	BOOLEAN		bMain
166 );
167 
168 VOID
169 storePwrIndexDiffRateOffset(
170 	IN	PADAPTER	Adapter,
171 	IN	u32		RegAddr,
172 	IN	u32		BitMask,
173 	IN	u32		Data
174 );
175 
176 /*--------------------------Exported Function prototype---------------------*/
177 #endif /* __INC_HAL8192CPHYCFG_H */
178