1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 #ifndef __INC_HAL8188EPHYCFG_H__ 21 #define __INC_HAL8188EPHYCFG_H__ 22 23 24 /*--------------------------Define Parameters-------------------------------*/ 25 #define LOOP_LIMIT 5 26 #define MAX_STALL_TIME 50 /* us */ 27 #define AntennaDiversityValue 0x80 /* (Adapter->bSoftwareAntennaDiversity ? 0x00 : 0x80) */ 28 #define MAX_TXPWR_IDX_NMODE_92S 63 29 #define Reset_Cnt_Limit 3 30 31 #ifdef CONFIG_PCI_HCI 32 #define MAX_AGGR_NUM 0x0B 33 #else 34 #define MAX_AGGR_NUM 0x07 35 #endif /* CONFIG_PCI_HCI */ 36 37 38 /*--------------------------Define Parameters-------------------------------*/ 39 40 41 /*------------------------------Define structure----------------------------*/ 42 43 #define MAX_TX_COUNT_8188E 1 44 45 /* BB/RF related */ 46 47 48 /*------------------------------Define structure----------------------------*/ 49 50 51 /*------------------------Export global variable----------------------------*/ 52 /*------------------------Export global variable----------------------------*/ 53 54 55 /*------------------------Export Marco Definition---------------------------*/ 56 /*------------------------Export Marco Definition---------------------------*/ 57 58 59 /*--------------------------Exported Function prototype---------------------*/ 60 /* 61 * BB and RF register read/write 62 * */ 63 u32 PHY_QueryBBReg8188E(IN PADAPTER Adapter, 64 IN u32 RegAddr, 65 IN u32 BitMask); 66 void PHY_SetBBReg8188E(IN PADAPTER Adapter, 67 IN u32 RegAddr, 68 IN u32 BitMask, 69 IN u32 Data); 70 u32 PHY_QueryRFReg8188E(IN PADAPTER Adapter, 71 IN u8 eRFPath, 72 IN u32 RegAddr, 73 IN u32 BitMask); 74 void PHY_SetRFReg8188E(IN PADAPTER Adapter, 75 IN u8 eRFPath, 76 IN u32 RegAddr, 77 IN u32 BitMask, 78 IN u32 Data); 79 80 /* 81 * Initialization related function 82 */ 83 /* MAC/BB/RF HAL config */ 84 int PHY_MACConfig8188E(IN PADAPTER Adapter); 85 int PHY_BBConfig8188E(IN PADAPTER Adapter); 86 int PHY_RFConfig8188E(IN PADAPTER Adapter); 87 88 /* RF config */ 89 int rtl8188e_PHY_ConfigRFWithParaFile(IN PADAPTER Adapter, IN u8 *pFileName, u8 eRFPath); 90 91 /* 92 * RF Power setting 93 */ 94 /* extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, 95 * IN RT_RF_POWER_STATE eRFPowerState); */ 96 97 /* 98 * BB TX Power R/W 99 * */ 100 void PHY_GetTxPowerLevel8188E(IN PADAPTER Adapter, 101 OUT s32 *powerlevel); 102 void PHY_SetTxPowerLevel8188E(IN PADAPTER Adapter, 103 IN u8 channel); 104 BOOLEAN PHY_UpdateTxPowerDbm8188E(IN PADAPTER Adapter, 105 IN int powerInDbm); 106 107 VOID 108 PHY_SetTxPowerIndex_8188E( 109 IN PADAPTER Adapter, 110 IN u32 PowerIndex, 111 IN u8 RFPath, 112 IN u8 Rate 113 ); 114 115 u8 116 PHY_GetTxPowerIndex_8188E( 117 IN PADAPTER pAdapter, 118 IN u8 RFPath, 119 IN u8 Rate, 120 IN CHANNEL_WIDTH BandWidth, 121 IN u8 Channel 122 ); 123 124 /* 125 * Switch bandwidth for 8192S 126 */ 127 /* extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); */ 128 void PHY_SetBWMode8188E(IN PADAPTER pAdapter, 129 IN CHANNEL_WIDTH ChnlWidth, 130 IN unsigned char Offset); 131 132 /* 133 * Set FW CMD IO for 8192S. 134 */ 135 /* extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, 136 * IN IO_TYPE IOType); */ 137 138 /* 139 * Set A2 entry to fw for 8192S 140 * */ 141 extern void FillA2Entry8192C(IN PADAPTER Adapter, 142 IN u8 index, 143 IN u8 *val); 144 145 146 /* 147 * channel switch related funciton 148 */ 149 /* extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); */ 150 void PHY_SwChnl8188E(IN PADAPTER pAdapter, 151 IN u8 channel); 152 153 VOID 154 PHY_SetSwChnlBWMode8188E( 155 IN PADAPTER Adapter, 156 IN u8 channel, 157 IN CHANNEL_WIDTH Bandwidth, 158 IN u8 Offset40, 159 IN u8 Offset80 160 ); 161 162 VOID 163 PHY_SetRFEReg_8188E( 164 IN PADAPTER Adapter 165 ); 166 /* 167 * BB/MAC/RF other monitor API 168 * */ 169 VOID PHY_SetRFPathSwitch_8188E(IN PADAPTER pAdapter, IN BOOLEAN bMain); 170 171 extern VOID 172 PHY_SwitchEphyParameter( 173 IN PADAPTER Adapter 174 ); 175 176 extern VOID 177 PHY_EnableHostClkReq( 178 IN PADAPTER Adapter 179 ); 180 181 BOOLEAN 182 SetAntennaConfig92C( 183 IN PADAPTER Adapter, 184 IN u8 DefaultAnt 185 ); 186 187 VOID 188 storePwrIndexDiffRateOffset( 189 IN PADAPTER Adapter, 190 IN u32 RegAddr, 191 IN u32 BitMask, 192 IN u32 Data 193 ); 194 /*--------------------------Exported Function prototype---------------------*/ 195 196 /* 197 * Initialization related function 198 * 199 * MAC/BB/RF HAL config */ 200 /* extern s32 PHY_MACConfig8723(PADAPTER padapter); 201 * s32 PHY_BBConfig8723(PADAPTER padapter); 202 * s32 PHY_RFConfig8723(PADAPTER padapter); */ 203 204 205 206 /* ****************************************************************** 207 * Note: If SIC_ENABLE under PCIE, because of the slow operation 208 * you should 209 * 2) "#define RTL8723_FPGA_VERIFICATION 1" in Precomp.h.WlanE.Windows 210 * 3) "#define RTL8190_Download_Firmware_From_Header 0" in Precomp.h.WlanE.Windows if needed. 211 * */ 212 #if (RTL8188E_SUPPORT == 1) && (RTL8188E_FPGA_TRUE_PHY_VERIFICATION == 1) 213 #define SIC_ENABLE 1 214 #define SIC_HW_SUPPORT 1 215 #else 216 #define SIC_ENABLE 0 217 #define SIC_HW_SUPPORT 0 218 #endif 219 /* ****************************************************************** */ 220 221 222 #define SIC_MAX_POLL_CNT 5 223 224 #if (SIC_HW_SUPPORT == 1) 225 #define SIC_CMD_READY 0 226 #define SIC_CMD_PREWRITE 0x1 227 #if (RTL8188E_SUPPORT == 1) 228 #define SIC_CMD_WRITE 0x40 229 #define SIC_CMD_PREREAD 0x2 230 #define SIC_CMD_READ 0x80 231 #define SIC_CMD_INIT 0xf0 232 #define SIC_INIT_VAL 0xff 233 234 #define SIC_INIT_REG 0x1b7 235 #define SIC_CMD_REG 0x1EB /* 1byte */ 236 #define SIC_ADDR_REG 0x1E8 /* 1b4~1b5, 2 bytes */ 237 #define SIC_DATA_REG 0x1EC /* 1b0~1b3 */ 238 #else 239 #define SIC_CMD_WRITE 0x11 240 #define SIC_CMD_PREREAD 0x2 241 #define SIC_CMD_READ 0x12 242 #define SIC_CMD_INIT 0x1f 243 #define SIC_INIT_VAL 0xff 244 245 #define SIC_INIT_REG 0x1b7 246 #define SIC_CMD_REG 0x1b6 /* 1byte */ 247 #define SIC_ADDR_REG 0x1b4 /* 1b4~1b5, 2 bytes */ 248 #define SIC_DATA_REG 0x1b0 /* 1b0~1b3 */ 249 #endif 250 #else 251 #define SIC_CMD_READY 0 252 #define SIC_CMD_WRITE 1 253 #define SIC_CMD_READ 2 254 255 #if (RTL8188E_SUPPORT == 1) 256 #define SIC_CMD_REG 0x1EB /* 1byte */ 257 #define SIC_ADDR_REG 0x1E8 /* 1b9~1ba, 2 bytes */ 258 #define SIC_DATA_REG 0x1EC /* 1bc~1bf */ 259 #else 260 #define SIC_CMD_REG 0x1b8 /* 1byte */ 261 #define SIC_ADDR_REG 0x1b9 /* 1b9~1ba, 2 bytes */ 262 #define SIC_DATA_REG 0x1bc /* 1bc~1bf */ 263 #endif 264 #endif 265 266 #if (SIC_ENABLE == 1) 267 VOID SIC_Init(IN PADAPTER Adapter); 268 #endif 269 270 271 #endif /* __INC_HAL8192CPHYCFG_H */ 272