1 /******************************************************************************
2 *
3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 *
19 ******************************************************************************/
20
21 //============================================================
22 // include files
23 //============================================================
24
25 #include "mp_precomp.h"
26 #include "phydm_precomp.h"
27
28 const u2Byte dB_Invert_Table[12][8] = {
29 { 1, 1, 1, 2, 2, 2, 2, 3},
30 { 3, 3, 4, 4, 4, 5, 6, 6},
31 { 7, 8, 9, 10, 11, 13, 14, 16},
32 { 18, 20, 22, 25, 28, 32, 35, 40},
33 { 45, 50, 56, 63, 71, 79, 89, 100},
34 { 112, 126, 141, 158, 178, 200, 224, 251},
35 { 282, 316, 355, 398, 447, 501, 562, 631},
36 { 708, 794, 891, 1000, 1122, 1259, 1413, 1585},
37 { 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981},
38 { 4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000},
39 { 11220, 12589, 14125, 15849, 17783, 19953, 22387, 25119},
40 { 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535}
41 };
42
43
44 //============================================================
45 // Local Function predefine.
46 //============================================================
47
48 /* START------------COMMON INFO RELATED--------------- */
49
50 VOID
51 odm_GlobalAdapterCheck(
52 IN VOID
53 );
54
55 //move to odm_PowerTacking.h by YuChen
56
57
58
59 VOID
60 odm_UpdatePowerTrainingState(
61 IN PDM_ODM_T pDM_Odm
62 );
63
64 //============================================================
65 //3 Export Interface
66 //============================================================
67
68 /*Y = 10*log(X)*/
69 s4Byte
ODM_PWdB_Conversion(IN s4Byte X,IN u4Byte TotalBit,IN u4Byte DecimalBit)70 ODM_PWdB_Conversion(
71 IN s4Byte X,
72 IN u4Byte TotalBit,
73 IN u4Byte DecimalBit
74 )
75 {
76 s4Byte Y, integer = 0, decimal = 0;
77 u4Byte i;
78
79 if(X == 0)
80 X = 1; // log2(x), x can't be 0
81
82 for(i = (TotalBit-1); i > 0; i--)
83 {
84 if(X & BIT(i))
85 {
86 integer = i;
87 if(i > 0)
88 decimal = (X & BIT(i-1))?2:0; //decimal is 0.5dB*3=1.5dB~=2dB
89 break;
90 }
91 }
92
93 Y = 3*(integer-DecimalBit)+decimal; //10*log(x)=3*log2(x),
94
95 return Y;
96 }
97
98 s4Byte
ODM_SignConversion(IN s4Byte value,IN u4Byte TotalBit)99 ODM_SignConversion(
100 IN s4Byte value,
101 IN u4Byte TotalBit
102 )
103 {
104 if(value&BIT(TotalBit-1))
105 value -= BIT(TotalBit);
106 return value;
107 }
108
109 void
phydm_seq_sorting(IN PVOID pDM_VOID,IN OUT u4Byte * p_value,IN OUT u4Byte * rank_idx,IN OUT u4Byte * p_idx_out,IN u1Byte seq_length)110 phydm_seq_sorting(
111 IN PVOID pDM_VOID,
112 IN OUT u4Byte *p_value,
113 IN OUT u4Byte *rank_idx,
114 IN OUT u4Byte *p_idx_out,
115 IN u1Byte seq_length
116 )
117 {
118 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
119 u1Byte i = 0 , j = 0;
120 u4Byte tmp_a, tmp_b;
121 u4Byte tmp_idx_a, tmp_idx_b;
122
123 for (i = 0; i < seq_length; i++) {
124 rank_idx[i] = i;
125 /**/
126 }
127
128 for (i = 0; i < (seq_length - 1); i++) {
129
130 for (j = 0; j < (seq_length - 1 - i); j++) {
131
132 tmp_a = p_value[j];
133 tmp_b = p_value[j+1];
134
135 tmp_idx_a = rank_idx[j];
136 tmp_idx_b = rank_idx[j+1];
137
138 if (tmp_a < tmp_b) {
139 p_value[j] = tmp_b;
140 p_value[j+1] = tmp_a;
141
142 rank_idx[j] = tmp_idx_b;
143 rank_idx[j+1] = tmp_idx_a;
144 }
145 }
146 }
147
148 for (i = 0; i < seq_length; i++) {
149 p_idx_out[rank_idx[i]] = i+1;
150 /**/
151 }
152
153
154
155 }
156
157 VOID
ODM_InitMpDriverStatus(IN PDM_ODM_T pDM_Odm)158 ODM_InitMpDriverStatus(
159 IN PDM_ODM_T pDM_Odm
160 )
161 {
162 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
163
164 // Decide when compile time
165 #if(MP_DRIVER == 1)
166 pDM_Odm->mp_mode = TRUE;
167 #else
168 pDM_Odm->mp_mode = FALSE;
169 #endif
170
171 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
172
173 PADAPTER Adapter = pDM_Odm->Adapter;
174
175 // Update information every period
176 pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
177
178 #else
179
180 prtl8192cd_priv priv = pDM_Odm->priv;
181
182 pDM_Odm->mp_mode = (BOOLEAN)priv->pshare->rf_ft_var.mp_specific;
183
184 #endif
185 }
186
187 VOID
ODM_UpdateMpDriverStatus(IN PDM_ODM_T pDM_Odm)188 ODM_UpdateMpDriverStatus(
189 IN PDM_ODM_T pDM_Odm
190 )
191 {
192 #if(DM_ODM_SUPPORT_TYPE & ODM_WIN)
193
194 // Do nothing.
195
196 #elif(DM_ODM_SUPPORT_TYPE & ODM_CE)
197 PADAPTER Adapter = pDM_Odm->Adapter;
198
199 // Update information erery period
200 pDM_Odm->mp_mode = (BOOLEAN)Adapter->registrypriv.mp_mode;
201
202 #else
203
204 // Do nothing.
205
206 #endif
207 }
208
209 VOID
PHYDM_InitTRXAntennaSetting(IN PDM_ODM_T pDM_Odm)210 PHYDM_InitTRXAntennaSetting(
211 IN PDM_ODM_T pDM_Odm
212 )
213 {
214 /*#if (RTL8814A_SUPPORT == 1)*/
215
216 if (pDM_Odm->SupportICType & (ODM_RTL8814A)) {
217 u1Byte RxAnt = 0, TxAnt = 0;
218
219 RxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH, pDM_Odm), ODM_BIT(BB_RX_PATH, pDM_Odm));
220 TxAnt = (u1Byte)ODM_GetBBReg(pDM_Odm, ODM_REG(BB_TX_PATH, pDM_Odm), ODM_BIT(BB_TX_PATH, pDM_Odm));
221 pDM_Odm->TXAntStatus = (TxAnt & 0xf);
222 pDM_Odm->RXAntStatus = (RxAnt & 0xf);
223 } else if (pDM_Odm->SupportICType & (ODM_RTL8723D | ODM_RTL8821C)) {
224 pDM_Odm->TXAntStatus = 0x1;
225 pDM_Odm->RXAntStatus = 0x1;
226
227 }
228 /*#endif*/
229 }
230
231 void
phydm_traffic_load_decision(IN PVOID pDM_VOID)232 phydm_traffic_load_decision(
233 IN PVOID pDM_VOID
234 )
235 {
236 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
237 pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
238
239 /*---trafic load decision---*/
240 pDM_Odm->curTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast) - pDM_Odm->lastTxOkCnt;
241 pDM_Odm->curRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast) - pDM_Odm->lastRxOkCnt;
242 pDM_Odm->lastTxOkCnt = *(pDM_Odm->pNumTxBytesUnicast);
243 pDM_Odm->lastRxOkCnt = *(pDM_Odm->pNumRxBytesUnicast);
244
245 #if (DM_ODM_SUPPORT_TYPE & ODM_AP)
246 pDM_Odm->tx_tp = ((pDM_Odm->tx_tp)>>1) + (u4Byte)(((pDM_Odm->curTxOkCnt)>>17)>>1); /* <<3(8bit), >>20(10^6,M)*/
247 pDM_Odm->rx_tp = ((pDM_Odm->rx_tp)>>1) + (u4Byte)(((pDM_Odm->curRxOkCnt)>>17)>>1); /* <<3(8bit), >>20(10^6,M)*/
248 #else
249 pDM_Odm->tx_tp = ((pDM_Odm->tx_tp)>>1) + (u4Byte)(((pDM_Odm->curTxOkCnt)>>18)>>1); /* <<3(8bit), >>20(10^6,M), >>1(2sec)*/
250 pDM_Odm->rx_tp = ((pDM_Odm->rx_tp)>>1) + (u4Byte)(((pDM_Odm->curRxOkCnt)>>18)>>1); /* <<3(8bit), >>20(10^6,M), >>1(2sec)*/
251 #endif
252 pDM_Odm->total_tp = pDM_Odm->tx_tp + pDM_Odm->rx_tp;
253
254
255 pDM_Odm->pre_TrafficLoad = pDM_Odm->TrafficLoad;
256
257 if (pDM_Odm->curTxOkCnt > 1875000 || pDM_Odm->curRxOkCnt > 1875000) { /* ( 1.875M * 8bit ) / 2sec= 7.5M bits /sec )*/
258
259 pDM_Odm->TrafficLoad = TRAFFIC_HIGH;
260 /**/
261 } else if (pDM_Odm->curTxOkCnt > 500000 || pDM_Odm->curRxOkCnt > 500000) { /*( 0.5M * 8bit ) / 2sec = 2M bits /sec )*/
262
263 pDM_Odm->TrafficLoad = TRAFFIC_MID;
264 /**/
265 } else if (pDM_Odm->curTxOkCnt > 100000 || pDM_Odm->curRxOkCnt > 100000) { /*( 0.1M * 8bit ) / 2sec = 0.4M bits /sec )*/
266
267 pDM_Odm->TrafficLoad = TRAFFIC_LOW;
268 /**/
269 } else {
270
271 pDM_Odm->TrafficLoad = TRAFFIC_ULTRA_LOW;
272 /**/
273 }
274 }
275
276 VOID
phydm_config_ofdm_tx_path(IN PDM_ODM_T pDM_Odm,IN u4Byte path)277 phydm_config_ofdm_tx_path(
278 IN PDM_ODM_T pDM_Odm,
279 IN u4Byte path
280 )
281 {
282 u1Byte ofdm_rx_path;
283
284 #if (RTL8192E_SUPPORT == 1)
285 if (pDM_Odm->SupportICType & (ODM_RTL8192E)) {
286
287 if (path == PHYDM_A) {
288 ODM_SetBBReg(pDM_Odm, 0x90c , bMaskDWord, 0x81321311);
289 /**/
290 } else if (path == PHYDM_B) {
291 ODM_SetBBReg(pDM_Odm, 0x90c , bMaskDWord, 0x82321322);
292 /**/
293 } else if (path == PHYDM_AB) {
294 ODM_SetBBReg(pDM_Odm, 0x90c , bMaskDWord, 0x83321333);
295 /**/
296 }
297
298
299 }
300 #endif
301 }
302
303 VOID
phydm_config_ofdm_rx_path(IN PDM_ODM_T pDM_Odm,IN u4Byte path)304 phydm_config_ofdm_rx_path(
305 IN PDM_ODM_T pDM_Odm,
306 IN u4Byte path
307 )
308 {
309 u1Byte ofdm_rx_path = 0;
310
311 #if (RTL8192E_SUPPORT == 1)
312 if (pDM_Odm->SupportICType & (ODM_RTL8192E)) {
313
314 if (path == PHYDM_A) {
315 ofdm_rx_path = 1;
316 /**/
317 } else if (path == PHYDM_B) {
318 ofdm_rx_path = 2;
319 /**/
320 } else if (path == PHYDM_AB) {
321 ofdm_rx_path = 3;
322 /**/
323 }
324
325 ODM_SetBBReg(pDM_Odm, 0xC04 , 0xff, (((ofdm_rx_path)<<4)|ofdm_rx_path));
326 ODM_SetBBReg(pDM_Odm, 0xD04 , 0xf, ofdm_rx_path);
327 }
328 #endif
329 }
330
331 VOID
phydm_config_cck_rx_antenna_init(IN PDM_ODM_T pDM_Odm)332 phydm_config_cck_rx_antenna_init(
333 IN PDM_ODM_T pDM_Odm
334 )
335 {
336 #if (RTL8192E_SUPPORT == 1)
337 if (pDM_Odm->SupportICType & (ODM_RTL8192E)) {
338
339 /*CCK 2R CCA parameters*/
340 ODM_SetBBReg(pDM_Odm, 0xa2c , BIT18, 1); /*enable 2R Rx path*/
341 ODM_SetBBReg(pDM_Odm, 0xa2c , BIT22, 1); /*enable 2R MRC*/
342 ODM_SetBBReg(pDM_Odm, 0xa84 , BIT28, 1); /*1. pdx1[5:0] > 2*PD_lim 2. RXIQ_3 = 0 ( signed )*/
343 ODM_SetBBReg(pDM_Odm, 0xa70 , BIT7, 0); /*Concurrent CCA at LSB & USB*/
344 ODM_SetBBReg(pDM_Odm, 0xa74 , BIT8, 0); /*RX path diversity enable*/
345 ODM_SetBBReg(pDM_Odm, 0xa08 , BIT28, 1); /* r_cck_2nd_sel_eco*/
346 ODM_SetBBReg(pDM_Odm, 0xa14 , BIT7, 0); /* r_en_mrc_antsel*/
347 }
348 #endif
349 }
350
351 VOID
phydm_config_cck_rx_path(IN PDM_ODM_T pDM_Odm,IN u1Byte path,IN u1Byte path_div_en)352 phydm_config_cck_rx_path(
353 IN PDM_ODM_T pDM_Odm,
354 IN u1Byte path,
355 IN u1Byte path_div_en
356 )
357 {
358 u1Byte path_div_select = 0;
359 u1Byte cck_1_path = 0, cck_2_path = 0;
360
361 #if (RTL8192E_SUPPORT == 1)
362 if (pDM_Odm->SupportICType & (ODM_RTL8192E)) {
363
364 if (path == PHYDM_A) {
365 path_div_select = 0;
366 cck_1_path = 0;
367 cck_2_path = 0;
368 } else if (path == PHYDM_B) {
369 path_div_select = 0;
370 cck_1_path = 1;
371 cck_2_path = 1;
372 } else if (path == PHYDM_AB) {
373
374 if (path_div_en == CCA_PATHDIV_ENABLE)
375 path_div_select = 1;
376
377 cck_1_path = 0;
378 cck_2_path = 1;
379
380 }
381
382 ODM_SetBBReg(pDM_Odm, 0xa04 , (BIT27|BIT26), cck_1_path);
383 ODM_SetBBReg(pDM_Odm, 0xa04 , (BIT25|BIT24), cck_2_path);
384 ODM_SetBBReg(pDM_Odm, 0xa74 , BIT8, path_div_select);
385
386 }
387 #endif
388 }
389
390 VOID
phydm_config_trx_path(IN PVOID pDM_VOID,IN u4Byte * const dm_value,IN u4Byte * _used,OUT char * output,IN u4Byte * _out_len)391 phydm_config_trx_path(
392 IN PVOID pDM_VOID,
393 IN u4Byte *const dm_value,
394 IN u4Byte *_used,
395 OUT char *output,
396 IN u4Byte *_out_len
397 )
398 {
399 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
400 u4Byte pre_support_ability;
401 u4Byte used = *_used;
402 u4Byte out_len = *_out_len;
403
404 /* CCK */
405 if (dm_value[0] == 0) {
406
407 if (dm_value[1] == 1) { /*TX*/
408 if (dm_value[2] == 1)
409 ODM_SetBBReg(pDM_Odm, 0xa04, 0xf0000000, 0x8);
410 else if (dm_value[2] == 2)
411 ODM_SetBBReg(pDM_Odm, 0xa04, 0xf0000000, 0x4);
412 else if (dm_value[2] == 3)
413 ODM_SetBBReg(pDM_Odm, 0xa04, 0xf0000000, 0xc);
414 } else if (dm_value[1] == 2) { /*RX*/
415
416 phydm_config_cck_rx_antenna_init(pDM_Odm);
417
418 if (dm_value[2] == 1) {
419 phydm_config_cck_rx_path(pDM_Odm, PHYDM_A, CCA_PATHDIV_DISABLE);
420 } else if (dm_value[2] == 2) {
421 phydm_config_cck_rx_path(pDM_Odm, PHYDM_B, CCA_PATHDIV_DISABLE);
422 } else if (dm_value[2] == 3) {
423 if (dm_value[3] == 1) /*enable path diversity*/
424 phydm_config_cck_rx_path(pDM_Odm, PHYDM_AB, CCA_PATHDIV_ENABLE);
425 else
426 phydm_config_cck_rx_path(pDM_Odm, PHYDM_B, CCA_PATHDIV_DISABLE);
427 }
428 }
429 }
430 /* OFDM */
431 else if (dm_value[0] == 1) {
432
433 if (dm_value[1] == 1) { /*TX*/
434 phydm_config_ofdm_tx_path(pDM_Odm, dm_value[2]);
435 /**/
436 } else if (dm_value[1] == 2) { /*RX*/
437 phydm_config_ofdm_rx_path(pDM_Odm, dm_value[2]);
438 /**/
439 }
440 }
441
442 PHYDM_SNPRINTF((output+used, out_len-used, "PHYDM Set Path [%s] [%s] = [%s%s%s%s]\n",
443 (dm_value[0] == 1) ? "CCK" : "OFDM",
444 (dm_value[1] == 1) ? "TX" : "RX",
445 (dm_value[2] & 0x1)?"A":"",
446 (dm_value[2] & 0x2)?"B":"",
447 (dm_value[2] & 0x4)?"C":"",
448 (dm_value[2] & 0x8)?"D":""
449 ));
450
451 }
452
453 VOID
phydm_Init_cck_setting(IN PDM_ODM_T pDM_Odm)454 phydm_Init_cck_setting(
455 IN PDM_ODM_T pDM_Odm
456 )
457 {
458 u4Byte value_824,value_82c;
459
460 pDM_Odm->bCckHighPower = (BOOLEAN) ODM_GetBBReg(pDM_Odm, ODM_REG(CCK_RPT_FORMAT,pDM_Odm), ODM_BIT(CCK_RPT_FORMAT,pDM_Odm));
461
462 #if (RTL8192E_SUPPORT == 1)
463 if(pDM_Odm->SupportICType & (ODM_RTL8192E))
464 {
465 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
466 phydm_config_cck_rx_antenna_init(pDM_Odm);
467 phydm_config_cck_rx_path(pDM_Odm, PHYDM_A, CCA_PATHDIV_DISABLE);
468 #endif
469
470 /* 0x824[9] = 0x82C[9] = 0xA80[7] those registers setting should be equal or CCK RSSI report may be incorrect */
471 value_824 = ODM_GetBBReg(pDM_Odm, 0x824, BIT9);
472 value_82c = ODM_GetBBReg(pDM_Odm, 0x82c, BIT9);
473
474 if(value_824 != value_82c)
475 {
476 ODM_SetBBReg(pDM_Odm, 0x82c , BIT9, value_824);
477 }
478 ODM_SetBBReg(pDM_Odm, 0xa80 , BIT7, value_824);
479 pDM_Odm->cck_agc_report_type = (BOOLEAN)value_824;
480
481 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("cck_agc_report_type = (( %d )), ExtLNAGain = (( %d ))\n", pDM_Odm->cck_agc_report_type, pDM_Odm->ExtLNAGain));
482 }
483 #endif
484
485 #if ((RTL8703B_SUPPORT == 1) || (RTL8723D_SUPPORT == 1))
486 if (pDM_Odm->SupportICType & (ODM_RTL8703B|ODM_RTL8723D)) {
487
488 pDM_Odm->cck_agc_report_type = ODM_GetBBReg(pDM_Odm, 0x950, BIT11) ? 1 : 0; /*1: 4bit LNA , 0: 3bit LNA */
489
490 if (pDM_Odm->cck_agc_report_type != 1) {
491 DbgPrint("[Warning] 8703B/8723D CCK should be 4bit LNA, ie. 0x950[11] = 1\n");
492 /**/
493 }
494 }
495 #endif
496
497 #if ((RTL8723D_SUPPORT == 1) || (RTL8822B_SUPPORT == 1) || (RTL8197F_SUPPORT == 1))
498
499 if (pDM_Odm->SupportICType & (ODM_RTL8723D|ODM_RTL8822B|ODM_RTL8197F)) {
500 pDM_Odm->cck_new_agc = ODM_GetBBReg(pDM_Odm, 0xa9c, BIT17)?TRUE:FALSE; /*1: new agc 0: old agc*/
501 } else
502 #endif
503 pDM_Odm->cck_new_agc = FALSE;
504
505 }
506
507 VOID
PHYDM_InitSoftMLSetting(IN PDM_ODM_T pDM_Odm)508 PHYDM_InitSoftMLSetting(
509 IN PDM_ODM_T pDM_Odm
510 )
511 {
512 #if (RTL8822B_SUPPORT == 1)
513 if (pDM_Odm->mp_mode == FALSE) {
514 if (pDM_Odm->SupportICType & ODM_RTL8822B)
515 ODM_SetBBReg(pDM_Odm, 0x19a8, bMaskDWord, 0xc10a0000);
516 }
517 #endif
518 }
519
520 VOID
PHYDM_InitHwInfoByRfe(IN PDM_ODM_T pDM_Odm)521 PHYDM_InitHwInfoByRfe(
522 IN PDM_ODM_T pDM_Odm
523 )
524 {
525 #if (RTL8822B_SUPPORT == 1)
526 if (pDM_Odm->SupportICType & ODM_RTL8822B)
527 phydm_init_hw_info_by_rfe_type_8822b(pDM_Odm);
528 #endif
529 }
530
531 VOID
odm_CommonInfoSelfInit(IN PDM_ODM_T pDM_Odm)532 odm_CommonInfoSelfInit(
533 IN PDM_ODM_T pDM_Odm
534 )
535 {
536 phydm_Init_cck_setting(pDM_Odm);
537 pDM_Odm->RFPathRxEnable = (u1Byte) ODM_GetBBReg(pDM_Odm, ODM_REG(BB_RX_PATH,pDM_Odm), ODM_BIT(BB_RX_PATH,pDM_Odm));
538 #if (DM_ODM_SUPPORT_TYPE != ODM_CE)
539 pDM_Odm->pbNet_closed = &pDM_Odm->BOOLEAN_temp;
540 #endif
541
542 PHYDM_InitDebugSetting(pDM_Odm);
543 ODM_InitMpDriverStatus(pDM_Odm);
544 PHYDM_InitTRXAntennaSetting(pDM_Odm);
545 PHYDM_InitSoftMLSetting(pDM_Odm);
546
547 pDM_Odm->TxRate = 0xFF;
548
549 pDM_Odm->number_linked_client = 0;
550 pDM_Odm->pre_number_linked_client = 0;
551 pDM_Odm->number_active_client = 0;
552 pDM_Odm->pre_number_active_client = 0;
553
554 pDM_Odm->lastTxOkCnt = 0;
555 pDM_Odm->lastRxOkCnt = 0;
556 pDM_Odm->tx_tp = 0;
557 pDM_Odm->rx_tp = 0;
558 pDM_Odm->total_tp = 0;
559 pDM_Odm->TrafficLoad = TRAFFIC_LOW;
560
561 pDM_Odm->nbi_set_result = 0;
562
563 }
564
565 VOID
odm_CommonInfoSelfUpdate(IN PDM_ODM_T pDM_Odm)566 odm_CommonInfoSelfUpdate(
567 IN PDM_ODM_T pDM_Odm
568 )
569 {
570 u1Byte EntryCnt = 0, num_active_client = 0;
571 u4Byte i, OneEntry_MACID = 0, ma_rx_tp = 0;
572 PSTA_INFO_T pEntry;
573
574 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
575
576 PADAPTER Adapter = pDM_Odm->Adapter;
577 PMGNT_INFO pMgntInfo = &Adapter->MgntInfo;
578
579 pEntry = pDM_Odm->pODM_StaInfo[0];
580 if (pMgntInfo->mAssoc) {
581 pEntry->bUsed = TRUE;
582 for (i = 0; i < 6; i++)
583 pEntry->MacAddr[i] = pMgntInfo->Bssid[i];
584 } else if (GetFirstClientPort(Adapter)) {
585 PADAPTER pClientAdapter = GetFirstClientPort(Adapter);
586
587 pEntry->bUsed = TRUE;
588 for (i = 0; i < 6; i++)
589 pEntry->MacAddr[i] = pClientAdapter->MgntInfo.Bssid[i];
590 } else {
591 pEntry->bUsed = FALSE;
592 for (i = 0; i < 6; i++)
593 pEntry->MacAddr[i] = 0;
594 }
595
596 //STA mode is linked to AP
597 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[0]) && !ACTING_AS_AP(Adapter))
598 pDM_Odm->bsta_state = TRUE;
599 else
600 pDM_Odm->bsta_state = FALSE;
601 #endif
602
603 /* THis variable cannot be used because it is wrong*/
604 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
605 if (*(pDM_Odm->pBandWidth) == ODM_BW40M)
606 {
607 if (*(pDM_Odm->pSecChOffset) == 1)
608 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2;
609 else if (*(pDM_Odm->pSecChOffset) == 2)
610 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2;
611 } else if (*(pDM_Odm->pBandWidth) == ODM_BW80M) {
612 if (*(pDM_Odm->pSecChOffset) == 1)
613 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 6;
614 else if (*(pDM_Odm->pSecChOffset) == 2)
615 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 6;
616 } else
617 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
618 #else
619 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) {
620 if (*(pDM_Odm->pSecChOffset) == 1)
621 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2;
622 else if (*(pDM_Odm->pSecChOffset) == 2)
623 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2;
624 } else
625 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel);
626 #endif
627
628 for (i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
629 {
630 pEntry = pDM_Odm->pODM_StaInfo[i];
631 if(IS_STA_VALID(pEntry))
632 {
633 EntryCnt++;
634 if(EntryCnt==1)
635 {
636 OneEntry_MACID=i;
637 }
638
639 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
640 ma_rx_tp = (pEntry->rx_byte_cnt_LowMAW)<<3; /* low moving average RX TP ( bit /sec)*/
641
642 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_RA_DBG, ODM_DBG_LOUD, ("ClientTP[%d]: ((%d )) bit/sec\n", i, ma_rx_tp));
643
644 if (ma_rx_tp > ACTIVE_TP_THRESHOLD)
645 num_active_client++;
646 #endif
647 }
648 }
649
650 if(EntryCnt == 1)
651 {
652 pDM_Odm->bOneEntryOnly = TRUE;
653 pDM_Odm->OneEntry_MACID=OneEntry_MACID;
654 }
655 else
656 pDM_Odm->bOneEntryOnly = FALSE;
657
658 pDM_Odm->pre_number_linked_client = pDM_Odm->number_linked_client;
659 pDM_Odm->pre_number_active_client = pDM_Odm->number_active_client;
660
661 pDM_Odm->number_linked_client = EntryCnt;
662 pDM_Odm->number_active_client = num_active_client;
663
664 /* Update MP driver status*/
665 ODM_UpdateMpDriverStatus(pDM_Odm);
666
667 /*Traffic load information update*/
668 phydm_traffic_load_decision(pDM_Odm);
669 }
670
671 VOID
odm_CommonInfoSelfReset(IN PDM_ODM_T pDM_Odm)672 odm_CommonInfoSelfReset(
673 IN PDM_ODM_T pDM_Odm
674 )
675 {
676 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
677 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt = 0;
678 #endif
679 }
680
681 PVOID
PhyDM_Get_Structure(IN PDM_ODM_T pDM_Odm,IN u1Byte Structure_Type)682 PhyDM_Get_Structure(
683 IN PDM_ODM_T pDM_Odm,
684 IN u1Byte Structure_Type
685 )
686
687 {
688 PVOID pStruct = NULL;
689 #if RTL8195A_SUPPORT
690 switch (Structure_Type){
691 case PHYDM_FALSEALMCNT:
692 pStruct = &FalseAlmCnt;
693 break;
694
695 case PHYDM_CFOTRACK:
696 pStruct = &DM_CfoTrack;
697 break;
698
699 case PHYDM_ADAPTIVITY:
700 pStruct = &(pDM_Odm->Adaptivity);
701 break;
702
703 default:
704 break;
705 }
706
707 #else
708 switch (Structure_Type){
709 case PHYDM_FALSEALMCNT:
710 pStruct = &(pDM_Odm->FalseAlmCnt);
711 break;
712
713 case PHYDM_CFOTRACK:
714 pStruct = &(pDM_Odm->DM_CfoTrack);
715 break;
716
717 case PHYDM_ADAPTIVITY:
718 pStruct = &(pDM_Odm->Adaptivity);
719 break;
720
721 default:
722 break;
723 }
724
725 #endif
726 return pStruct;
727 }
728
729 VOID
odm_HWSetting(IN PDM_ODM_T pDM_Odm)730 odm_HWSetting(
731 IN PDM_ODM_T pDM_Odm
732 )
733 {
734 #if (RTL8821A_SUPPORT == 1)
735 if(pDM_Odm->SupportICType & ODM_RTL8821)
736 odm_HWSetting_8821A(pDM_Odm);
737 #endif
738
739 #if (RTL8814A_SUPPORT == 1)
740 if (pDM_Odm->SupportICType & ODM_RTL8814A)
741 phydm_hwsetting_8814a(pDM_Odm);
742 #endif
743
744 }
745
746 //
747 // 2011/09/21 MH Add to describe different team necessary resource allocate??
748 //
749 VOID
ODM_DMInit(IN PDM_ODM_T pDM_Odm)750 ODM_DMInit(
751 IN PDM_ODM_T pDM_Odm
752 )
753 {
754 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
755 PADAPTER Adapter = pDM_Odm->Adapter;
756 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
757 #endif
758
759 odm_CommonInfoSelfInit(pDM_Odm);
760 odm_DIGInit(pDM_Odm);
761 Phydm_NHMCounterStatisticsInit(pDM_Odm);
762 Phydm_AdaptivityInit(pDM_Odm);
763 phydm_ra_info_init(pDM_Odm);
764 odm_RateAdaptiveMaskInit(pDM_Odm);
765 ODM_CfoTrackingInit(pDM_Odm);
766 ODM_EdcaTurboInit(pDM_Odm);
767 odm_RSSIMonitorInit(pDM_Odm);
768 phydm_rf_init(pDM_Odm);
769 odm_TXPowerTrackingInit(pDM_Odm);
770 odm_AntennaDiversityInit(pDM_Odm);
771 odm_AutoChannelSelectInit(pDM_Odm);
772 odm_PathDiversityInit(pDM_Odm);
773 odm_DynamicTxPowerInit(pDM_Odm);
774 phydm_initRaInfo(pDM_Odm);
775 #if (PHYDM_LA_MODE_SUPPORT == 1)
776 ADCSmp_Init(pDM_Odm);
777 #endif
778
779 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
780 #ifdef BEAMFORMING_VERSION_1
781 if (pHalData->BeamformingVersion == BEAMFORMING_VERSION_1)
782 #endif
783 {
784 phydm_Beamforming_Init(pDM_Odm);
785 }
786 #endif
787
788 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
789 {
790 odm_DynamicBBPowerSavingInit(pDM_Odm);
791
792 #if (RTL8188E_SUPPORT == 1)
793 if(pDM_Odm->SupportICType==ODM_RTL8188E)
794 {
795 ODM_PrimaryCCA_Init(pDM_Odm);
796 ODM_RAInfo_Init_all(pDM_Odm);
797 }
798 #endif
799
800 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
801
802 #if (RTL8723B_SUPPORT == 1)
803 if(pDM_Odm->SupportICType == ODM_RTL8723B)
804 odm_SwAntDetectInit(pDM_Odm);
805 #endif
806
807 #if (RTL8192E_SUPPORT == 1)
808 if(pDM_Odm->SupportICType==ODM_RTL8192E)
809 odm_PrimaryCCA_Check_Init(pDM_Odm);
810 #endif
811
812 #endif
813
814 }
815
816 }
817
818 VOID
ODM_DMReset(IN PDM_ODM_T pDM_Odm)819 ODM_DMReset(
820 IN PDM_ODM_T pDM_Odm
821 )
822 {
823 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
824
825 ODM_AntDivReset(pDM_Odm);
826 phydm_setEDCCAThresholdAPI(pDM_Odm, pDM_DigTable->CurIGValue);
827 }
828
829
830 VOID
phydm_support_ability_debug(IN PVOID pDM_VOID,IN u4Byte * const dm_value,IN u4Byte * _used,OUT char * output,IN u4Byte * _out_len)831 phydm_support_ability_debug(
832 IN PVOID pDM_VOID,
833 IN u4Byte *const dm_value,
834 IN u4Byte *_used,
835 OUT char *output,
836 IN u4Byte *_out_len
837 )
838 {
839 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
840 u4Byte pre_support_ability;
841 u4Byte used = *_used;
842 u4Byte out_len = *_out_len;
843
844 pre_support_ability = pDM_Odm->SupportAbility ;
845 PHYDM_SNPRINTF((output+used, out_len-used,"\n%s\n", "================================"));
846 if(dm_value[0] == 100)
847 {
848 PHYDM_SNPRINTF((output+used, out_len-used, "[Supportability] PhyDM Selection\n"));
849 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================"));
850 PHYDM_SNPRINTF((output+used, out_len-used, "00. (( %s ))DIG\n", ((pDM_Odm->SupportAbility & ODM_BB_DIG)?("V"):("."))));
851 PHYDM_SNPRINTF((output+used, out_len-used, "01. (( %s ))RA_MASK\n", ((pDM_Odm->SupportAbility & ODM_BB_RA_MASK)?("V"):("."))));
852 PHYDM_SNPRINTF((output+used, out_len-used, "02. (( %s ))DYNAMIC_TXPWR\n", ((pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)?("V"):("."))));
853 PHYDM_SNPRINTF((output+used, out_len-used, "03. (( %s ))FA_CNT\n", ((pDM_Odm->SupportAbility & ODM_BB_FA_CNT)?("V"):("."))));
854 PHYDM_SNPRINTF((output+used, out_len-used, "04. (( %s ))RSSI_MONITOR\n", ((pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)?("V"):("."))));
855 PHYDM_SNPRINTF((output+used, out_len-used, "05. (( %s ))CCK_PD\n", ((pDM_Odm->SupportAbility & ODM_BB_CCK_PD)?("V"):("."))));
856 PHYDM_SNPRINTF((output+used, out_len-used, "06. (( %s ))ANT_DIV\n", ((pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)?("V"):("."))));
857 PHYDM_SNPRINTF((output+used, out_len-used, "08. (( %s ))PWR_TRAIN\n", ((pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN)?("V"):("."))));
858 PHYDM_SNPRINTF((output+used, out_len-used, "09. (( %s ))RATE_ADAPTIVE\n", ((pDM_Odm->SupportAbility & ODM_BB_RATE_ADAPTIVE)?("V"):("."))));
859 PHYDM_SNPRINTF((output+used, out_len-used, "10. (( %s ))PATH_DIV\n", ((pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)?("V"):("."))));
860 PHYDM_SNPRINTF((output+used, out_len-used, "13. (( %s ))ADAPTIVITY\n", ((pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)?("V"):("."))));
861 PHYDM_SNPRINTF((output+used, out_len-used, "14. (( %s ))CFO_TRACKING\n", ((pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)?("V"):("."))));
862 PHYDM_SNPRINTF((output+used, out_len-used, "15. (( %s ))NHM_CNT\n", ((pDM_Odm->SupportAbility & ODM_BB_NHM_CNT)?("V"):("."))));
863 PHYDM_SNPRINTF((output+used, out_len-used, "16. (( %s ))PRIMARY_CCA\n", ((pDM_Odm->SupportAbility & ODM_BB_PRIMARY_CCA)?("V"):("."))));
864 PHYDM_SNPRINTF((output+used, out_len-used, "17. (( %s ))TXBF\n", ((pDM_Odm->SupportAbility & ODM_BB_TXBF)?("V"):("."))));
865 PHYDM_SNPRINTF((output+used, out_len-used, "18. (( %s ))DYNAMIC_ARFR\n", ((pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_ARFR)?("V"):("."))));
866 PHYDM_SNPRINTF((output+used, out_len-used, "20. (( %s ))EDCA_TURBO\n", ((pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)?("V"):("."))));
867 PHYDM_SNPRINTF((output+used, out_len-used, "21. (( %s ))EARLY_MODE\n", ((pDM_Odm->SupportAbility & ODM_MAC_EARLY_MODE)?("V"):("."))));
868 PHYDM_SNPRINTF((output+used, out_len-used, "24. (( %s ))TX_PWR_TRACK\n", ((pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)?("V"):("."))));
869 PHYDM_SNPRINTF((output+used, out_len-used, "25. (( %s ))RX_GAIN_TRACK\n", ((pDM_Odm->SupportAbility & ODM_RF_RX_GAIN_TRACK)?("V"):("."))));
870 PHYDM_SNPRINTF((output+used, out_len-used, "26. (( %s ))RF_CALIBRATION\n", ((pDM_Odm->SupportAbility & ODM_RF_CALIBRATION)?("V"):("."))));
871 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================"));
872 }
873 /*
874 else if(dm_value[0] == 101)
875 {
876 pDM_Odm->SupportAbility = 0 ;
877 DbgPrint("Disable all SupportAbility components \n");
878 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "Disable all SupportAbility components"));
879 }
880 */
881 else
882 {
883
884 if(dm_value[1] == 1) //enable
885 {
886 pDM_Odm->SupportAbility |= BIT(dm_value[0]) ;
887 if(BIT(dm_value[0]) & ODM_BB_PATH_DIV)
888 {
889 odm_PathDiversityInit(pDM_Odm);
890 }
891 }
892 else if(dm_value[1] == 2) //disable
893 {
894 pDM_Odm->SupportAbility &= ~(BIT(dm_value[0])) ;
895 }
896 else
897 {
898 //DbgPrint("\n[Warning!!!] 1:enable, 2:disable \n\n");
899 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "[Warning!!!] 1:enable, 2:disable"));
900 }
901 }
902 PHYDM_SNPRINTF((output+used, out_len-used,"pre-SupportAbility = 0x%x\n", pre_support_ability ));
903 PHYDM_SNPRINTF((output+used, out_len-used,"Curr-SupportAbility = 0x%x\n", pDM_Odm->SupportAbility ));
904 PHYDM_SNPRINTF((output+used, out_len-used,"%s\n", "================================"));
905 }
906
907 #if (DM_ODM_SUPPORT_TYPE & ODM_WIN)
908 //
909 //tmp modify for LC Only
910 //
911 VOID
ODM_DMWatchdog_LPS(IN PDM_ODM_T pDM_Odm)912 ODM_DMWatchdog_LPS(
913 IN PDM_ODM_T pDM_Odm
914 )
915 {
916 odm_CommonInfoSelfUpdate(pDM_Odm);
917 odm_FalseAlarmCounterStatistics(pDM_Odm);
918 odm_RSSIMonitorCheck(pDM_Odm);
919 odm_DIGbyRSSI_LPS(pDM_Odm);
920 odm_CCKPacketDetectionThresh(pDM_Odm);
921 odm_CommonInfoSelfReset(pDM_Odm);
922
923 if(*(pDM_Odm->pbPowerSaving)==TRUE)
924 return;
925 }
926 #endif
927 //
928 // 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM.
929 // You can not add any dummy function here, be care, you can only use DM structure
930 // to perform any new ODM_DM.
931 //
932 VOID
ODM_DMWatchdog(IN PDM_ODM_T pDM_Odm)933 ODM_DMWatchdog(
934 IN PDM_ODM_T pDM_Odm
935 )
936 {
937 odm_CommonInfoSelfUpdate(pDM_Odm);
938 phydm_BasicDbgMessage(pDM_Odm);
939 odm_HWSetting(pDM_Odm);
940
941 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
942 {
943 prtl8192cd_priv priv = pDM_Odm->priv;
944 if( (priv->auto_channel != 0) && (priv->auto_channel != 2) )//if ACS running, do not do FA/CCA counter read
945 return;
946 }
947 #endif
948 odm_FalseAlarmCounterStatistics(pDM_Odm);
949 phydm_NoisyDetection(pDM_Odm);
950
951 odm_RSSIMonitorCheck(pDM_Odm);
952
953 if(*(pDM_Odm->pbPowerSaving) == TRUE)
954 {
955 odm_DIGbyRSSI_LPS(pDM_Odm);
956 {
957 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
958 Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue);
959 }
960 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE))
961 odm_AntennaDiversity(pDM_Odm); /*enable AntDiv in PS mode, request from SD4 Jeff*/
962 #endif
963 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD, ("DMWatchdog in power saving mode\n"));
964 return;
965 }
966
967 Phydm_CheckAdaptivity(pDM_Odm);
968 odm_UpdatePowerTrainingState(pDM_Odm);
969 odm_DIG(pDM_Odm);
970 {
971 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
972 Phydm_Adaptivity(pDM_Odm, pDM_DigTable->CurIGValue);
973 }
974 odm_CCKPacketDetectionThresh(pDM_Odm);
975
976 phydm_ra_info_watchdog(pDM_Odm);
977 odm_EdcaTurboCheck(pDM_Odm);
978 odm_PathDiversity(pDM_Odm);
979 ODM_CfoTracking(pDM_Odm);
980 odm_DynamicTxPower(pDM_Odm);
981 odm_AntennaDiversity(pDM_Odm);
982 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
983 phydm_Beamforming_Watchdog(pDM_Odm);
984 #endif
985
986 phydm_rf_watchdog(pDM_Odm);
987
988 if(pDM_Odm->SupportICType & ODM_IC_11N_SERIES)
989 {
990
991 #if (RTL8188E_SUPPORT == 1)
992 if (pDM_Odm->SupportICType == ODM_RTL8188E)
993 ODM_DynamicPrimaryCCA(pDM_Odm);
994 #endif
995
996 #if( DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
997
998 #if (RTL8192E_SUPPORT == 1)
999 if(pDM_Odm->SupportICType==ODM_RTL8192E)
1000 odm_DynamicPrimaryCCA_Check(pDM_Odm);
1001 #endif
1002 #endif
1003 }
1004
1005 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
1006 odm_dtc(pDM_Odm);
1007 #endif
1008
1009 odm_CommonInfoSelfReset(pDM_Odm);
1010
1011 }
1012
1013
1014 //
1015 // Init /.. Fixed HW value. Only init time.
1016 //
1017 VOID
ODM_CmnInfoInit(IN PDM_ODM_T pDM_Odm,IN ODM_CMNINFO_E CmnInfo,IN u4Byte Value)1018 ODM_CmnInfoInit(
1019 IN PDM_ODM_T pDM_Odm,
1020 IN ODM_CMNINFO_E CmnInfo,
1021 IN u4Byte Value
1022 )
1023 {
1024 //
1025 // This section is used for init value
1026 //
1027 switch (CmnInfo)
1028 {
1029 //
1030 // Fixed ODM value.
1031 //
1032 case ODM_CMNINFO_ABILITY:
1033 pDM_Odm->SupportAbility = (u4Byte)Value;
1034 break;
1035
1036 case ODM_CMNINFO_RF_TYPE:
1037 pDM_Odm->RFType = (u1Byte)Value;
1038 break;
1039
1040 case ODM_CMNINFO_PLATFORM:
1041 pDM_Odm->SupportPlatform = (u1Byte)Value;
1042 break;
1043
1044 case ODM_CMNINFO_INTERFACE:
1045 pDM_Odm->SupportInterface = (u1Byte)Value;
1046 break;
1047
1048 case ODM_CMNINFO_MP_TEST_CHIP:
1049 pDM_Odm->bIsMPChip= (u1Byte)Value;
1050 break;
1051
1052 case ODM_CMNINFO_IC_TYPE:
1053 pDM_Odm->SupportICType = Value;
1054 break;
1055
1056 case ODM_CMNINFO_CUT_VER:
1057 pDM_Odm->CutVersion = (u1Byte)Value;
1058 break;
1059
1060 case ODM_CMNINFO_FAB_VER:
1061 pDM_Odm->FabVersion = (u1Byte)Value;
1062 break;
1063
1064 case ODM_CMNINFO_RFE_TYPE:
1065 pDM_Odm->RFEType = (u1Byte)Value;
1066 PHYDM_InitHwInfoByRfe(pDM_Odm);
1067 break;
1068
1069 case ODM_CMNINFO_RF_ANTENNA_TYPE:
1070 pDM_Odm->AntDivType= (u1Byte)Value;
1071 break;
1072
1073 case ODM_CMNINFO_WITH_EXT_ANTENNA_SWITCH:
1074 pDM_Odm->with_extenal_ant_switch = (u1Byte)Value;
1075 break;
1076
1077 case ODM_CMNINFO_BE_FIX_TX_ANT:
1078 pDM_Odm->DM_FatTable.b_fix_tx_ant = (u1Byte)Value;
1079 break;
1080
1081 case ODM_CMNINFO_BOARD_TYPE:
1082 if (!pDM_Odm->bInitHwInfoByRfe)
1083 pDM_Odm->BoardType = (u1Byte)Value;
1084 break;
1085
1086 case ODM_CMNINFO_PACKAGE_TYPE:
1087 if (!pDM_Odm->bInitHwInfoByRfe)
1088 pDM_Odm->PackageType = (u1Byte)Value;
1089 break;
1090
1091 case ODM_CMNINFO_EXT_LNA:
1092 if (!pDM_Odm->bInitHwInfoByRfe)
1093 pDM_Odm->ExtLNA = (u1Byte)Value;
1094 break;
1095
1096 case ODM_CMNINFO_5G_EXT_LNA:
1097 if (!pDM_Odm->bInitHwInfoByRfe)
1098 pDM_Odm->ExtLNA5G = (u1Byte)Value;
1099 break;
1100
1101 case ODM_CMNINFO_EXT_PA:
1102 if (!pDM_Odm->bInitHwInfoByRfe)
1103 pDM_Odm->ExtPA = (u1Byte)Value;
1104 break;
1105
1106 case ODM_CMNINFO_5G_EXT_PA:
1107 if (!pDM_Odm->bInitHwInfoByRfe)
1108 pDM_Odm->ExtPA5G = (u1Byte)Value;
1109 break;
1110
1111 case ODM_CMNINFO_GPA:
1112 if (!pDM_Odm->bInitHwInfoByRfe)
1113 pDM_Odm->TypeGPA = (u2Byte)Value;
1114 break;
1115
1116 case ODM_CMNINFO_APA:
1117 if (!pDM_Odm->bInitHwInfoByRfe)
1118 pDM_Odm->TypeAPA = (u2Byte)Value;
1119 break;
1120
1121 case ODM_CMNINFO_GLNA:
1122 if (!pDM_Odm->bInitHwInfoByRfe)
1123 pDM_Odm->TypeGLNA = (u2Byte)Value;
1124 break;
1125
1126 case ODM_CMNINFO_ALNA:
1127 if (!pDM_Odm->bInitHwInfoByRfe)
1128 pDM_Odm->TypeALNA = (u2Byte)Value;
1129 break;
1130
1131 case ODM_CMNINFO_EXT_TRSW:
1132 pDM_Odm->ExtTRSW = (u1Byte)Value;
1133 break;
1134 case ODM_CMNINFO_EXT_LNA_GAIN:
1135 pDM_Odm->ExtLNAGain = (u1Byte)Value;
1136 break;
1137 case ODM_CMNINFO_PATCH_ID:
1138 pDM_Odm->PatchID = (u1Byte)Value;
1139 break;
1140 case ODM_CMNINFO_BINHCT_TEST:
1141 pDM_Odm->bInHctTest = (BOOLEAN)Value;
1142 break;
1143 case ODM_CMNINFO_BWIFI_TEST:
1144 pDM_Odm->WIFITest = (u1Byte)Value;
1145 break;
1146 case ODM_CMNINFO_SMART_CONCURRENT:
1147 pDM_Odm->bDualMacSmartConcurrent = (BOOLEAN )Value;
1148 break;
1149 case ODM_CMNINFO_DOMAIN_CODE_2G:
1150 pDM_Odm->odm_Regulation2_4G = (u1Byte)Value;
1151 break;
1152 case ODM_CMNINFO_DOMAIN_CODE_5G:
1153 pDM_Odm->odm_Regulation5G = (u1Byte)Value;
1154 break;
1155 case ODM_CMNINFO_CONFIG_BB_RF:
1156 pDM_Odm->ConfigBBRF = (BOOLEAN)Value;
1157 break;
1158 case ODM_CMNINFO_IQKFWOFFLOAD:
1159 pDM_Odm->IQKFWOffload = (u1Byte)Value;
1160 break;
1161 case ODM_CMNINFO_IQKPAOFF:
1162 pDM_Odm->RFCalibrateInfo.bIQKPAoff = (BOOLEAN )Value;
1163 break;
1164 case ODM_CMNINFO_REGRFKFREEENABLE:
1165 pDM_Odm->RFCalibrateInfo.RegRfKFreeEnable = (u1Byte)Value;
1166 break;
1167 case ODM_CMNINFO_RFKFREEENABLE:
1168 pDM_Odm->RFCalibrateInfo.RfKFreeEnable = (u1Byte)Value;
1169 break;
1170 case ODM_CMNINFO_NORMAL_RX_PATH_CHANGE:
1171 pDM_Odm->Normalrxpath = (u1Byte)Value;
1172 break;
1173 #ifdef CONFIG_PHYDM_DFS_MASTER
1174 case ODM_CMNINFO_DFS_REGION_DOMAIN:
1175 pDM_Odm->DFS_RegionDomain = (u1Byte)Value;
1176 break;
1177 #endif
1178 //To remove the compiler warning, must add an empty default statement to handle the other values.
1179 default:
1180 //do nothing
1181 break;
1182
1183 }
1184
1185 }
1186
1187
1188 VOID
ODM_CmnInfoHook(IN PDM_ODM_T pDM_Odm,IN ODM_CMNINFO_E CmnInfo,IN PVOID pValue)1189 ODM_CmnInfoHook(
1190 IN PDM_ODM_T pDM_Odm,
1191 IN ODM_CMNINFO_E CmnInfo,
1192 IN PVOID pValue
1193 )
1194 {
1195 //
1196 // Hook call by reference pointer.
1197 //
1198 switch (CmnInfo)
1199 {
1200 //
1201 // Dynamic call by reference pointer.
1202 //
1203 case ODM_CMNINFO_MAC_PHY_MODE:
1204 pDM_Odm->pMacPhyMode = (u1Byte *)pValue;
1205 break;
1206
1207 case ODM_CMNINFO_TX_UNI:
1208 pDM_Odm->pNumTxBytesUnicast = (u8Byte *)pValue;
1209 break;
1210
1211 case ODM_CMNINFO_RX_UNI:
1212 pDM_Odm->pNumRxBytesUnicast = (u8Byte *)pValue;
1213 break;
1214
1215 case ODM_CMNINFO_WM_MODE:
1216 pDM_Odm->pWirelessMode = (u1Byte *)pValue;
1217 break;
1218
1219 case ODM_CMNINFO_BAND:
1220 pDM_Odm->pBandType = (u1Byte *)pValue;
1221 break;
1222
1223 case ODM_CMNINFO_SEC_CHNL_OFFSET:
1224 pDM_Odm->pSecChOffset = (u1Byte *)pValue;
1225 break;
1226
1227 case ODM_CMNINFO_SEC_MODE:
1228 pDM_Odm->pSecurity = (u1Byte *)pValue;
1229 break;
1230
1231 case ODM_CMNINFO_BW:
1232 pDM_Odm->pBandWidth = (u1Byte *)pValue;
1233 break;
1234
1235 case ODM_CMNINFO_CHNL:
1236 pDM_Odm->pChannel = (u1Byte *)pValue;
1237 break;
1238
1239 case ODM_CMNINFO_DMSP_GET_VALUE:
1240 pDM_Odm->pbGetValueFromOtherMac = (BOOLEAN *)pValue;
1241 break;
1242
1243 case ODM_CMNINFO_BUDDY_ADAPTOR:
1244 pDM_Odm->pBuddyAdapter = (PADAPTER *)pValue;
1245 break;
1246
1247 case ODM_CMNINFO_DMSP_IS_MASTER:
1248 pDM_Odm->pbMasterOfDMSP = (BOOLEAN *)pValue;
1249 break;
1250
1251 case ODM_CMNINFO_SCAN:
1252 pDM_Odm->pbScanInProcess = (BOOLEAN *)pValue;
1253 break;
1254
1255 case ODM_CMNINFO_POWER_SAVING:
1256 pDM_Odm->pbPowerSaving = (BOOLEAN *)pValue;
1257 break;
1258
1259 case ODM_CMNINFO_ONE_PATH_CCA:
1260 pDM_Odm->pOnePathCCA = (u1Byte *)pValue;
1261 break;
1262
1263 case ODM_CMNINFO_DRV_STOP:
1264 pDM_Odm->pbDriverStopped = (BOOLEAN *)pValue;
1265 break;
1266
1267 case ODM_CMNINFO_PNP_IN:
1268 pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (BOOLEAN *)pValue;
1269 break;
1270
1271 case ODM_CMNINFO_INIT_ON:
1272 pDM_Odm->pinit_adpt_in_progress = (BOOLEAN *)pValue;
1273 break;
1274
1275 case ODM_CMNINFO_ANT_TEST:
1276 pDM_Odm->pAntennaTest = (u1Byte *)pValue;
1277 break;
1278
1279 case ODM_CMNINFO_NET_CLOSED:
1280 pDM_Odm->pbNet_closed = (BOOLEAN *)pValue;
1281 break;
1282
1283 case ODM_CMNINFO_FORCED_RATE:
1284 pDM_Odm->pForcedDataRate = (pu2Byte)pValue;
1285 break;
1286
1287 case ODM_CMNINFO_FORCED_IGI_LB:
1288 pDM_Odm->pu1ForcedIgiLb = (u1Byte *)pValue;
1289 break;
1290
1291 case ODM_CMNINFO_P2P_LINK:
1292 pDM_Odm->DM_DigTable.bP2PInProcess = (u1Byte *)pValue;
1293 break;
1294
1295 case ODM_CMNINFO_IS1ANTENNA:
1296 pDM_Odm->pIs1Antenna = (BOOLEAN *)pValue;
1297 break;
1298
1299 case ODM_CMNINFO_RFDEFAULTPATH:
1300 pDM_Odm->pRFDefaultPath= (u1Byte *)pValue;
1301 break;
1302
1303 case ODM_CMNINFO_FCS_MODE:
1304 pDM_Odm->pIsFcsModeEnable = (BOOLEAN *)pValue;
1305 break;
1306 /*add by YuChen for beamforming PhyDM*/
1307 case ODM_CMNINFO_HUBUSBMODE:
1308 pDM_Odm->HubUsbMode = (u1Byte *)pValue;
1309 break;
1310 case ODM_CMNINFO_FWDWRSVDPAGEINPROGRESS:
1311 pDM_Odm->pbFwDwRsvdPageInProgress = (BOOLEAN *)pValue;
1312 break;
1313 case ODM_CMNINFO_TX_TP:
1314 pDM_Odm->pCurrentTxTP = (u4Byte *)pValue;
1315 break;
1316 case ODM_CMNINFO_RX_TP:
1317 pDM_Odm->pCurrentRxTP = (u4Byte *)pValue;
1318 break;
1319 case ODM_CMNINFO_SOUNDING_SEQ:
1320 pDM_Odm->pSoundingSeq = (u1Byte *)pValue;
1321 break;
1322 #ifdef CONFIG_PHYDM_DFS_MASTER
1323 case ODM_CMNINFO_DFS_MASTER_ENABLE:
1324 pDM_Odm->dfs_master_enabled = (u1Byte *)pValue;
1325 break;
1326 #endif
1327 case ODM_CMNINFO_FORCE_TX_ANT_BY_TXDESC:
1328 pDM_Odm->DM_FatTable.pForceTxAntByDesc = (u1Byte *)pValue;
1329 break;
1330 //case ODM_CMNINFO_RTSTA_AID:
1331 // pDM_Odm->pAidMap = (u1Byte *)pValue;
1332 // break;
1333
1334 //case ODM_CMNINFO_BT_COEXIST:
1335 // pDM_Odm->BTCoexist = (BOOLEAN *)pValue;
1336
1337 //case ODM_CMNINFO_STA_STATUS:
1338 //pDM_Odm->pODM_StaInfo[] = (PSTA_INFO_T)pValue;
1339 //break;
1340
1341 //case ODM_CMNINFO_PHY_STATUS:
1342 // pDM_Odm->pPhyInfo = (ODM_PHY_INFO *)pValue;
1343 // break;
1344
1345 //case ODM_CMNINFO_MAC_STATUS:
1346 // pDM_Odm->pMacInfo = (ODM_MAC_INFO *)pValue;
1347 // break;
1348 //To remove the compiler warning, must add an empty default statement to handle the other values.
1349 default:
1350 //do nothing
1351 break;
1352
1353 }
1354
1355 }
1356
1357
1358 VOID
ODM_CmnInfoPtrArrayHook(IN PDM_ODM_T pDM_Odm,IN ODM_CMNINFO_E CmnInfo,IN u2Byte Index,IN PVOID pValue)1359 ODM_CmnInfoPtrArrayHook(
1360 IN PDM_ODM_T pDM_Odm,
1361 IN ODM_CMNINFO_E CmnInfo,
1362 IN u2Byte Index,
1363 IN PVOID pValue
1364 )
1365 {
1366 //
1367 // Hook call by reference pointer.
1368 //
1369 switch (CmnInfo)
1370 {
1371 //
1372 // Dynamic call by reference pointer.
1373 //
1374 case ODM_CMNINFO_STA_STATUS:
1375 pDM_Odm->pODM_StaInfo[Index] = (PSTA_INFO_T)pValue;
1376
1377 if (IS_STA_VALID(pDM_Odm->pODM_StaInfo[Index]))
1378 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1379 pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->AssociatedMacId] = Index; /*AssociatedMacId are unique bttween different Adapter*/
1380 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP)
1381 pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->aid] = Index;
1382 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE)
1383 pDM_Odm->platform2phydm_macid_table[((PSTA_INFO_T)pValue)->mac_id] = Index;
1384 #endif
1385
1386 break;
1387 //To remove the compiler warning, must add an empty default statement to handle the other values.
1388 default:
1389 //do nothing
1390 break;
1391 }
1392
1393 }
1394
1395
1396 //
1397 // Update Band/CHannel/.. The values are dynamic but non-per-packet.
1398 //
1399 VOID
ODM_CmnInfoUpdate(IN PDM_ODM_T pDM_Odm,IN u4Byte CmnInfo,IN u8Byte Value)1400 ODM_CmnInfoUpdate(
1401 IN PDM_ODM_T pDM_Odm,
1402 IN u4Byte CmnInfo,
1403 IN u8Byte Value
1404 )
1405 {
1406 //
1407 // This init variable may be changed in run time.
1408 //
1409 switch (CmnInfo)
1410 {
1411 case ODM_CMNINFO_LINK_IN_PROGRESS:
1412 pDM_Odm->bLinkInProcess = (BOOLEAN)Value;
1413 break;
1414
1415 case ODM_CMNINFO_ABILITY:
1416 pDM_Odm->SupportAbility = (u4Byte)Value;
1417 break;
1418
1419 case ODM_CMNINFO_RF_TYPE:
1420 pDM_Odm->RFType = (u1Byte)Value;
1421 break;
1422
1423 case ODM_CMNINFO_WIFI_DIRECT:
1424 pDM_Odm->bWIFI_Direct = (BOOLEAN)Value;
1425 break;
1426
1427 case ODM_CMNINFO_WIFI_DISPLAY:
1428 pDM_Odm->bWIFI_Display = (BOOLEAN)Value;
1429 break;
1430
1431 case ODM_CMNINFO_LINK:
1432 pDM_Odm->bLinked = (BOOLEAN)Value;
1433 break;
1434
1435 case ODM_CMNINFO_STATION_STATE:
1436 pDM_Odm->bsta_state = (BOOLEAN)Value;
1437 break;
1438
1439 case ODM_CMNINFO_RSSI_MIN:
1440 pDM_Odm->RSSI_Min= (u1Byte)Value;
1441 break;
1442
1443 case ODM_CMNINFO_DBG_COMP:
1444 pDM_Odm->DebugComponents = (u4Byte)Value;
1445 break;
1446
1447 case ODM_CMNINFO_DBG_LEVEL:
1448 pDM_Odm->DebugLevel = (u4Byte)Value;
1449 break;
1450 case ODM_CMNINFO_RA_THRESHOLD_HIGH:
1451 pDM_Odm->RateAdaptive.HighRSSIThresh = (u1Byte)Value;
1452 break;
1453
1454 case ODM_CMNINFO_RA_THRESHOLD_LOW:
1455 pDM_Odm->RateAdaptive.LowRSSIThresh = (u1Byte)Value;
1456 break;
1457 #if defined(BT_SUPPORT) && (BT_SUPPORT == 1)
1458 // The following is for BT HS mode and BT coexist mechanism.
1459 case ODM_CMNINFO_BT_ENABLED:
1460 pDM_Odm->bBtEnabled = (BOOLEAN)Value;
1461 break;
1462
1463 case ODM_CMNINFO_BT_HS_CONNECT_PROCESS:
1464 pDM_Odm->bBtConnectProcess = (BOOLEAN)Value;
1465 break;
1466
1467 case ODM_CMNINFO_BT_HS_RSSI:
1468 pDM_Odm->btHsRssi = (u1Byte)Value;
1469 break;
1470
1471 case ODM_CMNINFO_BT_OPERATION:
1472 pDM_Odm->bBtHsOperation = (BOOLEAN)Value;
1473 break;
1474
1475 case ODM_CMNINFO_BT_LIMITED_DIG:
1476 pDM_Odm->bBtLimitedDig = (BOOLEAN)Value;
1477 break;
1478
1479 case ODM_CMNINFO_BT_DIG:
1480 pDM_Odm->btHsDigVal = (u1Byte)Value;
1481 break;
1482
1483 case ODM_CMNINFO_BT_BUSY:
1484 pDM_Odm->bBtBusy = (BOOLEAN)Value;
1485 break;
1486
1487 case ODM_CMNINFO_BT_DISABLE_EDCA:
1488 pDM_Odm->bBtDisableEdcaTurbo = (BOOLEAN)Value;
1489 break;
1490 #endif
1491
1492 #if(DM_ODM_SUPPORT_TYPE & ODM_AP) // for repeater mode add by YuChen 2014.06.23
1493 #ifdef UNIVERSAL_REPEATER
1494 case ODM_CMNINFO_VXD_LINK:
1495 pDM_Odm->VXD_bLinked= (BOOLEAN)Value;
1496 break;
1497 #endif
1498 #endif
1499
1500 case ODM_CMNINFO_AP_TOTAL_NUM:
1501 pDM_Odm->APTotalNum = (u1Byte)Value;
1502 break;
1503
1504 case ODM_CMNINFO_POWER_TRAINING:
1505 pDM_Odm->bDisablePowerTraining = (BOOLEAN)Value;
1506 break;
1507
1508 #ifdef CONFIG_PHYDM_DFS_MASTER
1509 case ODM_CMNINFO_DFS_REGION_DOMAIN:
1510 pDM_Odm->DFS_RegionDomain = (u1Byte)Value;
1511 break;
1512 #endif
1513
1514 /*
1515 case ODM_CMNINFO_OP_MODE:
1516 pDM_Odm->OPMode = (u1Byte)Value;
1517 break;
1518
1519 case ODM_CMNINFO_WM_MODE:
1520 pDM_Odm->WirelessMode = (u1Byte)Value;
1521 break;
1522
1523 case ODM_CMNINFO_BAND:
1524 pDM_Odm->BandType = (u1Byte)Value;
1525 break;
1526
1527 case ODM_CMNINFO_SEC_CHNL_OFFSET:
1528 pDM_Odm->SecChOffset = (u1Byte)Value;
1529 break;
1530
1531 case ODM_CMNINFO_SEC_MODE:
1532 pDM_Odm->Security = (u1Byte)Value;
1533 break;
1534
1535 case ODM_CMNINFO_BW:
1536 pDM_Odm->BandWidth = (u1Byte)Value;
1537 break;
1538
1539 case ODM_CMNINFO_CHNL:
1540 pDM_Odm->Channel = (u1Byte)Value;
1541 break;
1542 */
1543 default:
1544 //do nothing
1545 break;
1546 }
1547
1548
1549 }
1550
1551
1552 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1553 VOID
ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm)1554 ODM_InitAllWorkItems(IN PDM_ODM_T pDM_Odm )
1555 {
1556
1557 PADAPTER pAdapter = pDM_Odm->Adapter;
1558 #if USE_WORKITEM
1559 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
1560 ODM_InitializeWorkItem( pDM_Odm,
1561 &pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem,
1562 (RT_WORKITEM_CALL_BACK)ODM_SW_AntDiv_WorkitemCallback,
1563 (PVOID)pAdapter,
1564 "AntennaSwitchWorkitem");
1565 #endif
1566 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
1567 ODM_InitializeWorkItem(pDM_Odm,
1568 &pDM_Odm->dm_sat_table.hl_smart_antenna_workitem,
1569 (RT_WORKITEM_CALL_BACK)phydm_beam_switch_workitem_callback,
1570 (PVOID)pAdapter,
1571 "hl_smart_ant_workitem");
1572
1573 ODM_InitializeWorkItem(pDM_Odm,
1574 &pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem,
1575 (RT_WORKITEM_CALL_BACK)phydm_beam_decision_workitem_callback,
1576 (PVOID)pAdapter,
1577 "hl_smart_ant_decision_workitem");
1578 #endif
1579
1580 ODM_InitializeWorkItem(
1581 pDM_Odm,
1582 &(pDM_Odm->PathDivSwitchWorkitem),
1583 (RT_WORKITEM_CALL_BACK)odm_PathDivChkAntSwitchWorkitemCallback,
1584 (PVOID)pAdapter,
1585 "SWAS_WorkItem");
1586
1587 ODM_InitializeWorkItem(
1588 pDM_Odm,
1589 &(pDM_Odm->CCKPathDiversityWorkitem),
1590 (RT_WORKITEM_CALL_BACK)odm_CCKTXPathDiversityWorkItemCallback,
1591 (PVOID)pAdapter,
1592 "CCKTXPathDiversityWorkItem");
1593
1594 ODM_InitializeWorkItem(
1595 pDM_Odm,
1596 &(pDM_Odm->MPT_DIGWorkitem),
1597 (RT_WORKITEM_CALL_BACK)odm_MPT_DIGWorkItemCallback,
1598 (PVOID)pAdapter,
1599 "MPT_DIGWorkitem");
1600
1601 ODM_InitializeWorkItem(
1602 pDM_Odm,
1603 &(pDM_Odm->RaRptWorkitem),
1604 (RT_WORKITEM_CALL_BACK)ODM_UpdateInitRateWorkItemCallback,
1605 (PVOID)pAdapter,
1606 "RaRptWorkitem");
1607
1608 #if( defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY) ) ||( defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY) )
1609 ODM_InitializeWorkItem(
1610 pDM_Odm,
1611 &(pDM_Odm->FastAntTrainingWorkitem),
1612 (RT_WORKITEM_CALL_BACK)odm_FastAntTrainingWorkItemCallback,
1613 (PVOID)pAdapter,
1614 "FastAntTrainingWorkitem");
1615 #endif
1616
1617 #endif /*#if USE_WORKITEM*/
1618
1619 #if (BEAMFORMING_SUPPORT == 1)
1620 ODM_InitializeWorkItem(
1621 pDM_Odm,
1622 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem),
1623 (RT_WORKITEM_CALL_BACK)halComTxbf_EnterWorkItemCallback,
1624 (PVOID)pAdapter,
1625 "Txbf_EnterWorkItem");
1626
1627 ODM_InitializeWorkItem(
1628 pDM_Odm,
1629 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem),
1630 (RT_WORKITEM_CALL_BACK)halComTxbf_LeaveWorkItemCallback,
1631 (PVOID)pAdapter,
1632 "Txbf_LeaveWorkItem");
1633
1634 ODM_InitializeWorkItem(
1635 pDM_Odm,
1636 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem),
1637 (RT_WORKITEM_CALL_BACK)halComTxbf_FwNdpaWorkItemCallback,
1638 (PVOID)pAdapter,
1639 "Txbf_FwNdpaWorkItem");
1640
1641 ODM_InitializeWorkItem(
1642 pDM_Odm,
1643 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem),
1644 (RT_WORKITEM_CALL_BACK)halComTxbf_ClkWorkItemCallback,
1645 (PVOID)pAdapter,
1646 "Txbf_ClkWorkItem");
1647
1648 ODM_InitializeWorkItem(
1649 pDM_Odm,
1650 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem),
1651 (RT_WORKITEM_CALL_BACK)halComTxbf_RateWorkItemCallback,
1652 (PVOID)pAdapter,
1653 "Txbf_RateWorkItem");
1654
1655 ODM_InitializeWorkItem(
1656 pDM_Odm,
1657 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem),
1658 (RT_WORKITEM_CALL_BACK)halComTxbf_StatusWorkItemCallback,
1659 (PVOID)pAdapter,
1660 "Txbf_StatusWorkItem");
1661
1662 ODM_InitializeWorkItem(
1663 pDM_Odm,
1664 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem),
1665 (RT_WORKITEM_CALL_BACK)halComTxbf_ResetTxPathWorkItemCallback,
1666 (PVOID)pAdapter,
1667 "Txbf_ResetTxPathWorkItem");
1668
1669 ODM_InitializeWorkItem(
1670 pDM_Odm,
1671 &(pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem),
1672 (RT_WORKITEM_CALL_BACK)halComTxbf_GetTxRateWorkItemCallback,
1673 (PVOID)pAdapter,
1674 "Txbf_GetTxRateWorkItem");
1675 #endif
1676
1677 ODM_InitializeWorkItem(
1678 pDM_Odm,
1679 &(pDM_Odm->Adaptivity.phydm_pauseEDCCAWorkItem),
1680 (RT_WORKITEM_CALL_BACK)phydm_pauseEDCCA_WorkItemCallback,
1681 (PVOID)pAdapter,
1682 "phydm_pauseEDCCAWorkItem");
1683
1684 ODM_InitializeWorkItem(
1685 pDM_Odm,
1686 &(pDM_Odm->Adaptivity.phydm_resumeEDCCAWorkItem),
1687 (RT_WORKITEM_CALL_BACK)phydm_resumeEDCCA_WorkItemCallback,
1688 (PVOID)pAdapter,
1689 "phydm_resumeEDCCAWorkItem");
1690
1691 #if (PHYDM_LA_MODE_SUPPORT == 1)
1692 ODM_InitializeWorkItem(
1693 pDM_Odm,
1694 &(pDM_Odm->adcsmp.ADCSmpWorkItem),
1695 (RT_WORKITEM_CALL_BACK)ADCSmpWorkItemCallback,
1696 (PVOID)pAdapter,
1697 "ADCSmpWorkItem");
1698
1699 ODM_InitializeWorkItem(
1700 pDM_Odm,
1701 &(pDM_Odm->adcsmp.ADCSmpWorkItem_1),
1702 (RT_WORKITEM_CALL_BACK)ADCSmpWorkItemCallback,
1703 (PVOID)pAdapter,
1704 "ADCSmpWorkItem_1");
1705 #endif
1706
1707 }
1708
1709 VOID
ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm)1710 ODM_FreeAllWorkItems(IN PDM_ODM_T pDM_Odm )
1711 {
1712 #if USE_WORKITEM
1713
1714 #ifdef CONFIG_S0S1_SW_ANTENNA_DIVERSITY
1715 ODM_FreeWorkItem(&(pDM_Odm->DM_SWAT_Table.phydm_SwAntennaSwitchWorkitem));
1716 #endif
1717
1718 #ifdef CONFIG_HL_SMART_ANTENNA_TYPE1
1719 ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_workitem));
1720 ODM_FreeWorkItem(&(pDM_Odm->dm_sat_table.hl_smart_antenna_decision_workitem));
1721 #endif
1722
1723 ODM_FreeWorkItem(&(pDM_Odm->PathDivSwitchWorkitem));
1724 ODM_FreeWorkItem(&(pDM_Odm->CCKPathDiversityWorkitem));
1725 #if (defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) || (defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY))
1726 ODM_FreeWorkItem(&(pDM_Odm->FastAntTrainingWorkitem));
1727 #endif
1728 ODM_FreeWorkItem(&(pDM_Odm->MPT_DIGWorkitem));
1729 ODM_FreeWorkItem(&(pDM_Odm->RaRptWorkitem));
1730 /*ODM_FreeWorkItem((&pDM_Odm->sbdcnt_workitem));*/
1731 #endif
1732
1733 #if (BEAMFORMING_SUPPORT == 1)
1734 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_EnterWorkItem));
1735 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_LeaveWorkItem));
1736 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaWorkItem));
1737 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ClkWorkItem));
1738 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_RateWorkItem));
1739 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_StatusWorkItem));
1740 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_ResetTxPathWorkItem));
1741 ODM_FreeWorkItem((&pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_GetTxRateWorkItem));
1742 #endif
1743
1744 ODM_FreeWorkItem((&pDM_Odm->Adaptivity.phydm_pauseEDCCAWorkItem));
1745 ODM_FreeWorkItem((&pDM_Odm->Adaptivity.phydm_resumeEDCCAWorkItem));
1746
1747 #if (PHYDM_LA_MODE_SUPPORT == 1)
1748 ODM_FreeWorkItem((&pDM_Odm->adcsmp.ADCSmpWorkItem));
1749 ODM_FreeWorkItem((&pDM_Odm->adcsmp.ADCSmpWorkItem_1));
1750 #endif
1751
1752 }
1753 #endif /*#if (DM_ODM_SUPPORT_TYPE == ODM_WIN)*/
1754
1755 /*
1756 VOID
1757 odm_FindMinimumRSSI(
1758 IN PDM_ODM_T pDM_Odm
1759 )
1760 {
1761 u4Byte i;
1762 u1Byte RSSI_Min = 0xFF;
1763
1764 for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1765 {
1766 // if(pDM_Odm->pODM_StaInfo[i] != NULL)
1767 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1768 {
1769 if(pDM_Odm->pODM_StaInfo[i]->RSSI_Ave < RSSI_Min)
1770 {
1771 RSSI_Min = pDM_Odm->pODM_StaInfo[i]->RSSI_Ave;
1772 }
1773 }
1774 }
1775
1776 pDM_Odm->RSSI_Min = RSSI_Min;
1777
1778 }
1779
1780 VOID
1781 odm_IsLinked(
1782 IN PDM_ODM_T pDM_Odm
1783 )
1784 {
1785 u4Byte i;
1786 BOOLEAN Linked = FALSE;
1787
1788 for(i=0; i<ODM_ASSOCIATE_ENTRY_NUM; i++)
1789 {
1790 if(IS_STA_VALID(pDM_Odm->pODM_StaInfo[i]) )
1791 {
1792 Linked = TRUE;
1793 break;
1794 }
1795
1796 }
1797
1798 pDM_Odm->bLinked = Linked;
1799 }
1800 */
1801
1802 VOID
ODM_InitAllTimers(IN PDM_ODM_T pDM_Odm)1803 ODM_InitAllTimers(
1804 IN PDM_ODM_T pDM_Odm
1805 )
1806 {
1807 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
1808 ODM_AntDivTimers(pDM_Odm,INIT_ANTDIV_TIMMER);
1809 #endif
1810
1811 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1812 #ifdef MP_TEST
1813 if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific)
1814 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer,
1815 (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer");
1816 #endif
1817 #elif(DM_ODM_SUPPORT_TYPE == ODM_WIN)
1818 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer,
1819 (RT_TIMER_CALL_BACK)odm_MPT_DIGCallback, NULL, "MPT_DIGTimer");
1820 #endif
1821
1822 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1823 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer,
1824 (RT_TIMER_CALL_BACK)odm_PathDivChkAntSwitchCallback, NULL, "PathDivTimer");
1825 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer,
1826 (RT_TIMER_CALL_BACK)odm_CCKTXPathDiversityCallback, NULL, "CCKPathDiversityTimer");
1827 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer,
1828 (RT_TIMER_CALL_BACK)phydm_sbd_callback, NULL, "SbdTimer");
1829 #if (BEAMFORMING_SUPPORT == 1)
1830 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer,
1831 (RT_TIMER_CALL_BACK)halComTxbf_FwNdpaTimerCallback, NULL, "Txbf_FwNdpaTimer");
1832 #endif
1833 #endif
1834
1835 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1836 #if (BEAMFORMING_SUPPORT == 1)
1837 ODM_InitializeTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer,
1838 (RT_TIMER_CALL_BACK)Beamforming_SWTimerCallback, NULL, "BeamformingTimer");
1839 #endif
1840 #endif
1841 }
1842
1843 VOID
ODM_CancelAllTimers(IN PDM_ODM_T pDM_Odm)1844 ODM_CancelAllTimers(
1845 IN PDM_ODM_T pDM_Odm
1846 )
1847 {
1848 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1849 //
1850 // 2012/01/12 MH Temp BSOD fix. We need to find NIC allocate mem fail reason in
1851 // win7 platform.
1852 //
1853 HAL_ADAPTER_STS_CHK(pDM_Odm)
1854 #endif
1855
1856 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
1857 ODM_AntDivTimers(pDM_Odm,CANCEL_ANTDIV_TIMMER);
1858 #endif
1859
1860 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1861 #ifdef MP_TEST
1862 if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific)
1863 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1864 #endif
1865 #elif (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1866 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1867 #endif
1868
1869 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1870 ODM_CancelTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1871 ODM_CancelTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1872 ODM_CancelTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1873 ODM_CancelTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer);
1874 #if (BEAMFORMING_SUPPORT == 1)
1875 ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer);
1876 #endif
1877 #endif
1878
1879 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1880 #if (BEAMFORMING_SUPPORT == 1)
1881 ODM_CancelTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer);
1882 #endif
1883 #endif
1884
1885 }
1886
1887
1888 VOID
ODM_ReleaseAllTimers(IN PDM_ODM_T pDM_Odm)1889 ODM_ReleaseAllTimers(
1890 IN PDM_ODM_T pDM_Odm
1891 )
1892 {
1893 #if (defined(CONFIG_PHYDM_ANTENNA_DIVERSITY))
1894 ODM_AntDivTimers(pDM_Odm,RELEASE_ANTDIV_TIMMER);
1895 #endif
1896
1897 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1898 #ifdef MP_TEST
1899 if (pDM_Odm->priv->pshare->rf_ft_var.mp_specific)
1900 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1901 #endif
1902 #elif(DM_ODM_SUPPORT_TYPE == ODM_WIN)
1903 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1904 #endif
1905
1906 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
1907 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->PathDivSwitchTimer);
1908 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->CCKPathDiversityTimer);
1909 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->MPT_DIGTimer);
1910 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->sbdcnt_timer);
1911 #if (BEAMFORMING_SUPPORT == 1)
1912 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.TxbfInfo.Txbf_FwNdpaTimer);
1913 #endif
1914 #endif
1915
1916 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN | ODM_CE))
1917 #if (BEAMFORMING_SUPPORT == 1)
1918 ODM_ReleaseTimer(pDM_Odm, &pDM_Odm->BeamformingInfo.BeamformingTimer);
1919 #endif
1920 #endif
1921 }
1922
1923
1924 //3============================================================
1925 //3 Tx Power Tracking
1926 //3============================================================
1927
1928
1929
1930
1931 #if (DM_ODM_SUPPORT_TYPE == ODM_AP)
1932 VOID
ODM_InitAllThreads(IN PDM_ODM_T pDM_Odm)1933 ODM_InitAllThreads(
1934 IN PDM_ODM_T pDM_Odm
1935 )
1936 {
1937 #ifdef TPT_THREAD
1938 kTPT_task_init(pDM_Odm->priv);
1939 #endif
1940 }
1941
1942 VOID
ODM_StopAllThreads(IN PDM_ODM_T pDM_Odm)1943 ODM_StopAllThreads(
1944 IN PDM_ODM_T pDM_Odm
1945 )
1946 {
1947 #ifdef TPT_THREAD
1948 kTPT_task_stop(pDM_Odm->priv);
1949 #endif
1950 }
1951 #endif
1952
1953
1954 #if( DM_ODM_SUPPORT_TYPE == ODM_WIN)
1955 //
1956 // 2011/07/26 MH Add an API for testing IQK fail case.
1957 //
1958 BOOLEAN
ODM_CheckPowerStatus(IN PADAPTER Adapter)1959 ODM_CheckPowerStatus(
1960 IN PADAPTER Adapter)
1961 {
1962
1963 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1964 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1965 RT_RF_POWER_STATE rtState;
1966 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
1967
1968 // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
1969 if (pMgntInfo->init_adpt_in_progress == TRUE)
1970 {
1971 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter\n"));
1972 return TRUE;
1973 }
1974
1975 //
1976 // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
1977 //
1978 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
1979 if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
1980 {
1981 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
1982 Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
1983 return FALSE;
1984 }
1985 return TRUE;
1986 }
1987 #elif( DM_ODM_SUPPORT_TYPE == ODM_AP)
1988 BOOLEAN
ODM_CheckPowerStatus(IN PADAPTER Adapter)1989 ODM_CheckPowerStatus(
1990 IN PADAPTER Adapter)
1991 {
1992 /*
1993 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
1994 PDM_ODM_T pDM_Odm = &pHalData->DM_OutSrc;
1995 RT_RF_POWER_STATE rtState;
1996 PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
1997
1998 // 2011/07/27 MH We are not testing ready~~!! We may fail to get correct value when init sequence.
1999 if (pMgntInfo->init_adpt_in_progress == TRUE)
2000 {
2001 ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return TRUE, due to initadapter"));
2002 return TRUE;
2003 }
2004
2005 //
2006 // 2011/07/19 MH We can not execute tx pwoer tracking/ LLC calibrate or IQK.
2007 //
2008 Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_RF_STATE, (pu1Byte)(&rtState));
2009 if(Adapter->bDriverStopped || Adapter->bDriverIsGoingToPnpSetPowerSleep || rtState == eRfOff)
2010 {
2011 ODM_RT_TRACE(pDM_Odm,COMP_INIT, DBG_LOUD, ("ODM_CheckPowerStatus Return FALSE, due to %d/%d/%d\n",
2012 Adapter->bDriverStopped, Adapter->bDriverIsGoingToPnpSetPowerSleep, rtState));
2013 return FALSE;
2014 }
2015 */
2016 return TRUE;
2017 }
2018 #endif
2019
2020 // need to ODM CE Platform
2021 //move to here for ANT detection mechanism using
2022
2023 #if ((DM_ODM_SUPPORT_TYPE == ODM_WIN)||(DM_ODM_SUPPORT_TYPE == ODM_CE))
2024 u4Byte
GetPSDData(IN PDM_ODM_T pDM_Odm,unsigned int point,u1Byte initial_gain_psd)2025 GetPSDData(
2026 IN PDM_ODM_T pDM_Odm,
2027 unsigned int point,
2028 u1Byte initial_gain_psd)
2029 {
2030 //unsigned int val, rfval;
2031 //int psd_report;
2032 u4Byte psd_report;
2033
2034 //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
2035 //Debug Message
2036 //val = PHY_QueryBBReg(Adapter,0x908, bMaskDWord);
2037 //DbgPrint("Reg908 = 0x%x\n",val);
2038 //val = PHY_QueryBBReg(Adapter,0xDF4, bMaskDWord);
2039 //rfval = PHY_QueryRFReg(Adapter, ODM_RF_PATH_A, 0x00, bRFRegOffsetMask);
2040 //DbgPrint("RegDF4 = 0x%x, RFReg00 = 0x%x\n",val, rfval);
2041 //DbgPrint("PHYTXON = %x, OFDMCCA_PP = %x, CCKCCA_PP = %x, RFReg00 = %x\n",
2042 //(val&BIT25)>>25, (val&BIT14)>>14, (val&BIT15)>>15, rfval);
2043
2044 //Set DCO frequency index, offset=(40MHz/SamplePts)*point
2045 ODM_SetBBReg(pDM_Odm, 0x808, 0x3FF, point);
2046
2047 //Start PSD calculation, Reg808[22]=0->1
2048 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 1);
2049 //Need to wait for HW PSD report
2050 ODM_StallExecution(1000);
2051 ODM_SetBBReg(pDM_Odm, 0x808, BIT22, 0);
2052 //Read PSD report, Reg8B4[15:0]
2053 psd_report = ODM_GetBBReg(pDM_Odm,0x8B4, bMaskDWord) & 0x0000FFFF;
2054
2055 #if 1//(DEV_BUS_TYPE == RT_PCI_INTERFACE) && ( (RT_PLATFORM == PLATFORM_LINUX) || (RT_PLATFORM == PLATFORM_MACOSX))
2056 psd_report = (u4Byte) (odm_ConvertTo_dB(psd_report))+(u4Byte)(initial_gain_psd-0x1c);
2057 #else
2058 psd_report = (int) (20*log10((double)psd_report))+(int)(initial_gain_psd-0x1c);
2059 #endif
2060
2061 return psd_report;
2062
2063 }
2064 #endif
2065
2066 u4Byte
odm_ConvertTo_dB(u4Byte Value)2067 odm_ConvertTo_dB(
2068 u4Byte Value)
2069 {
2070 u1Byte i;
2071 u1Byte j;
2072 u4Byte dB;
2073
2074 Value = Value & 0xFFFF;
2075
2076 for (i = 0; i < 12; i++)
2077 {
2078 if (Value <= dB_Invert_Table[i][7])
2079 {
2080 break;
2081 }
2082 }
2083
2084 if (i >= 12)
2085 {
2086 return (96); // maximum 96 dB
2087 }
2088
2089 for (j = 0; j < 8; j++)
2090 {
2091 if (Value <= dB_Invert_Table[i][j])
2092 {
2093 break;
2094 }
2095 }
2096
2097 dB = (i << 3) + j + 1;
2098
2099 return (dB);
2100 }
2101
2102 u4Byte
odm_ConvertTo_linear(u4Byte Value)2103 odm_ConvertTo_linear(
2104 u4Byte Value)
2105 {
2106 u1Byte i;
2107 u1Byte j;
2108 u4Byte linear;
2109
2110 /* 1dB~96dB */
2111
2112 Value = Value & 0xFF;
2113
2114 i = (u1Byte)((Value - 1) >> 3);
2115 j = (u1Byte)(Value - 1) - (i << 3);
2116
2117 linear = dB_Invert_Table[i][j];
2118
2119 return (linear);
2120 }
2121
2122 //
2123 // ODM multi-port consideration, added by Roger, 2013.10.01.
2124 //
2125 VOID
ODM_AsocEntry_Init(IN PDM_ODM_T pDM_Odm)2126 ODM_AsocEntry_Init(
2127 IN PDM_ODM_T pDM_Odm
2128 )
2129 {
2130 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2131 PADAPTER pLoopAdapter = GetDefaultAdapter(pDM_Odm->Adapter);
2132 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pLoopAdapter);
2133 PDM_ODM_T pDM_OutSrc = &pHalData->DM_OutSrc;
2134 u1Byte TotalAssocEntryNum = 0;
2135 u1Byte index = 0;
2136 u1Byte adaptercount = 0;
2137
2138 ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, 0, &pLoopAdapter->MgntInfo.DefaultPort[0]);
2139 pLoopAdapter->MgntInfo.DefaultPort[0].MultiPortStationIdx = TotalAssocEntryNum;
2140
2141 adaptercount += 1;
2142 RT_TRACE(COMP_INIT, DBG_LOUD, ("adaptercount=%d\n", adaptercount));
2143 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
2144 TotalAssocEntryNum +=1;
2145
2146 while(pLoopAdapter)
2147 {
2148 for (index = 0; index <ASSOCIATE_ENTRY_NUM; index++)
2149 {
2150 ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, TotalAssocEntryNum+index, &pLoopAdapter->MgntInfo.AsocEntry[index]);
2151 pLoopAdapter->MgntInfo.AsocEntry[index].MultiPortStationIdx = TotalAssocEntryNum+index;
2152 }
2153
2154 TotalAssocEntryNum+= index;
2155 if(IS_HARDWARE_TYPE_8188E((pDM_Odm->Adapter)))
2156 pLoopAdapter->RASupport = TRUE;
2157 adaptercount += 1;
2158 RT_TRACE(COMP_INIT, DBG_LOUD, ("adaptercount=%d\n", adaptercount));
2159 pLoopAdapter = GetNextExtAdapter(pLoopAdapter);
2160 }
2161
2162 RT_TRACE(COMP_INIT, DBG_LOUD, ("TotalAssocEntryNum = %d\n", TotalAssocEntryNum));
2163 if (TotalAssocEntryNum < (ODM_ASSOCIATE_ENTRY_NUM-1)) {
2164
2165 RT_TRACE(COMP_INIT, DBG_LOUD, ("In hook null\n"));
2166 for (index = TotalAssocEntryNum; index < ODM_ASSOCIATE_ENTRY_NUM; index++)
2167 ODM_CmnInfoPtrArrayHook(pDM_OutSrc, ODM_CMNINFO_STA_STATUS, index, NULL);
2168 }
2169 #endif
2170 }
2171
2172 #if (DM_ODM_SUPPORT_TYPE == ODM_CE)
2173 /* Justin: According to the current RRSI to adjust Response Frame TX power, 2012/11/05 */
odm_dtc(PDM_ODM_T pDM_Odm)2174 void odm_dtc(PDM_ODM_T pDM_Odm)
2175 {
2176 #ifdef CONFIG_DM_RESP_TXAGC
2177 #define DTC_BASE 35 /* RSSI higher than this value, start to decade TX power */
2178 #define DTC_DWN_BASE (DTC_BASE-5) /* RSSI lower than this value, start to increase TX power */
2179
2180 /* RSSI vs TX power step mapping: decade TX power */
2181 static const u8 dtc_table_down[]={
2182 DTC_BASE,
2183 (DTC_BASE+5),
2184 (DTC_BASE+10),
2185 (DTC_BASE+15),
2186 (DTC_BASE+20),
2187 (DTC_BASE+25)
2188 };
2189
2190 /* RSSI vs TX power step mapping: increase TX power */
2191 static const u8 dtc_table_up[]={
2192 DTC_DWN_BASE,
2193 (DTC_DWN_BASE-5),
2194 (DTC_DWN_BASE-10),
2195 (DTC_DWN_BASE-15),
2196 (DTC_DWN_BASE-15),
2197 (DTC_DWN_BASE-20),
2198 (DTC_DWN_BASE-20),
2199 (DTC_DWN_BASE-25),
2200 (DTC_DWN_BASE-25),
2201 (DTC_DWN_BASE-30),
2202 (DTC_DWN_BASE-35)
2203 };
2204
2205 u8 i;
2206 u8 dtc_steps=0;
2207 u8 sign;
2208 u8 resp_txagc=0;
2209
2210 #if 0
2211 /* As DIG is disabled, DTC is also disable */
2212 if(!(pDM_Odm->SupportAbility & ODM_XXXXXX))
2213 return;
2214 #endif
2215
2216 if (DTC_BASE < pDM_Odm->RSSI_Min) {
2217 /* need to decade the CTS TX power */
2218 sign = 1;
2219 for (i=0;i<ARRAY_SIZE(dtc_table_down);i++)
2220 {
2221 if ((dtc_table_down[i] >= pDM_Odm->RSSI_Min) || (dtc_steps >= 6))
2222 break;
2223 else
2224 dtc_steps++;
2225 }
2226 }
2227 #if 0
2228 else if (DTC_DWN_BASE > pDM_Odm->RSSI_Min)
2229 {
2230 /* needs to increase the CTS TX power */
2231 sign = 0;
2232 dtc_steps = 1;
2233 for (i=0;i<ARRAY_SIZE(dtc_table_up);i++)
2234 {
2235 if ((dtc_table_up[i] <= pDM_Odm->RSSI_Min) || (dtc_steps>=10))
2236 break;
2237 else
2238 dtc_steps++;
2239 }
2240 }
2241 #endif
2242 else
2243 {
2244 sign = 0;
2245 dtc_steps = 0;
2246 }
2247
2248 resp_txagc = dtc_steps | (sign << 4);
2249 resp_txagc = resp_txagc | (resp_txagc << 5);
2250 ODM_Write1Byte(pDM_Odm, 0x06d9, resp_txagc);
2251
2252 ODM_RT_TRACE(pDM_Odm, ODM_COMP_PWR_TRAIN, ODM_DBG_LOUD, ("%s RSSI_Min:%u, set RESP_TXAGC to %s %u\n",
2253 __func__, pDM_Odm->RSSI_Min, sign ? "minus" : "plus", dtc_steps));
2254 #endif /* CONFIG_RESP_TXAGC_ADJUST */
2255 }
2256
2257 #endif /* #if (DM_ODM_SUPPORT_TYPE == ODM_CE) */
2258
2259 VOID
odm_UpdatePowerTrainingState(IN PDM_ODM_T pDM_Odm)2260 odm_UpdatePowerTrainingState(
2261 IN PDM_ODM_T pDM_Odm
2262 )
2263 {
2264 #if (DM_ODM_SUPPORT_TYPE & (ODM_WIN|ODM_CE))
2265 PFALSE_ALARM_STATISTICS FalseAlmCnt = (PFALSE_ALARM_STATISTICS)PhyDM_Get_Structure( pDM_Odm , PHYDM_FALSEALMCNT);
2266 pDIG_T pDM_DigTable = &pDM_Odm->DM_DigTable;
2267 u4Byte score = 0;
2268
2269 if(!(pDM_Odm->SupportAbility & ODM_BB_PWR_TRAIN))
2270 return;
2271
2272 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState()============>\n"));
2273 pDM_Odm->bChangeState = FALSE;
2274
2275 // Debug command
2276 if(pDM_Odm->ForcePowerTrainingState)
2277 {
2278 if(pDM_Odm->ForcePowerTrainingState == 1 && !pDM_Odm->bDisablePowerTraining)
2279 {
2280 pDM_Odm->bChangeState = TRUE;
2281 pDM_Odm->bDisablePowerTraining = TRUE;
2282 }
2283 else if(pDM_Odm->ForcePowerTrainingState == 2 && pDM_Odm->bDisablePowerTraining)
2284 {
2285 pDM_Odm->bChangeState = TRUE;
2286 pDM_Odm->bDisablePowerTraining = FALSE;
2287 }
2288
2289 pDM_Odm->PT_score = 0;
2290 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2291 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
2292 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): ForcePowerTrainingState = %d\n",
2293 pDM_Odm->ForcePowerTrainingState));
2294 return;
2295 }
2296
2297 if(!pDM_Odm->bLinked)
2298 return;
2299
2300 // First connect
2301 if((pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0 == FALSE))
2302 {
2303 pDM_Odm->PT_score = 0;
2304 pDM_Odm->bChangeState = TRUE;
2305 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2306 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
2307 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): First Connect\n"));
2308 return;
2309 }
2310
2311 // Compute score
2312 if(pDM_Odm->NHM_cnt_0 >= 215)
2313 score = 2;
2314 else if(pDM_Odm->NHM_cnt_0 >= 190)
2315 score = 1; // unknow state
2316 else
2317 {
2318 u4Byte RX_Pkt_Cnt;
2319
2320 RX_Pkt_Cnt = (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM) + (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK);
2321
2322 if((FalseAlmCnt->Cnt_CCA_all > 31 && RX_Pkt_Cnt > 31) && (FalseAlmCnt->Cnt_CCA_all >= RX_Pkt_Cnt))
2323 {
2324 if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 1)) <= FalseAlmCnt->Cnt_CCA_all)
2325 score = 0;
2326 else if((RX_Pkt_Cnt + (RX_Pkt_Cnt >> 2)) <= FalseAlmCnt->Cnt_CCA_all)
2327 score = 1;
2328 else
2329 score = 2;
2330 }
2331 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): RX_Pkt_Cnt = %d, Cnt_CCA_all = %d\n",
2332 RX_Pkt_Cnt, FalseAlmCnt->Cnt_CCA_all));
2333 }
2334 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NumQryPhyStatusOFDM = %d, NumQryPhyStatusCCK = %d\n",
2335 (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM), (u4Byte)(pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK)));
2336 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): NHM_cnt_0 = %d, score = %d\n",
2337 pDM_Odm->NHM_cnt_0, score));
2338
2339 // smoothing
2340 pDM_Odm->PT_score = (score << 4) + (pDM_Odm->PT_score>>1) + (pDM_Odm->PT_score>>2);
2341 score = (pDM_Odm->PT_score + 32) >> 6;
2342 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): PT_score = %d, score after smoothing = %d\n",
2343 pDM_Odm->PT_score, score));
2344
2345 // Mode decision
2346 if(score == 2)
2347 {
2348 if(pDM_Odm->bDisablePowerTraining)
2349 {
2350 pDM_Odm->bChangeState = TRUE;
2351 pDM_Odm->bDisablePowerTraining = FALSE;
2352 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
2353 }
2354 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Enable Power Training\n"));
2355 }
2356 else if(score == 0)
2357 {
2358 if(!pDM_Odm->bDisablePowerTraining)
2359 {
2360 pDM_Odm->bChangeState = TRUE;
2361 pDM_Odm->bDisablePowerTraining = TRUE;
2362 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Change state\n"));
2363 }
2364 ODM_RT_TRACE(pDM_Odm,ODM_COMP_RA_MASK, ODM_DBG_LOUD,("odm_UpdatePowerTrainingState(): Disable Power Training\n"));
2365 }
2366
2367 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM = 0;
2368 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK = 0;
2369 #endif
2370 }
2371
2372
2373
2374 /*===========================================================*/
2375 /* The following is for compile only*/
2376 /*===========================================================*/
2377 /*#define TARGET_CHNL_NUM_2G_5G 59*/
2378 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN)
2379
GetRightChnlPlaceforIQK(u1Byte chnl)2380 u1Byte GetRightChnlPlaceforIQK(u1Byte chnl)
2381 {
2382 u1Byte channel_all[TARGET_CHNL_NUM_2G_5G] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 36, 38, 40, 42, 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 100,
2383 102, 104, 106, 108, 110, 112, 114, 116, 118, 120, 122, 124, 126, 128, 130, 132, 134, 136, 138, 140, 149, 151, 153, 155, 157, 159, 161, 163, 165};
2384 u1Byte place = chnl;
2385
2386
2387 if (chnl > 14) {
2388 for (place = 14; place < sizeof(channel_all); place++) {
2389 if (channel_all[place] == chnl)
2390 return place-13;
2391 }
2392 }
2393
2394 return 0;
2395 }
2396
2397 #endif
2398 /*===========================================================*/
2399
2400 VOID
phydm_NoisyDetection(IN PDM_ODM_T pDM_Odm)2401 phydm_NoisyDetection(
2402 IN PDM_ODM_T pDM_Odm
2403 )
2404 {
2405 u4Byte Total_FA_Cnt, Total_CCA_Cnt;
2406 u4Byte Score = 0, i, Score_Smooth;
2407
2408 Total_CCA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_CCA_all;
2409 Total_FA_Cnt = pDM_Odm->FalseAlmCnt.Cnt_all;
2410
2411 /*
2412 if( Total_FA_Cnt*16>=Total_CCA_Cnt*14 ) // 87.5
2413
2414 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*12 ) // 75
2415
2416 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*10 ) // 56.25
2417
2418 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*8 ) // 50
2419
2420 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*7 ) // 43.75
2421
2422 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*6 ) // 37.5
2423
2424 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*5 ) // 31.25%
2425
2426 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*4 ) // 25%
2427
2428 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*3 ) // 18.75%
2429
2430 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*2 ) // 12.5%
2431
2432 else if( Total_FA_Cnt*16>=Total_CCA_Cnt*1 ) // 6.25%
2433 */
2434 for(i=0;i<=16;i++)
2435 {
2436 if( Total_FA_Cnt*16>=Total_CCA_Cnt*(16-i) )
2437 {
2438 Score = 16-i;
2439 break;
2440 }
2441 }
2442
2443 // NoisyDecision_Smooth = NoisyDecision_Smooth>>1 + (Score<<3)>>1;
2444 pDM_Odm->NoisyDecision_Smooth = (pDM_Odm->NoisyDecision_Smooth>>1) + (Score<<2);
2445
2446 // Round the NoisyDecision_Smooth: +"3" comes from (2^3)/2-1
2447 Score_Smooth = (Total_CCA_Cnt>=300)?((pDM_Odm->NoisyDecision_Smooth+3)>>3):0;
2448
2449 pDM_Odm->NoisyDecision = (Score_Smooth>=3)?1:0;
2450 /*
2451 switch(Score_Smooth)
2452 {
2453 case 0:
2454 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2455 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=0%%\n"));
2456 break;
2457 case 1:
2458 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2459 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=6.25%%\n"));
2460 break;
2461 case 2:
2462 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2463 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=12.5%%\n"));
2464 break;
2465 case 3:
2466 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2467 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=18.75%%\n"));
2468 break;
2469 case 4:
2470 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2471 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=25%%\n"));
2472 break;
2473 case 5:
2474 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2475 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=31.25%%\n"));
2476 break;
2477 case 6:
2478 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2479 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=37.5%%\n"));
2480 break;
2481 case 7:
2482 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2483 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=43.75%%\n"));
2484 break;
2485 case 8:
2486 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2487 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=50%%\n"));
2488 break;
2489 case 9:
2490 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2491 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=56.25%%\n"));
2492 break;
2493 case 10:
2494 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2495 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=62.5%%\n"));
2496 break;
2497 case 11:
2498 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2499 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=68.75%%\n"));
2500 break;
2501 case 12:
2502 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2503 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=75%%\n"));
2504 break;
2505 case 13:
2506 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2507 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=81.25%%\n"));
2508 break;
2509 case 14:
2510 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2511 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=87.5%%\n"));
2512 break;
2513 case 15:
2514 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2515 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=93.75%%\n"));
2516 break;
2517 case 16:
2518 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2519 ("[NoisyDetection] Total_FA_Cnt/Total_CCA_Cnt=100%%\n"));
2520 break;
2521 default:
2522 ODM_RT_TRACE(pDM_Odm,ODM_COMP_COMMON, ODM_DBG_LOUD,
2523 ("[NoisyDetection] Unknown Value!! Need Check!!\n"));
2524 }
2525 */
2526 ODM_RT_TRACE(pDM_Odm, ODM_COMP_NOISY_DETECT, ODM_DBG_LOUD,
2527 ("[NoisyDetection] Total_CCA_Cnt=%d, Total_FA_Cnt=%d, NoisyDecision_Smooth=%d, Score=%d, Score_Smooth=%d, pDM_Odm->NoisyDecision=%d\n",
2528 Total_CCA_Cnt, Total_FA_Cnt, pDM_Odm->NoisyDecision_Smooth, Score, Score_Smooth, pDM_Odm->NoisyDecision));
2529
2530 }
2531
2532 VOID
phydm_set_ext_switch(IN PVOID pDM_VOID,IN u4Byte * const dm_value,IN u4Byte * _used,OUT char * output,IN u4Byte * _out_len)2533 phydm_set_ext_switch(
2534 IN PVOID pDM_VOID,
2535 IN u4Byte *const dm_value,
2536 IN u4Byte *_used,
2537 OUT char *output,
2538 IN u4Byte *_out_len
2539 )
2540 {
2541 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2542 u4Byte used = *_used;
2543 u4Byte out_len = *_out_len;
2544 u4Byte ext_ant_switch = dm_value[0];
2545
2546 if (pDM_Odm->SupportICType & (ODM_RTL8821|ODM_RTL8881A)) {
2547
2548 /*Output Pin Settings*/
2549 ODM_SetMACReg(pDM_Odm, 0x4C, BIT23, 0); /*select DPDT_P and DPDT_N as output pin*/
2550 ODM_SetMACReg(pDM_Odm, 0x4C, BIT24, 1); /*by WLAN control*/
2551
2552 ODM_SetBBReg(pDM_Odm, 0xCB4, 0xF, 7); /*DPDT_P = 1b'0*/
2553 ODM_SetBBReg(pDM_Odm, 0xCB4, 0xF0, 7); /*DPDT_N = 1b'0*/
2554
2555 if (ext_ant_switch == MAIN_ANT) {
2556 ODM_SetBBReg(pDM_Odm, 0xCB4, (BIT29|BIT28), 1);
2557 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("***8821A set Ant switch = 2b'01 (Main)\n"));
2558 } else if (ext_ant_switch == AUX_ANT) {
2559 ODM_SetBBReg(pDM_Odm, 0xCB4, BIT29|BIT28, 2);
2560 ODM_RT_TRACE(pDM_Odm, PHYDM_COMP_ADAPTIVITY, ODM_DBG_LOUD, ("***8821A set Ant switch = 2b'10 (Aux)\n"));
2561 }
2562 }
2563 }
2564
2565 VOID
phydm_csi_mask_enable(IN PVOID pDM_VOID,IN u4Byte enable)2566 phydm_csi_mask_enable(
2567 IN PVOID pDM_VOID,
2568 IN u4Byte enable
2569 )
2570 {
2571 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2572 u4Byte reg_value = 0;
2573
2574 reg_value = (enable == CSI_MASK_ENABLE) ? 1 : 0;
2575
2576 if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
2577
2578 ODM_SetBBReg(pDM_Odm, 0xD2C, BIT28, reg_value);
2579 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("Enable CSI Mask: Reg 0xD2C[28] = ((0x%x))\n", reg_value));
2580
2581 } else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
2582
2583 ODM_SetBBReg(pDM_Odm, 0x874, BIT0, reg_value);
2584 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("Enable CSI Mask: Reg 0x874[0] = ((0x%x))\n", reg_value));
2585 }
2586
2587 }
2588
2589 VOID
phydm_clean_all_csi_mask(IN PVOID pDM_VOID)2590 phydm_clean_all_csi_mask(
2591 IN PVOID pDM_VOID
2592 )
2593 {
2594 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2595
2596 if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
2597
2598 ODM_SetBBReg(pDM_Odm, 0xD40, bMaskDWord, 0);
2599 ODM_SetBBReg(pDM_Odm, 0xD44, bMaskDWord, 0);
2600 ODM_SetBBReg(pDM_Odm, 0xD48, bMaskDWord, 0);
2601 ODM_SetBBReg(pDM_Odm, 0xD4c, bMaskDWord, 0);
2602
2603 } else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
2604
2605 ODM_SetBBReg(pDM_Odm, 0x880, bMaskDWord, 0);
2606 ODM_SetBBReg(pDM_Odm, 0x884, bMaskDWord, 0);
2607 ODM_SetBBReg(pDM_Odm, 0x888, bMaskDWord, 0);
2608 ODM_SetBBReg(pDM_Odm, 0x88c, bMaskDWord, 0);
2609 ODM_SetBBReg(pDM_Odm, 0x890, bMaskDWord, 0);
2610 ODM_SetBBReg(pDM_Odm, 0x894, bMaskDWord, 0);
2611 ODM_SetBBReg(pDM_Odm, 0x898, bMaskDWord, 0);
2612 ODM_SetBBReg(pDM_Odm, 0x89c, bMaskDWord, 0);
2613 }
2614 }
2615
2616 VOID
phydm_set_csi_mask_reg(IN PVOID pDM_VOID,IN u4Byte tone_idx_tmp,IN u1Byte tone_direction)2617 phydm_set_csi_mask_reg(
2618 IN PVOID pDM_VOID,
2619 IN u4Byte tone_idx_tmp,
2620 IN u1Byte tone_direction
2621 )
2622 {
2623 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2624 u1Byte byte_offset, bit_offset;
2625 u4Byte target_reg;
2626 u1Byte reg_tmp_value;
2627 u4Byte tone_num = 64;
2628 u4Byte tone_num_shift = 0;
2629 u4Byte csi_mask_reg_p = 0, csi_mask_reg_n = 0;
2630
2631 /* calculate real tone idx*/
2632 if ((tone_idx_tmp % 10) >= 5)
2633 tone_idx_tmp += 10;
2634
2635 tone_idx_tmp = (tone_idx_tmp/10);
2636
2637 if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
2638
2639 tone_num = 64;
2640 csi_mask_reg_p = 0xD40;
2641 csi_mask_reg_n = 0xD48;
2642
2643 } else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
2644
2645 tone_num = 128;
2646 csi_mask_reg_p = 0x880;
2647 csi_mask_reg_n = 0x890;
2648 }
2649
2650 if (tone_direction == FREQ_POSITIVE) {
2651
2652 if (tone_idx_tmp >= (tone_num - 1))
2653 tone_idx_tmp = (tone_num - 1);
2654
2655 byte_offset = (u1Byte)(tone_idx_tmp >> 3);
2656 bit_offset = (u1Byte)(tone_idx_tmp & 0x7);
2657 target_reg = csi_mask_reg_p + byte_offset;
2658
2659 } else {
2660 tone_num_shift = tone_num;
2661
2662 if (tone_idx_tmp >= tone_num)
2663 tone_idx_tmp = tone_num;
2664
2665 tone_idx_tmp = tone_num - tone_idx_tmp;
2666
2667 byte_offset = (u1Byte)(tone_idx_tmp >> 3);
2668 bit_offset = (u1Byte)(tone_idx_tmp & 0x7);
2669 target_reg = csi_mask_reg_n + byte_offset;
2670 }
2671
2672 reg_tmp_value = ODM_Read1Byte(pDM_Odm, target_reg);
2673 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("Pre Mask tone idx[%d]: Reg0x%x = ((0x%x))\n", (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value));
2674 reg_tmp_value |= BIT(bit_offset);
2675 ODM_Write1Byte(pDM_Odm, target_reg, reg_tmp_value);
2676 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("New Mask tone idx[%d]: Reg0x%x = ((0x%x))\n", (tone_idx_tmp + tone_num_shift), target_reg, reg_tmp_value));
2677 }
2678
2679 VOID
phydm_set_nbi_reg(IN PVOID pDM_VOID,IN u4Byte tone_idx_tmp,IN u4Byte bw)2680 phydm_set_nbi_reg(
2681 IN PVOID pDM_VOID,
2682 IN u4Byte tone_idx_tmp,
2683 IN u4Byte bw
2684 )
2685 {
2686 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2687 u4Byte nbi_table_128[NBI_TABLE_SIZE_128] = {25, 55, 85, 115, 135, 155, 185, 205, 225, 245, /*1~10*/ /*tone_idx X 10*/
2688 265, 285, 305, 335, 355, 375, 395, 415, 435, 455, /*11~20*/
2689 485, 505, 525, 555, 585, 615, 635}; /*21~27*/
2690
2691 u4Byte nbi_table_256[NBI_TABLE_SIZE_256] = { 25, 55, 85, 115, 135, 155, 175, 195, 225, 245, /*1~10*/
2692 265, 285, 305, 325, 345, 365, 385, 405, 425, 445, /*11~20*/
2693 465, 485, 505, 525, 545, 565, 585, 605, 625, 645, /*21~30*/
2694 665, 695, 715, 735, 755, 775, 795, 815, 835, 855, /*31~40*/
2695 875, 895, 915, 935, 955, 975, 995, 1015, 1035, 1055, /*41~50*/
2696 1085, 1105, 1125, 1145, 1175, 1195, 1225, 1255, 1275}; /*51~59*/
2697
2698 u4Byte reg_idx = 0;
2699 u4Byte i;
2700 u1Byte nbi_table_idx = FFT_128_TYPE;
2701
2702 if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
2703
2704 nbi_table_idx = FFT_128_TYPE;
2705 } else if (pDM_Odm->SupportICType & ODM_IC_11AC_1_SERIES) {
2706
2707 nbi_table_idx = FFT_256_TYPE;
2708 } else if (pDM_Odm->SupportICType & ODM_IC_11AC_2_SERIES) {
2709
2710 if (bw == 80)
2711 nbi_table_idx = FFT_256_TYPE;
2712 else /*20M, 40M*/
2713 nbi_table_idx = FFT_128_TYPE;
2714 }
2715
2716 if (nbi_table_idx == FFT_128_TYPE) {
2717
2718 for (i = 0; i < NBI_TABLE_SIZE_128; i++) {
2719 if (tone_idx_tmp < nbi_table_128[i]) {
2720 reg_idx = i+1;
2721 break;
2722 }
2723 }
2724
2725 } else if (nbi_table_idx == FFT_256_TYPE) {
2726
2727 for (i = 0; i < NBI_TABLE_SIZE_256; i++) {
2728 if (tone_idx_tmp < nbi_table_256[i]) {
2729 reg_idx = i+1;
2730 break;
2731 }
2732 }
2733 }
2734
2735 if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
2736 ODM_SetBBReg(pDM_Odm, 0xc40, 0x1f000000, reg_idx);
2737 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("Set tone idx: Reg0xC40[28:24] = ((0x%x))\n", reg_idx));
2738 /**/
2739 } else {
2740 ODM_SetBBReg(pDM_Odm, 0x87c, 0xfc000, reg_idx);
2741 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("Set tone idx: Reg0x87C[19:14] = ((0x%x))\n", reg_idx));
2742 /**/
2743 }
2744 }
2745
2746
2747 VOID
phydm_nbi_enable(IN PVOID pDM_VOID,IN u4Byte enable)2748 phydm_nbi_enable(
2749 IN PVOID pDM_VOID,
2750 IN u4Byte enable
2751 )
2752 {
2753 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2754 u4Byte reg_value = 0;
2755
2756 reg_value = (enable == NBI_ENABLE) ? 1 : 0;
2757
2758 if (pDM_Odm->SupportICType & ODM_IC_11N_SERIES) {
2759
2760 ODM_SetBBReg(pDM_Odm, 0xc40, BIT9, reg_value);
2761 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("Enable NBI Reg0xC40[9] = ((0x%x))\n", reg_value));
2762
2763 } else if (pDM_Odm->SupportICType & ODM_IC_11AC_SERIES) {
2764
2765 ODM_SetBBReg(pDM_Odm, 0x87c, BIT13, reg_value);
2766 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("Enable NBI Reg0x87C[13] = ((0x%x))\n", reg_value));
2767 }
2768 }
2769
2770 u1Byte
phydm_calculate_fc(IN PVOID pDM_VOID,IN u4Byte channel,IN u4Byte bw,IN u4Byte Second_ch,IN OUT u4Byte * fc_in)2771 phydm_calculate_fc(
2772 IN PVOID pDM_VOID,
2773 IN u4Byte channel,
2774 IN u4Byte bw,
2775 IN u4Byte Second_ch,
2776 IN OUT u4Byte *fc_in
2777 )
2778 {
2779 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2780 u4Byte fc = *fc_in;
2781 u4Byte start_ch_per_40m[NUM_START_CH_40M] = {36, 44, 52, 60, 100, 108, 116, 124, 132, 140, 149, 157, 165, 173};
2782 u4Byte start_ch_per_80m[NUM_START_CH_80M] = {36, 52, 100, 116, 132, 149, 165};
2783 pu4Byte p_start_ch = &(start_ch_per_40m[0]);
2784 u4Byte num_start_channel = NUM_START_CH_40M;
2785 u4Byte channel_offset = 0;
2786 u4Byte i;
2787
2788 /*2.4G*/
2789 if (channel <= 14 && channel > 0) {
2790
2791 if (bw == 80) {
2792 return SET_ERROR;
2793 }
2794
2795 fc = 2412 + (channel - 1)*5;
2796
2797 if (bw == 40 && (Second_ch == PHYDM_ABOVE)) {
2798
2799 if (channel >= 10) {
2800 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("CH = ((%d)), Scnd_CH = ((%d)) Error Setting\n", channel, Second_ch));
2801 return SET_ERROR;
2802 }
2803 fc += 10;
2804 } else if (bw == 40 && (Second_ch == PHYDM_BELOW)) {
2805
2806 if (channel <= 2) {
2807 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("CH = ((%d)), Scnd_CH = ((%d)) Error Setting\n", channel, Second_ch));
2808 return SET_ERROR;
2809 }
2810 fc -= 10;
2811 }
2812 }
2813 /*5G*/
2814 else if (channel >= 36 && channel <= 177) {
2815
2816 if (bw != 20) {
2817
2818 if (bw == 40) {
2819 num_start_channel = NUM_START_CH_40M;
2820 p_start_ch = &(start_ch_per_40m[0]);
2821 channel_offset = CH_OFFSET_40M;
2822 } else if (bw == 80) {
2823 num_start_channel = NUM_START_CH_80M;
2824 p_start_ch = &(start_ch_per_80m[0]);
2825 channel_offset = CH_OFFSET_80M;
2826 }
2827
2828 for (i = 0; i < num_start_channel; i++) {
2829
2830 if (channel < p_start_ch[i+1]) {
2831 channel = p_start_ch[i] + channel_offset;
2832 break;
2833 }
2834 }
2835 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("Mod_CH = ((%d))\n", channel));
2836 }
2837
2838 fc = 5180 + (channel-36)*5;
2839
2840 } else {
2841 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("CH = ((%d)) Error Setting\n", channel));
2842 return SET_ERROR;
2843 }
2844
2845 *fc_in = fc;
2846
2847 return SET_SUCCESS;
2848 }
2849
2850
2851 u1Byte
phydm_calculate_intf_distance(IN PVOID pDM_VOID,IN u4Byte bw,IN u4Byte fc,IN u4Byte f_interference,IN OUT u4Byte * p_tone_idx_tmp_in)2852 phydm_calculate_intf_distance(
2853 IN PVOID pDM_VOID,
2854 IN u4Byte bw,
2855 IN u4Byte fc,
2856 IN u4Byte f_interference,
2857 IN OUT u4Byte *p_tone_idx_tmp_in
2858 )
2859 {
2860 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2861 u4Byte bw_up, bw_low;
2862 u4Byte int_distance;
2863 u4Byte tone_idx_tmp;
2864 u1Byte set_result = SET_NO_NEED;
2865
2866 bw_up = fc + bw/2;
2867 bw_low = fc - bw/2;
2868
2869 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("[f_l, fc, fh] = [ %d, %d, %d ], f_int = ((%d))\n", bw_low, fc, bw_up, f_interference));
2870
2871 if ((f_interference >= bw_low) && (f_interference <= bw_up)) {
2872
2873 int_distance = (fc >= f_interference) ? (fc - f_interference) : (f_interference - fc);
2874 tone_idx_tmp = (int_distance<<5); /* =10*(int_distance /0.3125) */
2875 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("int_distance = ((%d MHz)) Mhz, tone_idx_tmp = ((%d.%d))\n", int_distance, (tone_idx_tmp/10), (tone_idx_tmp%10)));
2876 *p_tone_idx_tmp_in = tone_idx_tmp;
2877 set_result = SET_SUCCESS;
2878 }
2879
2880 return set_result;
2881
2882 }
2883
2884
2885 u1Byte
phydm_csi_mask_setting(IN PVOID pDM_VOID,IN u4Byte enable,IN u4Byte channel,IN u4Byte bw,IN u4Byte f_interference,IN u4Byte Second_ch)2886 phydm_csi_mask_setting(
2887 IN PVOID pDM_VOID,
2888 IN u4Byte enable,
2889 IN u4Byte channel,
2890 IN u4Byte bw,
2891 IN u4Byte f_interference,
2892 IN u4Byte Second_ch
2893 )
2894 {
2895 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2896 u4Byte fc;
2897 u4Byte int_distance;
2898 u1Byte tone_direction;
2899 u4Byte tone_idx_tmp;
2900 u1Byte set_result = SET_SUCCESS;
2901
2902 if (enable == CSI_MASK_DISABLE) {
2903 set_result = SET_SUCCESS;
2904 phydm_clean_all_csi_mask(pDM_Odm);
2905
2906 } else {
2907
2908 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("[Set CSI MASK_] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
2909 channel, bw, f_interference, (((bw == 20) || (channel > 14)) ? "Don't care" : (Second_ch == PHYDM_ABOVE) ? "H" : "L")));
2910
2911 /*calculate fc*/
2912 if (phydm_calculate_fc(pDM_Odm, channel, bw, Second_ch, &fc) == SET_ERROR)
2913 set_result = SET_ERROR;
2914
2915 else {
2916 /*calculate interference distance*/
2917 if (phydm_calculate_intf_distance(pDM_Odm, bw, fc, f_interference, &tone_idx_tmp) == SET_SUCCESS) {
2918
2919 tone_direction = (f_interference >= fc) ? FREQ_POSITIVE : FREQ_NEGATIVE;
2920 phydm_set_csi_mask_reg(pDM_Odm, tone_idx_tmp, tone_direction);
2921 set_result = SET_SUCCESS;
2922 } else
2923 set_result = SET_NO_NEED;
2924 }
2925 }
2926
2927 if (set_result == SET_SUCCESS)
2928 phydm_csi_mask_enable(pDM_Odm, enable);
2929 else
2930 phydm_csi_mask_enable(pDM_Odm, CSI_MASK_DISABLE);
2931
2932 return set_result;
2933 }
2934
2935 u1Byte
phydm_nbi_setting(IN PVOID pDM_VOID,IN u4Byte enable,IN u4Byte channel,IN u4Byte bw,IN u4Byte f_interference,IN u4Byte Second_ch)2936 phydm_nbi_setting(
2937 IN PVOID pDM_VOID,
2938 IN u4Byte enable,
2939 IN u4Byte channel,
2940 IN u4Byte bw,
2941 IN u4Byte f_interference,
2942 IN u4Byte Second_ch
2943 )
2944 {
2945 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2946 u4Byte fc;
2947 u4Byte int_distance;
2948 u4Byte tone_idx_tmp;
2949 u1Byte set_result = SET_SUCCESS;
2950 u4Byte bw_max = 40;
2951
2952 if (enable == NBI_DISABLE)
2953 set_result = SET_SUCCESS;
2954
2955 else {
2956
2957 ODM_RT_TRACE(pDM_Odm, ODM_COMP_API, ODM_DBG_LOUD, ("[Set NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
2958 channel, bw, f_interference, (((Second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "Don't care" : (Second_ch == PHYDM_ABOVE) ? "H" : "L")));
2959
2960 /*calculate fc*/
2961 if (phydm_calculate_fc(pDM_Odm, channel, bw, Second_ch, &fc) == SET_ERROR)
2962 set_result = SET_ERROR;
2963
2964 else {
2965 /*calculate interference distance*/
2966 if (phydm_calculate_intf_distance(pDM_Odm, bw, fc, f_interference, &tone_idx_tmp) == SET_SUCCESS) {
2967
2968 phydm_set_nbi_reg(pDM_Odm, tone_idx_tmp, bw);
2969 set_result = SET_SUCCESS;
2970 } else
2971 set_result = SET_NO_NEED;
2972 }
2973 }
2974
2975 if (set_result == SET_SUCCESS)
2976 phydm_nbi_enable(pDM_Odm, enable);
2977 else
2978 phydm_nbi_enable(pDM_Odm, NBI_DISABLE);
2979
2980 return set_result;
2981 }
2982
2983 VOID
phydm_api_debug(IN PVOID pDM_VOID,IN u4Byte function_map,IN u4Byte * const dm_value,IN u4Byte * _used,OUT char * output,IN u4Byte * _out_len)2984 phydm_api_debug(
2985 IN PVOID pDM_VOID,
2986 IN u4Byte function_map,
2987 IN u4Byte *const dm_value,
2988 IN u4Byte *_used,
2989 OUT char *output,
2990 IN u4Byte *_out_len
2991 )
2992 {
2993 PDM_ODM_T pDM_Odm = (PDM_ODM_T)pDM_VOID;
2994 u4Byte used = *_used;
2995 u4Byte out_len = *_out_len;
2996 u4Byte channel = dm_value[1];
2997 u4Byte bw = dm_value[2];
2998 u4Byte f_interference = dm_value[3];
2999 u4Byte Second_ch = dm_value[4];
3000 u1Byte set_result = 0;
3001
3002 /*PHYDM_API_NBI*/
3003 /*-------------------------------------------------------------------------------------------------------------------------------*/
3004 if (function_map == PHYDM_API_NBI) {
3005
3006 if (dm_value[0] == 100) {
3007
3008 PHYDM_SNPRINTF((output+used, out_len-used, "[HELP-NBI] EN(on=1, off=2) CH BW(20/40/80) f_intf(Mhz) Scnd_CH(L=1, H=2)\n"));
3009 return;
3010
3011 } else if (dm_value[0] == NBI_ENABLE) {
3012
3013 PHYDM_SNPRINTF((output+used, out_len-used, "[Enable NBI] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
3014 channel, bw, f_interference, ((Second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "Don't care" : ((Second_ch == PHYDM_ABOVE) ? "H" : "L")));
3015 set_result = phydm_nbi_setting(pDM_Odm, NBI_ENABLE, channel, bw, f_interference, Second_ch);
3016
3017 } else if (dm_value[0] == NBI_DISABLE) {
3018
3019 PHYDM_SNPRINTF((output+used, out_len-used, "[Disable NBI]\n"));
3020 set_result = phydm_nbi_setting(pDM_Odm, NBI_DISABLE, channel, bw, f_interference, Second_ch);
3021
3022 } else {
3023
3024 set_result = SET_ERROR;
3025 }
3026 PHYDM_SNPRINTF((output+used, out_len-used, "[NBI set result: %s]\n", (set_result == SET_SUCCESS) ? "Success" : ((set_result == SET_NO_NEED) ? "No need" : "Error")));
3027
3028 }
3029
3030 /*PHYDM_CSI_MASK*/
3031 /*-------------------------------------------------------------------------------------------------------------------------------*/
3032 else if (function_map == PHYDM_API_CSI_MASK) {
3033
3034 if (dm_value[0] == 100) {
3035
3036 PHYDM_SNPRINTF((output+used, out_len-used, "[HELP-CSI MASK] EN(on=1, off=2) CH BW(20/40/80) f_intf(Mhz) Scnd_CH(L=1, H=2)\n"));
3037 return;
3038
3039 } else if (dm_value[0] == CSI_MASK_ENABLE) {
3040
3041 PHYDM_SNPRINTF((output+used, out_len-used, "[Enable CSI MASK] CH = ((%d)), BW = ((%d)), f_intf = ((%d)), Scnd_CH = ((%s))\n",
3042 channel, bw, f_interference, (channel > 14)?"Don't care":(((Second_ch == PHYDM_DONT_CARE) || (bw == 20) || (channel > 14)) ? "H" : "L")));
3043 set_result = phydm_csi_mask_setting(pDM_Odm, CSI_MASK_ENABLE, channel, bw, f_interference, Second_ch);
3044
3045 } else if (dm_value[0] == CSI_MASK_DISABLE) {
3046
3047 PHYDM_SNPRINTF((output+used, out_len-used, "[Disable CSI MASK]\n"));
3048 set_result = phydm_csi_mask_setting(pDM_Odm, CSI_MASK_DISABLE, channel, bw, f_interference, Second_ch);
3049
3050 } else {
3051
3052 set_result = SET_ERROR;
3053 }
3054 PHYDM_SNPRINTF((output+used, out_len-used, "[CSI MASK set result: %s]\n", (set_result == SET_SUCCESS) ? "Success" : ((set_result == SET_NO_NEED) ? "No need" : "Error")));
3055 }
3056 }
3057
3058
3059