1 /******************************************************************************
2 *
3 * Copyright(c) 2015 Realtek Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 ******************************************************************************/
19 #ifdef CONFIG_MCC_MODE
20 #define _HAL_MCC_C_
21
22 #include <drv_types.h> /* PADAPTER */
23 #include <rtw_mcc.h> /* mcc structure */
24 #include <hal_data.h> /* HAL_DATA */
25 #include <rtw_pwrctrl.h> /* power control */
26
27 /* backup IQK value */
rtw_hal_mcc_backup_IQK_val(PADAPTER padapter)28 void rtw_hal_mcc_backup_IQK_val(PADAPTER padapter)
29 {
30 u8 take_care_iqk = _FALSE;
31
32 rtw_hal_get_hwreg(padapter, HW_VAR_CH_SW_NEED_TO_TAKE_CARE_IQK_INFO, &take_care_iqk);
33 if (take_care_iqk == _TRUE && MCC_EN(padapter))
34 rtw_hal_ch_sw_iqk_info_restore(padapter, CH_SW_USE_CASE_MCC);
35 }
36
rtw_hal_check_mcc_status(PADAPTER padapter,u8 mcc_status)37 u8 rtw_hal_check_mcc_status(PADAPTER padapter, u8 mcc_status)
38 {
39 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
40
41 if (pmccobjpriv->mcc_status & (mcc_status))
42 return _TRUE;
43 else
44 return _FALSE;
45 }
46
rtw_hal_set_mcc_status(PADAPTER padapter,u8 mcc_status)47 void rtw_hal_set_mcc_status(PADAPTER padapter, u8 mcc_status)
48 {
49 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
50
51 pmccobjpriv->mcc_status |= (mcc_status);
52 }
53
rtw_hal_clear_mcc_status(PADAPTER padapter,u8 mcc_status)54 void rtw_hal_clear_mcc_status(PADAPTER padapter, u8 mcc_status)
55 {
56 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
57
58 pmccobjpriv->mcc_status &= (~mcc_status);
59 }
60
rtw_hal_config_mcc_role_setting(PADAPTER padapter)61 static void rtw_hal_config_mcc_role_setting(PADAPTER padapter)
62 {
63 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
64 struct mcc_obj_priv *pmccobjpriv = &(pdvobjpriv->mcc_objpriv);
65 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
66 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
67 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
68 struct wlan_network *cur_network = &(pmlmepriv->cur_network);
69 struct sta_priv *pstapriv = &padapter->stapriv;
70 struct sta_info *psta = NULL;
71 struct registry_priv *preg = &padapter->registrypriv;
72
73 /* GO/AP is 1nd order GC/STA is 2nd order */
74 switch (pmccadapriv->role) {
75 case MCC_ROLE_STA:
76 case MCC_ROLE_GC:
77 pmccadapriv->order = 1;
78 pmccadapriv->mcc_duration = pmccobjpriv->duration;
79
80 switch (pmlmeext->cur_bwmode) {
81 case CHANNEL_WIDTH_20:
82 /*
83 * target tx byte(bytes) = target tx tp(Mbits/sec) * 1024 * 1024 / 8 * (duration(ms) / 1024)
84 * = target tx tp(Mbits/sec) * 128 * duration(ms)
85 * note:
86 * target tx tp(Mbits/sec) * 1024 * 1024 / 8 ==> Mbits to bytes
87 * duration(ms) / 1024 ==> msec to sec
88 */
89 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw20_target_tx_tp * 128 * pmccadapriv->mcc_duration;
90 break;
91 case CHANNEL_WIDTH_40:
92 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw40_target_tx_tp * 128 * pmccadapriv->mcc_duration;
93 break;
94 case CHANNEL_WIDTH_80:
95 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_sta_bw80_target_tx_tp * 128 * pmccadapriv->mcc_duration;
96 break;
97 case CHANNEL_WIDTH_160:
98 case CHANNEL_WIDTH_80_80:
99 RTW_INFO(FUNC_ADPT_FMT": not support bwmode = %d\n"
100 , FUNC_ADPT_ARG(padapter), pmlmeext->cur_bwmode);
101 break;
102 }
103
104 /* assign used mac to avoid affecting RA */
105 pmccadapriv->mgmt_queue_macid = MCC_ROLE_STA_GC_MGMT_QUEUE_MACID;
106
107 psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress);
108 if (psta) {
109 /* combine AP/GO macid and mgmt queue macid to bitmap */
110 pmccadapriv->mcc_macid_bitmap = BIT(psta->mac_id) | BIT(pmccadapriv->mgmt_queue_macid);
111 } else {
112 RTW_INFO(FUNC_ADPT_FMT":AP/GO station info is NULL\n", FUNC_ADPT_ARG(padapter));
113 rtw_warn_on(1);
114 }
115 break;
116 case MCC_ROLE_AP:
117 case MCC_ROLE_GO:
118 pmccadapriv->order = 0;
119 pmccadapriv->mcc_duration = 100 - pmccobjpriv->duration; /* 100 means beacon interval */
120
121 switch (pmlmeext->cur_bwmode) {
122 case CHANNEL_WIDTH_20:
123 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw20_target_tx_tp * 128 * pmccadapriv->mcc_duration;
124 break;
125 case CHANNEL_WIDTH_40:
126 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw40_target_tx_tp * 128 * pmccadapriv->mcc_duration;
127 break;
128 case CHANNEL_WIDTH_80:
129 pmccadapriv->mcc_target_tx_bytes_to_port = preg->rtw_mcc_ap_bw80_target_tx_tp * 128 * pmccadapriv->mcc_duration;
130 break;
131 case CHANNEL_WIDTH_160:
132 case CHANNEL_WIDTH_80_80:
133 RTW_INFO(FUNC_ADPT_FMT": not support bwmode = %d\n"
134 , FUNC_ADPT_ARG(padapter), pmlmeext->cur_bwmode);
135 break;
136 }
137
138
139 psta = rtw_get_bcmc_stainfo(padapter);
140
141 if (psta != NULL)
142 pmccadapriv->mgmt_queue_macid = psta->mac_id;
143 else {
144 pmccadapriv->mgmt_queue_macid = MCC_ROLE_SOFTAP_GO_MGMT_QUEUE_MACID;
145 RTW_INFO(FUNC_ADPT_FMT":bcmc station is NULL, use macid %d\n"
146 , FUNC_ADPT_ARG(padapter), pmccadapriv->mgmt_queue_macid);
147 }
148
149 /* combine client macid and mgmt queue macid to bitmap */
150 pmccadapriv->mcc_macid_bitmap = (0xff << 8) | BIT(pmccadapriv->mgmt_queue_macid);
151 break;
152 default:
153 RTW_INFO("Unknown role\n");
154 rtw_warn_on(1);
155 break;
156 }
157
158 pmccobjpriv->iface[pmccadapriv->order] = padapter;
159 RTW_INFO(FUNC_ADPT_FMT": order:%d, role:%d, mcc duration:%d, target tx bytes:%d, mgmt queue macid:%d, bitmap:0x%02x\n"
160 , FUNC_ADPT_ARG(padapter), pmccadapriv->order, pmccadapriv->role, pmccadapriv->mcc_duration
161 , pmccadapriv->mcc_target_tx_bytes_to_port, pmccadapriv->mgmt_queue_macid, pmccadapriv->mcc_macid_bitmap);
162 }
163
rtw_hal_clear_mcc_macid(PADAPTER padapter)164 static void rtw_hal_clear_mcc_macid(PADAPTER padapter)
165 {
166 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
167
168 switch (pmccadapriv->role) {
169 case MCC_ROLE_STA:
170 case MCC_ROLE_GC:
171 /* release mgmt queue macid */
172 rtw_hal_set_FwMediaStatusRpt_single_cmd(padapter
173 , 0, 0, 0, H2C_MSR_ROLE_AP, pmccadapriv->mgmt_queue_macid);
174 break;
175 case MCC_ROLE_AP:
176 case MCC_ROLE_GO:
177 /* nothing to do */
178 break;
179 default:
180 RTW_INFO("Unknown role\n");
181 rtw_warn_on(1);
182 break;
183 }
184 }
rtw_hal_decide_mcc_role(PADAPTER padapter)185 static u8 rtw_hal_decide_mcc_role(PADAPTER padapter)
186 {
187 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
188 _adapter *iface = NULL;
189 struct mcc_adapter_priv *pmccadapriv = NULL;
190 struct wifidirect_info *pwdinfo = NULL;
191 struct mlme_priv *pmlmepriv = NULL;
192 u8 ret = _SUCCESS, i = 0;
193
194 for (i = 0; i < dvobj->iface_nums; i++) {
195 iface = dvobj->padapters[i];
196 if (iface == NULL)
197 continue;
198
199 pmccadapriv = &iface->mcc_adapterpriv;
200
201 if (MLME_IS_GO(iface))
202 pmccadapriv->role = MCC_ROLE_GO;
203 else if (MLME_IS_AP(iface))
204 pmccadapriv->role = MCC_ROLE_AP;
205 else if (MLME_IS_GC(iface))
206 pmccadapriv->role = MCC_ROLE_GC;
207 else if (MLME_IS_STA(iface))
208 pmccadapriv->role = MCC_ROLE_STA;
209 else {
210 pwdinfo = &iface->wdinfo;
211 pmlmepriv = &iface->mlmepriv;
212
213 RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(iface));
214 RTW_INFO("Unknown:P2P state:%d, mlme state:0x%2x, mlmext info state:0x%02x\n",
215 pwdinfo->role, pmlmepriv->fw_state, iface->mlmeextpriv.mlmext_info.state);
216 rtw_warn_on(1);
217 ret = _FAIL;
218 goto exit;
219 }
220
221 if (ret == _SUCCESS)
222 rtw_hal_config_mcc_role_setting(iface);
223 }
224
225 exit:
226 return ret;
227 }
228
rtw_hal_init_mcc_parameter(PADAPTER padapter)229 static void rtw_hal_init_mcc_parameter(PADAPTER padapter)
230 {
231 }
232
rtw_hal_construct_CTS(PADAPTER padapter,u8 * pframe,u32 * pLength)233 static void rtw_hal_construct_CTS(PADAPTER padapter, u8 *pframe, u32 *pLength)
234 {
235 u8 broadcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
236
237 /* frame type, length = 1*/
238 SetFrameSubType(pframe, WIFI_RTS);
239
240 /* frame control flag, length = 1 */
241 *(pframe + 1) = 0;
242
243 /* frame duration, length = 2 */
244 *(pframe + 2) = 0x00;
245 *(pframe + 3) = 0x78;
246
247 /* frame recvaddr, length = 6 */
248 _rtw_memcpy((pframe + 4), broadcast_addr, ETH_ALEN);
249 _rtw_memcpy((pframe + 4 + ETH_ALEN), adapter_mac_addr(padapter), ETH_ALEN);
250 _rtw_memcpy((pframe + 4 + ETH_ALEN * 2), adapter_mac_addr(padapter), ETH_ALEN);
251 *pLength = 22;
252 }
253
rtw_hal_dl_mcc_fw_rsvd_page(_adapter * adapter,u8 * pframe,u16 * index,u8 tx_desc,u32 page_size,u8 * page_num,u32 * total_pkt_len,RSVDPAGE_LOC * rsvd_page_loc)254 u8 rtw_hal_dl_mcc_fw_rsvd_page(_adapter *adapter, u8 *pframe, u16 *index,
255 u8 tx_desc, u32 page_size, u8 *page_num, u32 *total_pkt_len,
256 RSVDPAGE_LOC *rsvd_page_loc)
257 {
258 u32 len = 0;
259 _adapter *iface = NULL;
260 struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
261 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
262 struct mlme_ext_info *pmlmeinfo = NULL;
263 struct mlme_ext_priv *pmlmeext = NULL;
264 u8 ret = _SUCCESS, i = 0, order = 0, CurtPktPageNum = 0;
265 u8 bssid[ETH_ALEN] = {0};
266
267 /* check proccess mcc start setting */
268 if (!rtw_hal_check_mcc_status(adapter, MCC_STATUS_PROCESS_MCC_START_SETTING)) {
269 ret = _FAIL;
270 goto exit;
271 }
272
273 for (i = 0; i < dvobj->iface_nums; i++) {
274 iface = dvobj->padapters[i];
275 if (iface == NULL)
276 continue;
277
278 order = iface->mcc_adapterpriv.order;
279 dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order] = *page_num;
280
281 switch (iface->mcc_adapterpriv.role) {
282 case MCC_ROLE_STA:
283 case MCC_ROLE_GC:
284 /* Build NULL DATA */
285 RTW_INFO("LocNull(order:%d): %d\n"
286 , order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]);
287 len = 0;
288 pmlmeext = &iface->mlmeextpriv;
289 pmlmeinfo = &pmlmeext->mlmext_info;
290
291 _rtw_memcpy(bssid, get_my_bssid(&pmlmeinfo->network), ETH_ALEN);
292 rtw_hal_construct_NullFunctionData(iface
293 , &pframe[*index], &len, bssid, _FALSE, 0, 0, _FALSE);
294 rtw_hal_fill_fake_txdesc(iface, &pframe[*index - tx_desc],
295 len, _FALSE, _FALSE, _FALSE);
296
297 CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size);
298 *page_num += CurtPktPageNum;
299 *index += (CurtPktPageNum * page_size);
300 *total_pkt_len = *index + len;
301 break;
302 case MCC_ROLE_AP:
303 /* Bulid CTS */
304 RTW_INFO("LocCTS(order:%d): %d\n"
305 , order, dvobj->mcc_objpriv.mcc_loc_rsvd_paga[order]);
306
307 len = 0;
308 rtw_hal_construct_CTS(iface, &pframe[*index], &len);
309 rtw_hal_fill_fake_txdesc(iface, &pframe[*index - tx_desc],
310 len, _FALSE, _FALSE, _FALSE);
311
312 CurtPktPageNum = (u8)PageNum(tx_desc + len, page_size);
313 *page_num += CurtPktPageNum;
314 *index += (CurtPktPageNum * page_size);
315 *total_pkt_len = *index + len;
316 break;
317 case MCC_ROLE_GO:
318 /* To DO */
319 break;
320 }
321 }
322 exit:
323 return ret;
324 }
325
326 /*
327 * 1. Download MCC rsvd page
328 * 2. Re-Download beacon after download rsvd page
329 */
rtw_hal_set_fw_mcc_rsvd_page(PADAPTER padapter)330 static void rtw_hal_set_fw_mcc_rsvd_page(PADAPTER padapter)
331 {
332 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
333 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
334 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
335 PADAPTER port0_iface = dvobj_get_port0_adapter(dvobj);
336 PADAPTER iface = NULL;
337 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
338 u8 mstatus = RT_MEDIA_CONNECT, i = 0;
339
340 RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
341
342 rtw_hal_set_hwreg(port0_iface, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus));
343
344 /* Re-Download beacon */
345 for (i = 0; i < dvobj->iface_nums; i++) {
346 iface = pmccobjpriv->iface[i];
347 pmccadapriv = &iface->mcc_adapterpriv;
348 if (pmccadapriv->role == MCC_ROLE_AP
349 || pmccadapriv->role == MCC_ROLE_GO)
350 tx_beacon_hdl(iface, NULL);
351 }
352 }
353
rtw_hal_set_mcc_rsvdpage_cmd(_adapter * padapter)354 static void rtw_hal_set_mcc_rsvdpage_cmd(_adapter *padapter)
355 {
356 u8 cmd[H2C_MCC_LOCATION_LEN] = {0}, i = 0, order = 0;
357 _adapter *iface = NULL;
358 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
359 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
360
361
362 for (i = 0; i < dvobj->iface_nums; i++) {
363 iface = dvobj->padapters[i];
364 if (iface == NULL)
365 continue;
366
367 order = iface->mcc_adapterpriv.order;
368 if (order >= H2C_MCC_LOCATION_LEN) {
369 RTW_INFO(FUNC_ADPT_FMT" only support 3 interface at most(%d)\n"
370 , FUNC_ADPT_ARG(padapter), order);
371 continue;
372 }
373
374 SET_H2CCMD_MCC_RSVDPAGE_LOC((cmd + order), (pmccobjpriv->mcc_loc_rsvd_paga[order]));
375 }
376
377 #ifdef CONFIG_MCC_MODE_DEBUG
378 RTW_INFO("=========================\n");
379 RTW_INFO("MCC RSVD PAGE LOC:\n");
380 for (i = 0; i < H2C_MCC_LOCATION_LEN; i++)
381 pr_dbg("0x%x ", cmd[i]);
382 pr_dbg("\n");
383 RTW_INFO("=========================\n");
384 #endif /* CONFIG_MCC_MODE_DEBUG */
385
386 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_LOCATION, H2C_MCC_LOCATION_LEN, cmd);
387 }
388
rtw_hal_set_mcc_noa_cmd(PADAPTER padapter)389 static void rtw_hal_set_mcc_noa_cmd(PADAPTER padapter)
390 {
391 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
392 struct mlme_priv *pmlmepriv = &(padapter->mlmepriv);
393 u8 cmd[H2C_MCC_NOA_PARAM_LEN] = {0};
394 u8 noa_fw_eable = 1;
395 u8 noa_tsf_sync_offset = 50;
396 u8 noa_start_time = 30;
397 u8 noa_interval = pmlmepriv->cur_network.network.Configuration.BeaconPeriod;
398 u8 swchannel_early_time = MCC_SWCH_FW_EARLY_TIME;
399 u8 i = 0;
400
401 /* FW set NOA enable */
402 SET_H2CCMD_MCC_NOA_FW_EN(cmd, noa_fw_eable);
403 /* TSF Sync offset */
404 SET_H2CCMD_MCC_NOA_TSF_SYNC_OFFSET(cmd, noa_tsf_sync_offset);
405 /* NoA start time offset */
406 SET_H2CCMD_MCC_NOA_START_TIME(cmd, noa_start_time);
407 /* NoA interval */
408 SET_H2CCMD_MCC_NOA_INTERVAL(cmd, noa_interval);
409 /* Early time to inform driver by C2H before switch channel */
410 SET_H2CCMD_MCC_EARLY_TIME(cmd, swchannel_early_time);
411
412 #ifdef CONFIG_MCC_MODE_DEBUG
413 RTW_INFO("=========================\n");
414 RTW_INFO("NoA:\n");
415 for (i = 0; i < H2C_MCC_NOA_PARAM_LEN; i++)
416 pr_dbg("0x%x ", cmd[i]);
417 pr_dbg("\n");
418 RTW_INFO("=========================\n");
419 #endif /* CONFIG_MCC_MODE_DEBUG */
420
421 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_NOA_PARAM, H2C_MCC_NOA_PARAM_LEN, cmd);
422 }
423
rtw_hal_set_mcc_IQK_offload_cmd(PADAPTER padapter)424 static void rtw_hal_set_mcc_IQK_offload_cmd(PADAPTER padapter)
425 {
426 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
427 struct mcc_adapter_priv *pmccadapriv = NULL;
428 _adapter *iface = NULL;
429 u8 cmd[H2C_MCC_IQK_PARAM_LEN] = {0}, bready = 0, i = 0, order = 0;
430 u16 TX_X = 0, TX_Y = 0, RX_X = 0, RX_Y = 0;
431
432 for (i = 0; i < dvobj->iface_nums; i++) {
433 iface = dvobj->padapters[i];
434 if (iface == NULL)
435 continue;
436
437 pmccadapriv = &iface->mcc_adapterpriv;
438 order = pmccadapriv->order;
439 /* TO DO for multi-antenna(FW not support) */
440 TX_X = pmccadapriv->mcc_iqk_arr[0].TX_X & 0x7ff;/* [10:0] */
441 TX_Y = pmccadapriv->mcc_iqk_arr[0].TX_Y & 0x7ff;/* [10:0] */
442 RX_X = pmccadapriv->mcc_iqk_arr[0].RX_X & 0x3ff;/* [9:0] */
443 RX_Y = pmccadapriv->mcc_iqk_arr[0].RX_Y & 0x3ff;/* [9:0] */
444 _rtw_memset(cmd, 0, H2C_MCC_IQK_PARAM_LEN);
445
446 /* ready or not */
447 if (order == 1)
448 bready = 1;
449 else
450 bready = 0;
451
452 SET_H2CCMD_MCC_IQK_READY(cmd, bready);
453 SET_H2CCMD_MCC_IQK_ORDER(cmd, order);
454
455 /* fill RX_X[7:0] to (cmd+1)[7:0] bitlen=8 */
456 SET_H2CCMD_MCC_IQK_RX_L(cmd, (u8)(RX_X & 0xff));
457 /* fill RX_X[9:8] to (cmd+2)[1:0] bitlen=2 */
458 SET_H2CCMD_MCC_IQK_RX_M1(cmd, (u8)((RX_X >> 8) & 0x03));
459 /* fill RX_Y[5:0] to (cmd+2)[7:2] bitlen=6 */
460 SET_H2CCMD_MCC_IQK_RX_M2(cmd, (u8)(RX_Y & 0x3f));
461 /* fill RX_Y[9:6] to (cmd+3)[3:0] bitlen=4 */
462 SET_H2CCMD_MCC_IQK_RX_H(cmd, (u8)((RX_Y >> 6) & 0x0f));
463
464
465 /* fill TX_X[7:0] to (cmd+4)[7:0] bitlen=8 */
466 SET_H2CCMD_MCC_IQK_TX_L(cmd, (u8)(TX_X & 0xff));
467 /* fill TX_X[10:8] to (cmd+5)[2:0] bitlen=3 */
468 SET_H2CCMD_MCC_IQK_TX_M1(cmd, (u8)((TX_X >> 8) & 0x07));
469 /* fill TX_Y[4:0] to (cmd+5)[7:3] bitlen=5 */
470 SET_H2CCMD_MCC_IQK_TX_M2(cmd, (u8)(TX_Y & 0x1f));
471 /* fill TX_Y[10:5] to (cmd+6)[5:0] bitlen=6 */
472 SET_H2CCMD_MCC_IQK_TX_H(cmd, (u8)((TX_Y >> 5) & 0x3f));
473
474 #ifdef CONFIG_MCC_MODE_DEBUG
475 RTW_INFO("=========================\n");
476 RTW_INFO(FUNC_ADPT_FMT" IQK:\n", FUNC_ADPT_ARG(iface));
477 RTW_INFO("TX_X: 0x%02x\n", TX_X);
478 RTW_INFO("TX_Y: 0x%02x\n", TX_Y);
479 RTW_INFO("RX_X: 0x%02x\n", RX_X);
480 RTW_INFO("RX_Y: 0x%02x\n", RX_Y);
481 RTW_INFO("cmd[0]:0x%02x\n", cmd[0]);
482 RTW_INFO("cmd[1]:0x%02x\n", cmd[1]);
483 RTW_INFO("cmd[2]:0x%02x\n", cmd[2]);
484 RTW_INFO("cmd[3]:0x%02x\n", cmd[3]);
485 RTW_INFO("cmd[4]:0x%02x\n", cmd[4]);
486 RTW_INFO("cmd[5]:0x%02x\n", cmd[5]);
487 RTW_INFO("cmd[6]:0x%02x\n", cmd[6]);
488 RTW_INFO("=========================\n");
489 #endif /* CONFIG_MCC_MODE_DEBUG */
490
491 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_IQK_PARAM, H2C_MCC_IQK_PARAM_LEN, cmd);
492 }
493 }
494
495
rtw_hal_set_mcc_macid_cmd(PADAPTER padapter)496 static void rtw_hal_set_mcc_macid_cmd(PADAPTER padapter)
497 {
498 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
499 struct mcc_adapter_priv *pmccadapriv = NULL;
500 _adapter *iface = NULL;
501 u8 cmd[H2C_MCC_MACID_BITMAP_LEN] = {0}, i = 0, order = 0;
502 u16 bitmap = 0;
503
504 for (i = 0; i < dvobj->iface_nums; i++) {
505 iface = dvobj->padapters[i];
506 if (iface == NULL)
507 continue;
508
509 pmccadapriv = &iface->mcc_adapterpriv;
510 order = pmccadapriv->order;
511 bitmap = pmccadapriv->mcc_macid_bitmap;
512
513 if (order >= (H2C_MCC_MACID_BITMAP_LEN / 2)) {
514 RTW_INFO(FUNC_ADPT_FMT" only support 3 interface at most(%d)\n"
515 , FUNC_ADPT_ARG(padapter), order);
516 continue;
517 }
518 SET_H2CCMD_MCC_MACID_BITMAP_L((cmd + order * 2), (u8)(bitmap & 0xff));
519 SET_H2CCMD_MCC_MACID_BITMAP_H((cmd + order * 2), (u8)((bitmap >> 8) & 0xff));
520 }
521
522 #ifdef CONFIG_MCC_MODE_DEBUG
523 RTW_INFO("=========================\n");
524 RTW_INFO("MACID BITMAP: ");
525 for (i = 0; i < H2C_MCC_MACID_BITMAP_LEN; i++)
526 pr_dbg("0x%x ", cmd[i]);
527 pr_dbg("\n");
528 RTW_INFO("=========================\n");
529 #endif /* CONFIG_MCC_MODE_DEBUG */
530 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_MACID_BITMAP, H2C_MCC_MACID_BITMAP_LEN, cmd);
531 }
532
rtw_hal_set_mcc_parameter_cmd(PADAPTER padapter,u8 stop)533 static void rtw_hal_set_mcc_parameter_cmd(PADAPTER padapter, u8 stop)
534 {
535 u8 cmd[H2C_MCC_INFO_LEN] = {0}, i = 0;
536 u8 order = 0, totalnum = 0, chidx = 0, bw = 0, bw40sc = 0, bw80sc = 0;
537 u8 duration = 0, role = 0, incurch = 0, rfetype = 0, distxnull = 0, c2hrpt = 0, chscan = 0;
538 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
539 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
540 struct mlme_ext_priv *pmlmeext = NULL;
541 struct mlme_ext_info *pmlmeinfo = NULL;
542 HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter);
543 _adapter *iface = NULL;
544
545 RTW_INFO(FUNC_ADPT_FMT": stop=%d\n", FUNC_ADPT_ARG(padapter), stop);
546
547 for (i = 0; i < dvobj->iface_nums; i++) {
548 iface = pmccobjpriv->iface[i];
549 if (iface == NULL)
550 continue;
551
552 if (stop) {
553 if (iface != padapter)
554 continue;
555 }
556
557
558 order = iface->mcc_adapterpriv.order;
559 if (!stop)
560 totalnum = dvobj->iface_nums;
561 else
562 totalnum = 0xff; /* 0xff means stop */
563
564 pmlmeext = &iface->mlmeextpriv;
565 chidx = pmlmeext->cur_channel;
566 bw = pmlmeext->cur_bwmode;
567 bw40sc = pmlmeext->cur_ch_offset;
568
569 /* decide 80 band width offset */
570 if (bw == CHANNEL_WIDTH_80) {
571 u8 center_ch = rtw_get_center_ch(chidx, bw, bw40sc);
572
573 if (center_ch > chidx)
574 bw80sc = HAL_PRIME_CHNL_OFFSET_LOWER;
575 else if (center_ch < chidx)
576 bw80sc = HAL_PRIME_CHNL_OFFSET_UPPER;
577 else
578 bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
579 } else
580 bw80sc = HAL_PRIME_CHNL_OFFSET_DONT_CARE;
581
582 duration = iface->mcc_adapterpriv.mcc_duration;
583 role = iface->mcc_adapterpriv.role;
584
585 incurch = _FALSE;
586
587 if (IS_HARDWARE_TYPE_8812(padapter))
588 rfetype = pHalData->RFEType; /* RFETYPE (only for 8812)*/
589 else
590 rfetype = 0;
591
592 /* STA/GC TX NULL data to inform AP/GC for ps mode */
593 switch (role) {
594 case MCC_ROLE_GO:
595 case MCC_ROLE_AP:
596 distxnull = MCC_DISABLE_TX_NULL;
597 break;
598 case MCC_ROLE_GC:
599 case MCC_ROLE_STA:
600 distxnull = MCC_ENABLE_TX_NULL;
601 break;
602 }
603
604 c2hrpt = MCC_C2H_REPORT_ALL_STATUS;
605 chscan = MCC_CHIDX;
606
607 SET_H2CCMD_MCC_INFO_ORDER(cmd, order);
608 SET_H2CCMD_MCC_INFO_TOTALNUM(cmd, totalnum);
609 SET_H2CCMD_MCC_INFO_CHIDX(cmd, chidx);
610 SET_H2CCMD_MCC_INFO_BW(cmd, bw);
611 SET_H2CCMD_MCC_INFO_BW40SC(cmd, bw40sc);
612 SET_H2CCMD_MCC_INFO_BW80SC(cmd, bw80sc);
613 SET_H2CCMD_MCC_INFO_DURATION(cmd, duration);
614 SET_H2CCMD_MCC_INFO_ROLE(cmd, role);
615 SET_H2CCMD_MCC_INFO_INCURCH(cmd, incurch);
616 SET_H2CCMD_MCC_INFO_RFETYPE(cmd, rfetype);
617 SET_H2CCMD_MCC_INFO_DISTXNULL(cmd, distxnull);
618 SET_H2CCMD_MCC_INFO_C2HRPT(cmd, c2hrpt);
619 SET_H2CCMD_MCC_INFO_CHSCAN(cmd, chscan);
620
621 #ifdef CONFIG_MCC_MODE_DEBUG
622 RTW_INFO("=========================\n");
623 RTW_INFO(FUNC_ADPT_FMT" MCC INFO:\n", FUNC_ADPT_ARG(iface));
624 RTW_INFO("cmd[0]:0x%02x\n", cmd[0]);
625 RTW_INFO("cmd[1]:0x%02x\n", cmd[1]);
626 RTW_INFO("cmd[2]:0x%02x\n", cmd[2]);
627 RTW_INFO("cmd[3]:0x%02x\n", cmd[3]);
628 RTW_INFO("cmd[4]:0x%02x\n", cmd[4]);
629 RTW_INFO("cmd[5]:0x%02x\n", cmd[5]);
630 RTW_INFO("cmd[6]:0x%02x\n", cmd[6]);
631 RTW_INFO("=========================\n");
632 #endif /* CONFIG_MCC_MODE_DEBUG */
633
634 rtw_hal_fill_h2c_cmd(padapter, H2C_MCC_INFO, H2C_MCC_INFO_LEN, cmd);
635 }
636 }
637
rtw_hal_set_mcc_start_setting(PADAPTER padapter,u8 status)638 static u8 rtw_hal_set_mcc_start_setting(PADAPTER padapter, u8 status)
639 {
640 u8 ret = _SUCCESS;
641 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
642 struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
643
644 if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
645 rtw_warn_on(1);
646 RTW_INFO("PS mode is not active before start mcc, force exit ps mode\n");
647 LeaveAllPowerSaveModeDirect(padapter);
648 }
649
650 if (dvobj->iface_nums > MAX_MCC_NUM) {
651 RTW_INFO("%s: current iface num(%d) > MAX_MCC_NUM(%d)\n", __func__, dvobj->iface_nums, MAX_MCC_NUM);
652 ret = _FAIL;
653 goto exit;
654 }
655
656 if (rtw_hal_decide_mcc_role(padapter) == _FAIL) {
657 ret = _FAIL;
658 goto exit;
659 }
660
661 /* set mcc status to indicate process mcc start setting */
662 rtw_hal_set_mcc_status(padapter, MCC_STATUS_PROCESS_MCC_START_SETTING);
663
664 /* only download rsvd page for connect */
665 if (status == MCC_SETCMD_STATUS_START_CONNECT) {
666 /* download mcc rsvd page */
667 rtw_hal_set_fw_mcc_rsvd_page(padapter);
668 rtw_hal_set_mcc_rsvdpage_cmd(padapter);
669 }
670
671 /* configure NoA setting */
672 rtw_hal_set_mcc_noa_cmd(padapter);
673
674 /* IQK value offload */
675 rtw_hal_set_mcc_IQK_offload_cmd(padapter);
676
677 /* set mac id to fw */
678 rtw_hal_set_mcc_macid_cmd(padapter);
679
680 /* set mcc parameter */
681 rtw_hal_set_mcc_parameter_cmd(padapter, _FALSE);
682
683 exit:
684 return ret;
685 }
686
rtw_hal_set_mcc_stop_setting(PADAPTER padapter,u8 status)687 static void rtw_hal_set_mcc_stop_setting(PADAPTER padapter, u8 status)
688 {
689 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
690 _adapter *iface = NULL;
691 u8 i = 0;
692 /*
693 * when adapter disconnect, stop mcc mod
694 * total=0xf means stop mcc mode
695 */
696
697 switch (status) {
698 default:
699 /* let fw switch to other interface channel */
700 for (i = 0; i < dvobj->iface_nums; i++) {
701 iface = dvobj->padapters[i];
702 if (iface == NULL)
703 continue;
704 /* use other interface to set cmd */
705 if (iface != padapter) {
706 rtw_hal_set_mcc_parameter_cmd(iface, _TRUE);
707 break;
708 }
709 }
710 break;
711 }
712 }
713
rtw_hal_mcc_status_hdl(PADAPTER padapter,u8 status)714 static void rtw_hal_mcc_status_hdl(PADAPTER padapter, u8 status)
715 {
716 switch (status) {
717 case MCC_SETCMD_STATUS_STOP_DISCONNECT:
718 rtw_hal_clear_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC);
719 break;
720 case MCC_SETCMD_STATUS_STOP_SCAN_START:
721 rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC);
722 rtw_hal_clear_mcc_status(padapter, MCC_STATUS_DOING_MCC);
723 break;
724
725 case MCC_SETCMD_STATUS_START_CONNECT:
726 case MCC_SETCMD_STATUS_START_SCAN_DONE:
727 rtw_hal_set_mcc_status(padapter, MCC_STATUS_NEED_MCC | MCC_STATUS_DOING_MCC);
728 break;
729 default:
730 RTW_INFO(FUNC_ADPT_FMT" error status(%d)\n", FUNC_ADPT_ARG(padapter), status);
731 break;
732 }
733 }
734
rtw_hal_mcc_stop_posthdl(PADAPTER padapter)735 static void rtw_hal_mcc_stop_posthdl(PADAPTER padapter)
736 {
737 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
738 _adapter *iface = NULL;
739 u8 i = 0;
740
741 for (i = 0; i < dvobj->iface_nums; i++) {
742 iface = dvobj->padapters[i];
743 if (iface == NULL)
744 continue;
745 /* release network queue */
746 rtw_netif_wake_queue(iface->pnetdev);
747 iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0;
748 iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0;
749 iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0;
750 }
751 }
752
rtw_hal_mcc_start_posthdl(PADAPTER padapter)753 static void rtw_hal_mcc_start_posthdl(PADAPTER padapter)
754 {
755 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
756 _adapter *iface = NULL;
757 u8 i = 0;
758
759 for (i = 0; i < dvobj->iface_nums; i++) {
760 iface = dvobj->padapters[i];
761 if (iface == NULL)
762 continue;
763 iface->mcc_adapterpriv.mcc_tx_bytes_from_kernel = 0;
764 iface->mcc_adapterpriv.mcc_last_tx_bytes_from_kernel = 0;
765 iface->mcc_adapterpriv.mcc_tx_bytes_to_port = 0;
766 }
767 }
768
769 /*
770 * rtw_hal_set_mcc_setting - set mcc setting
771 * @padapter: currnet padapter to stop/start MCC
772 * @stop: stop mcc or not
773 * @return val: 1 for SUCCESS, 0 for fail
774 */
rtw_hal_set_mcc_setting(PADAPTER padapter,u8 status)775 static u8 rtw_hal_set_mcc_setting(PADAPTER padapter, u8 status)
776 {
777 u8 ret = _FAIL;
778 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
779 u8 stop = (status < MCC_SETCMD_STATUS_START_CONNECT) ? _TRUE : _FALSE;
780 u32 start_time = rtw_get_current_time();
781
782 RTW_INFO("===> "FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
783
784 rtw_sctx_init(&pmccobjpriv->mcc_sctx, MCC_EXPIRE_TIME);
785 pmccobjpriv->mcc_c2h_status = MCC_RPT_MAX;
786
787 if (stop == _FALSE) {
788 pmccobjpriv->duration = MCC_DURATION;
789
790 /* handle mcc start */
791 if (rtw_hal_set_mcc_start_setting(padapter, status) == _FAIL)
792 goto exit;
793
794 /* wait for C2H */
795 if (!rtw_sctx_wait(&pmccobjpriv->mcc_sctx, __func__))
796 RTW_INFO(FUNC_ADPT_FMT": wait for mcc start C2H time out\n", FUNC_ADPT_ARG(padapter));
797 else
798 ret = _SUCCESS;
799
800 if (ret == _SUCCESS) {
801 RTW_INFO(FUNC_ADPT_FMT": mcc start sucecssfully\n", FUNC_ADPT_ARG(padapter));
802 rtw_hal_mcc_start_posthdl(padapter);
803 }
804 } else {
805
806 /* set mcc status to indicate process mcc start setting */
807 rtw_hal_set_mcc_status(padapter, MCC_STATUS_PROCESS_MCC_STOP_SETTING);
808
809 /* handle mcc stop */
810 rtw_hal_set_mcc_stop_setting(padapter, status);
811
812 /* wait for C2H */
813 if (!rtw_sctx_wait(&pmccobjpriv->mcc_sctx, __func__))
814 RTW_INFO(FUNC_ADPT_FMT": wait for mcc stop C2H time out\n", FUNC_ADPT_ARG(padapter));
815 else {
816 ret = _SUCCESS;
817 rtw_hal_mcc_stop_posthdl(padapter);
818 }
819 }
820
821 exit:
822
823 rtw_hal_mcc_status_hdl(padapter, status);
824 /* clear mcc status */
825 rtw_hal_clear_mcc_status(padapter
826 , MCC_STATUS_PROCESS_MCC_START_SETTING | MCC_STATUS_PROCESS_MCC_STOP_SETTING);
827
828 RTW_INFO(FUNC_ADPT_FMT" in %dms <===\n"
829 , FUNC_ADPT_ARG(padapter), rtw_get_passing_time_ms(start_time));
830 return ret;
831 }
832
833 /**
834 * rtw_hal_mcc_check_case_not_limit_traffic - handler flow ctrl for special case
835 * @cur_iface: fw stay channel setting of this iface
836 * @next_iface: fw will swich channel setting of this iface
837 */
rtw_hal_mcc_check_case_not_limit_traffic(PADAPTER cur_iface,PADAPTER next_iface)838 static void rtw_hal_mcc_check_case_not_limit_traffic(PADAPTER cur_iface, PADAPTER next_iface)
839 {
840 u8 cur_bw = cur_iface->mlmeextpriv.cur_bwmode;
841 u8 next_bw = next_iface->mlmeextpriv.cur_bwmode;
842
843 /* for both interface are VHT80, doesn't limit_traffic according to iperf results */
844 if (cur_bw == CHANNEL_WIDTH_80 && next_bw == CHANNEL_WIDTH_80) {
845 cur_iface->mcc_adapterpriv.mcc_tp_limit = _FALSE;
846 next_iface->mcc_adapterpriv.mcc_tp_limit = _FALSE;
847 }
848 }
849
850
851 /**
852 * rtw_hal_mcc_sw_ch_fw_notify_hdl - handler flow ctrl
853 */
rtw_hal_mcc_sw_ch_fw_notify_hdl(PADAPTER padapter)854 static void rtw_hal_mcc_sw_ch_fw_notify_hdl(PADAPTER padapter)
855 {
856 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
857 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
858 struct mcc_adapter_priv *cur_mccadapriv = NULL, *next_mccadapriv = NULL;
859 _adapter *iface = NULL, *cur_iface = NULL, *next_iface = NULL;
860 struct registry_priv *preg = &padapter->registrypriv;
861 u8 cur_op_ch = pdvobjpriv->oper_channel;
862 u8 i = 0, iface_num = pdvobjpriv->iface_nums, cur_order = 0, next_order = 0;
863 static u8 cnt = 1;
864 u32 single_tx_cri = preg->rtw_mcc_single_tx_cri;
865
866 for (i = 0; i < iface_num; i++) {
867 iface = pdvobjpriv->padapters[i];
868 if (cur_op_ch == iface->mlmeextpriv.cur_channel) {
869 cur_iface = iface;
870 cur_mccadapriv = &cur_iface->mcc_adapterpriv;
871 cur_order = cur_mccadapriv->order;
872 next_order = (cur_order + 1) % iface_num;
873 next_iface = pmccobjpriv->iface[next_order];
874 next_mccadapriv = &next_iface->mcc_adapterpriv;
875 break;
876 }
877 }
878
879 /* check other interface tx busy traffic or not under every 2 switch channel notify(Mbits/100ms) */
880 if (cnt == 2) {
881 cur_mccadapriv->mcc_tp = (cur_mccadapriv->mcc_tx_bytes_from_kernel
882 - cur_mccadapriv->mcc_last_tx_bytes_from_kernel) * 10 * 8 / 1024 / 1024;
883 cur_mccadapriv->mcc_last_tx_bytes_from_kernel = cur_mccadapriv->mcc_tx_bytes_from_kernel;
884
885 next_mccadapriv->mcc_tp = (next_mccadapriv->mcc_tx_bytes_from_kernel
886 - next_mccadapriv->mcc_last_tx_bytes_from_kernel) * 10 * 8 / 1024 / 1024;
887 next_mccadapriv->mcc_last_tx_bytes_from_kernel = next_mccadapriv->mcc_tx_bytes_from_kernel;
888
889 cnt = 1;
890 } else
891 cnt = 2;
892
893 /* check single TX or cuncurrnet TX */
894 if (next_mccadapriv->mcc_tp < single_tx_cri) {
895 /* single TX, does not stop */
896 cur_mccadapriv->mcc_tx_stop = _FALSE;
897 cur_mccadapriv->mcc_tp_limit = _FALSE;
898 } else {
899 /* concurrent TX, stop */
900 cur_mccadapriv->mcc_tx_stop = _TRUE;
901 cur_mccadapriv->mcc_tp_limit = _TRUE;
902 }
903
904 if (cur_mccadapriv->mcc_tp < single_tx_cri) {
905 next_mccadapriv->mcc_tx_stop = _FALSE;
906 next_mccadapriv->mcc_tp_limit = _FALSE;
907 } else {
908 next_mccadapriv->mcc_tx_stop = _FALSE;
909 next_mccadapriv->mcc_tp_limit = _TRUE;
910 next_mccadapriv->mcc_tx_bytes_to_port = 0;
911 }
912
913 /* stop current iface kernel queue or not */
914 if (cur_mccadapriv->mcc_tx_stop)
915 rtw_netif_stop_queue(cur_iface->pnetdev);
916 else
917 rtw_netif_wake_queue(cur_iface->pnetdev);
918
919 /* stop next iface kernel queue or not */
920 if (next_mccadapriv->mcc_tx_stop)
921 rtw_netif_stop_queue(next_iface->pnetdev);
922 else
923 rtw_netif_wake_queue(next_iface->pnetdev);
924
925 /* start xmit tasklet */
926 rtw_os_xmit_schedule(next_iface);
927
928 rtw_hal_mcc_check_case_not_limit_traffic(cur_iface, next_iface);
929
930 if (0) {
931 RTW_INFO("order:%d, mcc_tx_stop:%d, mcc_tp:%d\n",
932 cur_mccadapriv->order, cur_mccadapriv->mcc_tx_stop, cur_mccadapriv->mcc_tp);
933 dump_os_queue(0, cur_iface);
934 RTW_INFO("order:%d, mcc_tx_stop:%d, mcc_tp:%d\n",
935 next_mccadapriv->order, next_mccadapriv->mcc_tx_stop, next_mccadapriv->mcc_tp);
936 dump_os_queue(0, next_iface);
937 }
938 }
939
940 /**
941 * rtw_hal_mcc_c2h_handler - mcc c2h handler
942 */
rtw_hal_mcc_c2h_handler(PADAPTER padapter,u8 buflen,u8 * tmpBuf)943 void rtw_hal_mcc_c2h_handler(PADAPTER padapter, u8 buflen, u8 *tmpBuf)
944 {
945 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
946 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
947 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
948 struct submit_ctx *mcc_sctx = &pmccobjpriv->mcc_sctx;
949 _irqL irqL;
950
951 /* RTW_INFO("[length]=%d, [C2H data]="MAC_FMT"\n", buflen, MAC_ARG(tmpBuf)); */
952 /* To avoid reg is set, but driver recive c2h to set wrong oper_channel */
953 if (MCC_RPT_STOPMCC == pmccobjpriv->mcc_c2h_status) {
954 RTW_INFO(FUNC_ADPT_FMT" MCC alread stops return\n", FUNC_ADPT_ARG(padapter));
955 return;
956 }
957
958 pmccobjpriv->mcc_c2h_status = tmpBuf[0];
959 switch (pmccobjpriv->mcc_c2h_status) {
960 case MCC_RPT_SUCCESS:
961 pdvobjpriv->oper_channel = tmpBuf[1];
962 _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
963 pmccobjpriv->cur_mcc_success_cnt++;
964 _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
965 break;
966 case MCC_RPT_TXNULL_FAIL:
967 RTW_INFO("[MCC] TXNULL FAIL\n");
968 break;
969 case MCC_RPT_STOPMCC:
970 RTW_INFO("[MCC] MCC stop (time:%d)\n", rtw_get_current_time());
971 pmccobjpriv->mcc_c2h_status = MCC_RPT_STOPMCC;
972 rtw_sctx_done(&mcc_sctx);
973 break;
974 case MCC_RPT_READY:
975 _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
976 /* initialize counter & time */
977 pmccobjpriv->mcc_launch_time = rtw_get_current_time();
978 pmccobjpriv->mcc_c2h_status = MCC_RPT_READY;
979 pmccobjpriv->cur_mcc_success_cnt = 0;
980 pmccobjpriv->prev_mcc_success_cnt = 0;
981 pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME;
982 _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
983
984 RTW_INFO("[MCC] MCC ready (time:%d)\n", pmccobjpriv->mcc_launch_time);
985 rtw_sctx_done(&mcc_sctx);
986 break;
987 case MCC_RPT_SWICH_CHANNEL_NOTIFY:
988 pdvobjpriv->oper_channel = tmpBuf[1];
989 rtw_hal_mcc_sw_ch_fw_notify_hdl(padapter);
990 break;
991 default:
992 /* RTW_INFO("[MCC] Other MCC status(%d)\n", pmccobjpriv->mcc_c2h_status); */
993 break;
994 }
995 }
996
997
998 /**
999 * rtw_hal_mcc_sw_status_check - check mcc swich channel status
1000 * @padapter: primary adapter
1001 */
rtw_hal_mcc_sw_status_check(PADAPTER padapter)1002 void rtw_hal_mcc_sw_status_check(PADAPTER padapter)
1003 {
1004 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1005 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
1006 struct pwrctrl_priv *pwrpriv = dvobj_to_pwrctl(dvobj);
1007 u8 cur_cnt = 0, prev_cnt = 0, diff_cnt = 0, check_ret = _FAIL;
1008 _irqL irqL;
1009
1010 /* #define MCC_RESTART 1 */
1011
1012 if (!MCC_EN(padapter))
1013 return;
1014
1015 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1016
1017 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1018
1019 if (pwrpriv->pwr_mode != PS_MODE_ACTIVE) {
1020 rtw_warn_on(1);
1021 RTW_INFO("PS mode is not active under mcc, force exit ps mode\n");
1022 LeaveAllPowerSaveModeDirect(padapter);
1023 }
1024
1025 if (rtw_get_passing_time_ms(pmccobjpriv->mcc_launch_time) > 2000) {
1026 _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1027
1028 cur_cnt = pmccobjpriv->cur_mcc_success_cnt;
1029 prev_cnt = pmccobjpriv->prev_mcc_success_cnt;
1030 if (cur_cnt < prev_cnt)
1031 diff_cnt = (cur_cnt + 255) - prev_cnt;
1032 else
1033 diff_cnt = cur_cnt - prev_cnt;
1034
1035 if (diff_cnt < 30) {
1036 pmccobjpriv->mcc_tolerance_time--;
1037 RTW_INFO("%s: diff_cnt:%d, tolerance_time:%d\n",
1038 __func__, diff_cnt, pmccobjpriv->mcc_tolerance_time);
1039 } else
1040 pmccobjpriv->mcc_tolerance_time = MCC_TOLERANCE_TIME;
1041
1042 pmccobjpriv->prev_mcc_success_cnt = pmccobjpriv->cur_mcc_success_cnt;
1043
1044 if (pmccobjpriv->mcc_tolerance_time != 0)
1045 check_ret = _SUCCESS;
1046
1047 _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1048
1049 if (check_ret != _SUCCESS) {
1050 RTW_INFO("============ MCC swich channel check fail (%d)=============\n", diff_cnt);
1051 /* restart MCC */
1052 #ifdef MCC_RESTART
1053 rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_DISCONNECT);
1054 rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT);
1055 #endif /* MCC_RESTART */
1056 }
1057 } else {
1058 _enter_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1059 pmccobjpriv->prev_mcc_success_cnt = pmccobjpriv->cur_mcc_success_cnt;
1060 _exit_critical_bh(&pmccobjpriv->mcc_lock, &irqL);
1061 }
1062
1063 }
1064 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1065 }
1066
1067 /**
1068 * rtw_hal_mcc_change_scan_flag - change scan flag under mcc
1069 *
1070 * MCC mode under sitesurvey goto AP channel to tx bcn & data
1071 * MCC mode under sitesurvey doesn't support TX data for station mode (FW not support)
1072 *
1073 * @padapter: the adapter to be change scan flag
1074 * @ch: pointer to rerurn ch
1075 * @bw: pointer to rerurn bw
1076 * @offset: pointer to rerurn offset
1077 */
rtw_hal_mcc_change_scan_flag(PADAPTER padapter,u8 * ch,u8 * bw,u8 * offset)1078 u8 rtw_hal_mcc_change_scan_flag(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset)
1079 {
1080 u8 need_ch_setting_union = _TRUE, i = 0, flags = 0, role = 0;
1081 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1082 struct mcc_adapter_priv *pmccadapriv = NULL;
1083 struct mlme_ext_priv *pmlmeext = NULL;
1084
1085 if (!MCC_EN(padapter))
1086 goto exit;
1087
1088 if (!rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC))
1089 goto exit;
1090
1091 for (i = 0; i < dvobj->iface_nums; i++) {
1092 if (!dvobj->padapters[i])
1093 continue;
1094
1095 pmlmeext = &dvobj->padapters[i]->mlmeextpriv;
1096 pmccadapriv = &dvobj->padapters[i]->mcc_adapterpriv;
1097 role = pmccadapriv->role;
1098
1099 switch (role) {
1100 case MCC_ROLE_AP:
1101 case MCC_ROLE_GO:
1102 *ch = pmlmeext->cur_channel;
1103 *bw = pmlmeext->cur_bwmode;
1104 *offset = pmlmeext->cur_ch_offset;
1105 need_ch_setting_union = _FALSE;
1106 break;
1107 case MCC_ROLE_STA:
1108 case MCC_ROLE_GC:
1109 break;
1110 default:
1111 RTW_INFO("unknown role\n");
1112 rtw_warn_on(1);
1113 break;
1114 }
1115
1116 /* check other scan flag */
1117 flags = mlmeext_scan_backop_flags(pmlmeext);
1118 if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_PS_ANNC))
1119 flags &= ~SS_BACKOP_PS_ANNC;
1120
1121 if (mlmeext_chk_scan_backop_flags(pmlmeext, SS_BACKOP_TX_RESUME))
1122 flags &= ~SS_BACKOP_TX_RESUME;
1123
1124 mlmeext_assign_scan_backop_flags(pmlmeext, flags);
1125
1126 }
1127 exit:
1128 return need_ch_setting_union;
1129 }
1130
1131 /**
1132 * rtw_hal_mcc_calc_tx_bytes_from_kernel - calculte tx bytes from kernel to check concurrent tx or not
1133 * @padapter: the adapter to be record tx bytes
1134 * @len: data len
1135 */
rtw_hal_mcc_calc_tx_bytes_from_kernel(PADAPTER padapter,u32 len)1136 inline void rtw_hal_mcc_calc_tx_bytes_from_kernel(PADAPTER padapter, u32 len)
1137 {
1138 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
1139
1140 if (MCC_EN(padapter)) {
1141 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1142 pmccadapriv->mcc_tx_bytes_from_kernel += len;
1143 if (0)
1144 RTW_INFO("%s(order:%d): mcc tx bytes from kernel:%lld\n"
1145 , __func__, pmccadapriv->order, pmccadapriv->mcc_tx_bytes_from_kernel);
1146 }
1147 }
1148 }
1149
1150 /**
1151 * rtw_hal_mcc_calc_tx_bytes_to_port - calculte tx bytes to write port in order to flow crtl
1152 * @padapter: the adapter to be record tx bytes
1153 * @len: data len
1154 */
rtw_hal_mcc_calc_tx_bytes_to_port(PADAPTER padapter,u32 len)1155 inline void rtw_hal_mcc_calc_tx_bytes_to_port(PADAPTER padapter, u32 len)
1156 {
1157 if (MCC_EN(padapter)) {
1158 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1159 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
1160
1161 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
1162 pmccadapriv->mcc_tx_bytes_to_port += len;
1163 if (0)
1164 RTW_INFO("%s(order:%d): mcc tx bytes to port:%d, mcc target tx bytes to port:%d\n"
1165 , __func__, pmccadapriv->order, pmccadapriv->mcc_tx_bytes_to_port
1166 , pmccadapriv->mcc_target_tx_bytes_to_port);
1167 }
1168 }
1169
1170 /**
1171 * rtw_hal_mcc_stop_tx_bytes_to_port - stop write port to hw or not
1172 * @padapter: the adapter to be stopped
1173 */
rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter)1174 inline u8 rtw_hal_mcc_stop_tx_bytes_to_port(PADAPTER padapter)
1175 {
1176 if (MCC_EN(padapter)) {
1177 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1178 struct mcc_adapter_priv *pmccadapriv = &padapter->mcc_adapterpriv;
1179
1180 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1181 if (pmccadapriv->mcc_tp_limit) {
1182 if (pmccadapriv->mcc_tx_bytes_to_port >= pmccadapriv->mcc_target_tx_bytes_to_port) {
1183 pmccadapriv->mcc_tx_stop = _TRUE;
1184 rtw_netif_stop_queue(padapter->pnetdev);
1185 return _TRUE;
1186 }
1187 }
1188 }
1189 }
1190
1191 return _FALSE;
1192 }
1193
1194 /**
1195 * rtw_hal_set_mcc_setting_scan_start - setting mcc under scan start
1196 * @padapter: the adapter to be setted
1197 * @ch_setting_changed: softap channel setting to be changed or not
1198 */
rtw_hal_set_mcc_setting_scan_start(PADAPTER padapter)1199 u8 rtw_hal_set_mcc_setting_scan_start(PADAPTER padapter)
1200 {
1201 u8 ret = _FAIL;
1202
1203 if (MCC_EN(padapter)) {
1204 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1205
1206 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1207 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) {
1208 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1209 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_SCAN_START);
1210 /* issue null data to all station connected to AP before scan */
1211 rtw_hal_mcc_issue_null_data(padapter, 0, 1);
1212 }
1213 }
1214 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1215 }
1216
1217 return ret;
1218 }
1219
1220 /**
1221 * rtw_hal_set_mcc_setting_scan_complete - setting mcc after scan commplete
1222 * @padapter: the adapter to be setted
1223 * @ch_setting_changed: softap channel setting to be changed or not
1224 */
rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter)1225 u8 rtw_hal_set_mcc_setting_scan_complete(PADAPTER padapter)
1226 {
1227 u8 ret = _FAIL;
1228
1229 if (MCC_EN(padapter)) {
1230 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1231
1232 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1233
1234 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC))
1235 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_SCAN_DONE);
1236
1237 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1238 }
1239
1240 return ret;
1241 }
1242
1243
1244 /**
1245 * rtw_hal_set_mcc_setting_start_bss_network - setting mcc under softap start
1246 * @padapter: the adapter to be setted
1247 * @chbw_grouped: channel bw offset can not be allowed or not
1248 */
rtw_hal_set_mcc_setting_start_bss_network(PADAPTER padapter,u8 chbw_allow)1249 u8 rtw_hal_set_mcc_setting_start_bss_network(PADAPTER padapter, u8 chbw_allow)
1250 {
1251 u8 ret = _FAIL;
1252
1253 if (MCC_EN(padapter)) {
1254 /* channel bw offset can not be allowed, start MCC */
1255 if (chbw_allow == _FALSE) {
1256 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1257
1258 rtw_hal_mcc_backup_IQK_val(padapter);
1259 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1260 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT);
1261 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1262 }
1263 }
1264
1265 return ret;
1266 }
1267
1268 /**
1269 * rtw_hal_set_mcc_setting_disconnect - setting mcc under mlme disconnect(stop softap/disconnect from AP)
1270 * @padapter: the adapter to be setted
1271 */
rtw_hal_set_mcc_setting_disconnect(PADAPTER padapter)1272 u8 rtw_hal_set_mcc_setting_disconnect(PADAPTER padapter)
1273 {
1274 u8 ret = _FAIL;
1275
1276 if (MCC_EN(padapter)) {
1277 struct mcc_obj_priv *pmccobjpriv = &(adapter_to_dvobj(padapter)->mcc_objpriv);
1278
1279 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1280 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) {
1281 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC))
1282 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_STOP_DISCONNECT);
1283 }
1284 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1285 }
1286
1287 return ret;
1288 }
1289
1290 /**
1291 * rtw_hal_set_mcc_setting_join_done_chk_ch - setting mcc under join done
1292 * @padapter: the adapter to be checked
1293 */
rtw_hal_set_mcc_setting_join_done_chk_ch(PADAPTER padapter)1294 u8 rtw_hal_set_mcc_setting_join_done_chk_ch(PADAPTER padapter)
1295 {
1296 u8 ret = _FAIL;
1297
1298 if (MCC_EN(padapter)) {
1299 u8 sta_num = 0, ld_sta_num = 0, lg_sta_num = 0, ap_num = 0, ld_ap_num = 0;
1300
1301 rtw_mi_status_no_self(padapter, &sta_num, &ld_sta_num, &lg_sta_num, &ap_num, &ld_ap_num, NULL);
1302
1303 if (ld_sta_num || lg_sta_num || ap_num) {
1304 bool chbw_allow = _TRUE;
1305 u8 u_ch, u_offset, u_bw;
1306 struct mlme_ext_priv *cur_mlmeext = &padapter->mlmeextpriv;
1307 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1308
1309 if (rtw_mi_get_ch_setting_union_no_self(padapter, &u_ch, &u_bw, &u_offset) <= 0) {
1310 dump_adapters_status(RTW_DBGDUMP , dvobj);
1311 rtw_warn_on(1);
1312 }
1313 RTW_INFO(FUNC_ADPT_FMT" union no self: %u,%u,%u\n"
1314 , FUNC_ADPT_ARG(padapter), u_ch, u_bw, u_offset);
1315
1316 /* chbw_allow? */
1317 chbw_allow = rtw_is_chbw_grouped(cur_mlmeext->cur_channel
1318 , cur_mlmeext->cur_bwmode, cur_mlmeext->cur_ch_offset
1319 , u_ch, u_bw, u_offset);
1320
1321 RTW_INFO(FUNC_ADPT_FMT" chbw_allow:%d\n"
1322 , FUNC_ADPT_ARG(padapter), chbw_allow);
1323
1324 /* if chbw_allow = false, start MCC setting */
1325 if (chbw_allow == _FALSE) {
1326 struct mcc_obj_priv *pmccobjpriv = &dvobj->mcc_objpriv;
1327
1328 rtw_hal_mcc_backup_IQK_val(padapter);
1329 _enter_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1330 ret = rtw_hal_set_mcc_setting(padapter, MCC_SETCMD_STATUS_START_CONNECT);
1331 _exit_critical_mutex(&pmccobjpriv->mcc_mutex, NULL);
1332 }
1333 }
1334 }
1335
1336 return ret;
1337 }
1338
1339 /**
1340 * rtw_hal_set_mcc_setting_chk_start_clnt_join - check change channel under start clnt join
1341 * @padapter: the adapter to be checked
1342 * @ch: pointer to rerurn ch
1343 * @bw: pointer to rerurn bw
1344 * @offset: pointer to rerurn offset
1345 * @chbw_allow: allow to use adapter's channel setting
1346 */
rtw_hal_set_mcc_setting_chk_start_clnt_join(PADAPTER padapter,u8 * ch,u8 * bw,u8 * offset,u8 chbw_allow)1347 u8 rtw_hal_set_mcc_setting_chk_start_clnt_join(PADAPTER padapter, u8 *ch, u8 *bw, u8 *offset, u8 chbw_allow)
1348 {
1349 u8 ret = _FAIL;
1350
1351 /* if chbw_allow = false under en_mcc = TRUE, we do not change channel related setting */
1352 if (MCC_EN(padapter)) {
1353 /* restore union channel related setting to current channel related setting */
1354 if (chbw_allow == _FALSE) {
1355 struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
1356
1357 *ch = pmlmeext->cur_channel;
1358 *bw = pmlmeext->cur_bwmode;
1359 *offset = pmlmeext->cur_ch_offset;
1360
1361 RTW_INFO(FUNC_ADPT_FMT" en_mcc:%d(%d,%d,%d,)\n"
1362 , FUNC_ADPT_ARG(padapter), padapter->registrypriv.en_mcc
1363 , *ch, *bw, *offset);
1364 ret = _SUCCESS;
1365 }
1366 }
1367
1368 return ret;
1369 }
1370
rtw_hal_dump_mcc_info(void * sel,struct dvobj_priv * dvobj)1371 void rtw_hal_dump_mcc_info(void *sel, struct dvobj_priv *dvobj)
1372 {
1373 struct mcc_obj_priv *pmccobjpriv = &(dvobj->mcc_objpriv);
1374 struct mcc_adapter_priv *pmccadapriv = NULL;
1375 _adapter *iface = NULL, *adapter = NULL;
1376 struct registry_priv *regpriv = NULL;
1377 u8 i = 0;
1378
1379 /* regpriv is common for all adapter */
1380 adapter = dvobj->padapters[IFACE_ID0];
1381
1382 RTW_PRINT_SEL(sel, "**********************************************\n");
1383 for (i = 0; i < dvobj->iface_nums; i++) {
1384 iface = dvobj->padapters[i];
1385 if (!iface)
1386 continue;
1387
1388 regpriv = &iface->registrypriv;
1389 pmccadapriv = &iface->mcc_adapterpriv;
1390 if (pmccadapriv) {
1391 RTW_PRINT_SEL(sel, "adapter mcc info:\n");
1392 RTW_PRINT_SEL(sel, "ifname:%s\n", ADPT_ARG(iface));
1393 RTW_PRINT_SEL(sel, "order:%d\n", pmccadapriv->order);
1394 RTW_PRINT_SEL(sel, "duration:%d\n", pmccadapriv->mcc_duration);
1395 RTW_PRINT_SEL(sel, "target tx bytes:%d\n", pmccadapriv->mcc_target_tx_bytes_to_port);
1396 RTW_PRINT_SEL(sel, "current TP:%d\n", pmccadapriv->mcc_tp);
1397 RTW_PRINT_SEL(sel, "mgmt queue macid:%d\n", pmccadapriv->mgmt_queue_macid);
1398 RTW_PRINT_SEL(sel, "macid bitmap:0x%02x\n\n", pmccadapriv->mcc_macid_bitmap);
1399 RTW_PRINT_SEL(sel, "registry data:\n");
1400 RTW_PRINT_SEL(sel, "en_mcc:%d\n", regpriv->en_mcc);
1401 RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_ap_bw20_target_tx_tp);
1402 RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", regpriv->rtw_mcc_ap_bw40_target_tx_tp);
1403 RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_ap_bw80_target_tx_tp);
1404 RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", regpriv->rtw_mcc_sta_bw20_target_tx_tp);
1405 RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M ):%d Mbps\n", regpriv->rtw_mcc_sta_bw40_target_tx_tp);
1406 RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", regpriv->rtw_mcc_sta_bw80_target_tx_tp);
1407 RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", regpriv->rtw_mcc_single_tx_cri);
1408 RTW_PRINT_SEL(sel, "**********************************************\n");
1409 }
1410 }
1411 RTW_PRINT_SEL(sel, "------------------------------------------\n");
1412 RTW_PRINT_SEL(sel, "define data:\n");
1413 RTW_PRINT_SEL(sel, "ap target tx TP(BW:20M):%d Mbps\n", MCC_AP_BW20_TARGET_TX_TP);
1414 RTW_PRINT_SEL(sel, "ap target tx TP(BW:40M):%d Mbps\n", MCC_AP_BW40_TARGET_TX_TP);
1415 RTW_PRINT_SEL(sel, "ap target tx TP(BW:80M):%d Mbps\n", MCC_AP_BW80_TARGET_TX_TP);
1416 RTW_PRINT_SEL(sel, "sta target tx TP(BW:20M):%d Mbps\n", MCC_STA_BW20_TARGET_TX_TP);
1417 RTW_PRINT_SEL(sel, "sta target tx TP(BW:40M):%d Mbps\n", MCC_STA_BW40_TARGET_TX_TP);
1418 RTW_PRINT_SEL(sel, "sta target tx TP(BW:80M):%d Mbps\n", MCC_STA_BW80_TARGET_TX_TP);
1419 RTW_PRINT_SEL(sel, "single tx criteria:%d Mbps\n", MCC_SINGLE_TX_CRITERIA);
1420 RTW_PRINT_SEL(sel, "------------------------------------------\n");
1421 }
1422
update_mcc_mgntframe_attrib(_adapter * padapter,struct pkt_attrib * pattrib)1423 inline void update_mcc_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib)
1424 {
1425 if (MCC_EN(padapter)) {
1426 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_DOING_MCC)) {
1427 /* use QSLT_MGNT to check mgnt queue or bcn queue */
1428 if (pattrib->qsel == QSLT_MGNT) {
1429 pattrib->mac_id = padapter->mcc_adapterpriv.mgmt_queue_macid;
1430 pattrib->qsel = QSLT_VO;
1431 }
1432 }
1433 }
1434 }
1435
rtw_hal_mcc_link_status_chk(_adapter * padapter,const char * msg)1436 inline u8 rtw_hal_mcc_link_status_chk(_adapter *padapter, const char *msg)
1437 {
1438 u8 ret = _TRUE, i = 0;
1439 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1440 _adapter *iface;
1441 struct mlme_ext_priv *mlmeext;
1442
1443 if (MCC_EN(padapter)) {
1444 if (rtw_hal_check_mcc_status(padapter, MCC_STATUS_NEED_MCC)) {
1445 for (i = 0; i < dvobj->iface_nums; i++) {
1446 iface = dvobj->padapters[i];
1447 mlmeext = &iface->mlmeextpriv;
1448 if (mlmeext_scan_state(mlmeext) != SCAN_DISABLE) {
1449 #ifdef DBG_EXPIRATION_CHK
1450 RTW_INFO(FUNC_ADPT_FMT" don't enter %s under scan for MCC mode\n", FUNC_ADPT_ARG(padapter), msg);
1451 #endif
1452 ret = _FALSE;
1453 goto exit;
1454 }
1455 }
1456 }
1457 }
1458
1459 exit:
1460 return ret;
1461 }
1462
rtw_hal_mcc_issue_null_data(_adapter * padapter,u8 chbw_allow,u8 ps_mode)1463 void rtw_hal_mcc_issue_null_data(_adapter *padapter, u8 chbw_allow, u8 ps_mode)
1464 {
1465 struct dvobj_priv *dvobj = adapter_to_dvobj(padapter);
1466 _adapter *iface = NULL;
1467 u32 start = rtw_get_current_time();
1468 u8 i = 0;
1469
1470 if (MCC_EN(padapter)) {
1471 if (chbw_allow == _FALSE) {
1472 for (i = 0; i < dvobj->iface_nums; i++) {
1473 iface = dvobj->padapters[i];
1474 /* issue null data to inform ap station will leave */
1475 if (is_client_associated_to_ap(iface)) {
1476 struct mlme_ext_priv *mlmeext = &iface->mlmeextpriv;
1477 u8 ch = mlmeext->cur_channel;
1478 u8 bw = mlmeext->cur_bwmode;
1479 u8 offset = mlmeext->cur_ch_offset;
1480
1481 set_channel_bwmode(iface, ch, bw, offset);
1482 issue_nulldata(iface, NULL, ps_mode, 3, 50);
1483 }
1484 }
1485 RTW_INFO("%s(%d ms)\n", __func__, rtw_get_passing_time_ms(start));
1486 }
1487 }
1488 }
1489
1490 #endif /* CONFIG_MCC_MODE */
1491